检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

257 篇 会议
9 篇 期刊文献

馆藏范围

266 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

143 篇 工学
- 123 篇 计算机科学与技术...
- 56 篇 软件工程
- 48 篇 电气工程
- 36 篇 电子科学与技术（可...
- 33 篇 信息与通信工程
- 32 篇 仪器科学与技术
- 12 篇 光学工程
- 7 篇 控制科学与工程
- 6 篇 动力工程及工程热...
- 4 篇 土木工程
- 3 篇 航空宇航科学与技...
- 2 篇 建筑学
- 2 篇 交通运输工程
- 2 篇 生物医学工程（可授...
- 2 篇 安全科学与工程
- 1 篇 机械工程
- 1 篇 水利工程
- 1 篇 化学工程与技术
- 1 篇 船舶与海洋工程
51 篇 理学
- 36 篇 系统科学
- 16 篇 数学
- 10 篇 物理学
- 2 篇 统计学（可授理学、...
- 1 篇 化学
13 篇 管理学
- 11 篇 管理科学与工程(可...
- 6 篇 图书情报与档案管...
- 2 篇 工商管理
11 篇 医学
- 11 篇 临床医学
- 1 篇 基础医学(可授医学...
- 1 篇 药学(可授医学、理...

主题

35 篇 hardware
33 篇 field programmab...
31 篇 computer archite...
24 篇 image processing
22 篇 algorithm design...
18 篇 kernel
17 篇 digital signal p...
15 篇 embedded systems
13 篇 optimization
12 篇 decoding
11 篇 registers
11 篇 computational mo...
11 篇 real-time system...
11 篇 software
10 篇 cameras
10 篇 field programmab...
10 篇 fpga
9 篇 parallel process...
9 篇 signal processin...
7 篇 hardware design ...

机构

3 篇 stmicroelectroni...
3 篇 department of co...
3 篇 ecole polytechni...
3 篇 ietr insa rennes...
3 篇 ecole polytechni...
2 篇 alcatel-lucent n...
2 篇 turku centre for...
2 篇 ruhr univ bochum...
2 篇 cea list embedde...
2 篇 xilinx ireland
2 篇 agh univ sci & t...
2 篇 karlsruhe
2 篇 ietr/image group...
2 篇 coremountains gm...
2 篇 hardware/softwar...
2 篇 diee - dept. of ...
2 篇 lead tech. desig...
2 篇 lheritier alcen ...
2 篇 sorbonne univ cn...
2 篇 esycom esiee par...

作者

7 篇 mattavelli marco
5 篇 fey dietmar
5 篇 stabernack benno
4 篇 tomasz kryjak
4 篇 palumbo francesc...
4 篇 jean-françois ne...
4 篇 lacassagne lione...
4 篇 marco mattavelli
4 篇 dominique houzet
4 篇 paolo meloni
4 篇 raffo luigi
4 篇 francesca palumb...
4 篇 kryjak tomasz
4 篇 reichenbach marc
3 篇 tughrul arslan
3 篇 meftali samy
3 篇 bezati endri
3 篇 de la torre edua...
3 篇 luigi raffo
3 篇 pelcat maxime

语言

265 篇 英文
1 篇 中文

检索条件"任意字段=Conference on Design and Architectures for Signal and Image Processing, DASIP 2015"

共 266 条记录，以下是61-70 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Fast and Efficient signals Recovery for Deterministic Compressive Sensing: Applications to Biosignals

Fast and Efficient Signals Recovery for Deterministic Compre...

引用

conference on design and architectures for signal & image processing

作者： Ravelomanantsoa, Andrianiaina Rabah, Hassan Rouane, Amar Univ Lorraine IJL UMR7198 F-54506 Vandoeuvre Les Nancy France

ISBN: (纸本)9791092279115

Compressed sensing is a technique that is suitable for compressing and recovering signals having sparse representations in certain bases. Compressed sensing has been widely used to optimize the measurement process of power and bandwidth constrained systems like wireless body sensor network. The central issues with compressed sensing are mainly the construction of measurement matrices and the development of efficient recovery algorithms. In this paper, we proposed a simple and fast recovery algorithm which performed a thresholding in the discrete cosine transform domain. We validated it by recovering electrocardiogram and electromyogram signals taken from the Phyiobank database. The simulation and experimental results have shown that the proposed recovery algorithm was 25 and 12 times faster than orthogonal matching pursuit and stagewise orthogonal matching pursuit, respectively. In addition, depending on the compression ratio, the signal-to-noise ratio of recovered signals were improved up to 2 dB.

关键词： Atmospheric measurements Discrete cosine transforms Matching pursuit algorithms Particle measurements signal processing algorithms Sparse matrices

来源：评论

学校读者我要写书评

暂无评论

Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing

Acceleration of image reconstruction in 3D ultrasound comput...

引用

2011 conference on design and architectures for signal and image processing, dasip 2011

作者： Birk, Matthias Guth, Alexander Zapf, Michael Balzer, Matthias Ruiter, Nicole Hübner, Michael Becker, Jürgen Karlsruhe Germany

ISBN: (纸本)9781457706196

As today's standard screening methods frequently fail to diagnose breast cancer before metastases have developed, earlier breast cancer diagnosis is still a major challenge. Three-dimensional ultrasound computer tomography promises high-quality images of the breast, but is currently limited by a time-consuming synthetic aperture focusing technique based image reconstruction. In this work, we investigate the acceleration of the image reconstruction by a GPU, and by the FPGAs embedded in our custom data acquisition system. We compare the obtained performance results with a recent multi-core CPU and show that both platforms are able to accelerate processing. The GPU reaches the highest performance. Furthermore, we draw conclusions in terms of applicability of the accelerated reconstructions in future clinical application and highlight general principles for speed-up on GPUs and FPGAs. © 2011 IEEE.

关键词： Field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

Optimized fixed point implementation of a local stereo matching algorithm onto C66x DSP 8

Optimized fixed point implementation of a local stereo match...

引用

8th conference on design and architectures for signal and image processing (dasip)

作者： Menant, Judicael Pressigout, Muriel Morin, Luce Nezan, Jean-Francois Univ Europeenne Bretagne CNRS INSA IETRUMR 6164 20 Ave Buttes Coesmes F-35708 Rennes France

ISBN: (纸本)9791092279061

Stereo matching techniques aim at reconstructing disparity maps from a pair of images. The use of stereo matching techniques in embedded systems is very challenging due to the complexity of the state-of-the-art algorithms. An efficient local stereo matching algorithm has been chosen from the literature and implemented on a c6678 DSP. Arithmetic simplifications such as approximation by piecewise linear functions and fixed point conversions are proposed. Thanks to factorisation and precomputing, the memory footprint is reduced by a factor 13 to fit on the memory footprint available on embedded systems. A 14.5 fps speed (factor 60 speed-up) has been reached with a small quality loss on the final disparity map.

关键词： Fixed point Embedded systems Digital signal processing Desmoplakin Gene linear function mass loss N-ethylcarbaminomethyl-L-isoleucine Velocity coefficient factorization

来源：评论

学校读者我要写书评

暂无评论

FPGA-based Real Time Embedded Hough Transform Architecture for circles detection 12

FPGA-based Real Time Embedded Hough Transform Architecture f...

引用

12th conference on design and architectures for signal and image processing (dasip)

作者： Chuquimia, Orlando Pinna, Andrea Marsala, Christophe Dray, Xavier Bertrand, Granado Sorbonne Univ CNRS LIP6 UMR 7606 Paris France Sorbonne Univ Hop St Antoine AP HP Paris France

ISBN: (纸本)9781538682371

Hough Transform is a widely used shapebased algorithm for object detection and localization [6], this technique can be generalized to parametric curves as circles. For a real time execution and embedded integration, several optimizations are necessary due to the large memory and computational requirements. This paper presents an efficient real-time pipelined architecture with a FPGA implementation of our Hough Transform for multi-circles detection. The computation of center candidates was improved. A three stages pipeline architecture was designed in order to reduce the processing latency and cadence. The architecture has been integrated into a Xilinx Zynq-7000 XC7Z020 containing a FPGA Artix-7. The global system uses 78.5 BRAMs, 153 DSP slices, 21638 LUTs. Our global system can support a maximum clock frequency of 128.89 MHz. We validate our architecture using a 125MHz clock frequency and we obtain a latency of 33.214 ms and an interval between two images of 16,607 ms for a 1920x1080 pixels image. According to our results, our architecture offer a throughput more than 4 times better than the faster state of the art architecture.

关键词： Transforms Histograms Computer architecture Field programmable gate arrays image edge detection Real-time systems Hardware

来源：评论

学校读者我要写书评

暂无评论

design of a processor optimized for syntax parsing in video decoders

Design of a processor optimized for syntax parsing in video ...

引用

2011 conference on design and architectures for signal and image processing, dasip 2011

作者： Siret, Nicolas Nezan, Jean-François Rhatay, Aimad European University of Brittany INSA IETR F-35708 Rennes France Lead Tech. Design F-35700 Rennes France

ISBN: (纸本)9781457706196

Heterogeneous platforms aim to offer both performance and flexibility by providing designers processors and programmable logical units on a single platform. Processors implemented on these platforms are usually soft-cores (e.g. Altera NIOS) or ASIC (e.g. ARM Cortex-A8). However, these processors still face limitations in terms of performance compared to full hardware designs in particular for real-time video decoding applications. We present in this paper an innovative approach to improve performance using both a processor optimized for the syntax parsing (an Application-Specific Instruction-set Processor) and a FPGA. The case study has been synthesized on a Xilinx FPGA at a frequency of 100 MHz and we estimate the performance that could be obtained with an ASIC. © 2011 IEEE.

关键词： Field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

A New Real-Time Embedded Video Denoising Algorithm 13

A New Real-Time Embedded Video Denoising Algorithm

引用

conference on design and architectures for signal and image processing (dasip)

作者： Petreto, Andrea Romera, Thomas Lemaitre, Florian Masliah, Ian Gaillard, Boris Bouyer, Manuel Meunier, Quentin L. Lacassagne, Lionel Sorbonne Univ CNRS LIP6 F-75005 Paris France Lheritier Alcen F-95862 Cergy Pontoise France

ISBN: (纸本)9781728140742

Many embedded applications rely on video processing or on video visualization. Noisy video is thus a major issue for such applications. However, video denoising requires a lot of computational effort and most of the state-of-the-art algorithms cannot be run in real-time at camera framerate. This article introduces a new real-time video denoising algorithm for embedded platforms called RTE-VD. We first compare its denoising capabilities with other online and offline algorithms. We show that RTE-VD can achieve real-time performance (25 frames per second) for qHD video (960x540 pixels) on embedded CPUs and the output image quality is comparable to state-of-the-art algorithms. In order to reach real-time denoising, we applied several high-level transforms and optimizations (SIMDization, multi-core parallelization, operator fusion and pipelining). We study the relation between computation time and power consumption on several embedded CPUs and show that it is possible to determine different frequency and core configurations in order to minimize either the computation time or the energy.

关键词： Embedded system Video denoising Real-time image processing night-vision SIMD

来源：评论

学校读者我要写书评

暂无评论

Energy Efficiency and Performance Management of Parallel Dataflow Applications 8

Energy Efficiency and Performance Management of Parallel Dat...

引用

8th conference on design and architectures for signal and image processing (dasip)

作者： Holmbacka, Simon Nogues, Erwan Pelcat, Maxime Lafond, Sebastien Lilius, Johan Abo Akad Univ Dept Informat Technol Turku Finland INSA Rennes CNRS UMR 6164 IETRImage Grp Rennes France

ISBN: (纸本)9791092279061

Parallelizing software is a popular way of achieving high energy efficiency since parallel applications can be mapped on many cores and the clock frequency can be lowered. Perfect parallelism is, however, not often reached and different program phases usually contain different levels of parallelism due to data dependencies. Applications have currently no means of expressing the level of parallelism, and the power management is mostly done based on only the workload. In this work, we provide means of expressing QoS and levels of parallelism in applications for more tight integration with the power management to obtain optimal energy efficiency in multi-core systems. We utilize the dataflow framework PREESM to create and analyze program structures and expose the parallelism in the program phases to the power management. We use the derived parameters in a NLP (Non Linear Programming) solver to determine the minimum power for allocating resources to the applications.

关键词： Power manager Multi-core Application Parallelism Dataflow framework

来源：评论

学校读者我要写书评

暂无评论

Low Power image processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration 12

Low Power Image Processing Applications on FPGAs Using Dynam...

引用

12th conference on design and architectures for signal and image processing, dasip 2018

作者： Podlubne, Ariel Haase, Julian Kalms, Lester Akgün, Gökhan Ali, Muhammad Ul Hasan Khar, Habib Kamal, Ahmed Göhringer, Diana Technische Universität Dresden Germany

ISBN: (纸本)9781538682371

The TULIPP project aims to facilitate the development of embedded image processing systems with real-time and low-power constraints. In this paper, several adaptive dynamic runtime techniques for reconfigurable SoCs are described. These methods are used for low power image processing applications on high-performance embedded platforms. Dynamic voltage scaling and dynamic partial reconfiguration target the low-power requirements of the embedded systems while debugging supports the fast development on the hardware side of the system. The proposed techniques were tested and verified using an own developed custom SDSoC image processing library. © 2018 IEEE.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

A unified hardware/software co-synthesis solution for signal processing systems

A unified hardware/software co-synthesis solution for signal...

引用

2011 conference on design and architectures for signal and image processing, dasip 2011

作者： Bezati, Endri Yviquel, Hervé Raulet, Michaël Mattavelli, Marco Ecole Polytechnique Fédérale de Lausanne CH-1015 Lausanne Switzerland IRISA University of Rennes 1 F-22300 Lannion France IETR INSA of Rennes F-35708 Rennes France

ISBN: (纸本)9781457706196

This paper presents a methodology to specify from a high-level data-flow description an application for both hardware and software synthesis. Firstly, an introduction to RVC-Cal data-flow programming and Orcc framework is presented. Furthermore, an analysis of a close to gate intermediate representation (XLIM) is bestowed. As a proof of concept a JPEG codec was written purely in RVC-Cal to test the co-synthesis tools and then an analysis of the generated hardware and software results are given. Our experience shows that using RVC-Cal can unify the process of creating the same application for software and hardware without modifying a single source code for each solution. © 2011 IEEE.

关键词： Field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

Consumption analysis and estimation in the design of GStreamer based multimedia applications

Consumption analysis and estimation in the design of GStream...

引用

6th Annual conference on design and architectures for signal and image processing, dasip 2012

作者： Lanoe, Mickael Senn, Eric Lab-STICC Université de Bretagne Sud France

ISBN: (纸本)9782953998726

Multimedia application development on embedded systems requires highly sophisticated hardware/software frameworks. These frameworks make heavy use of available hardware resources and therefore the impact on the overall consumption is far from negligible. Being able to determine this impact is therefore essential. In order to tackle this challenge, this paper proposes a methodology for modeling the power and energy consumption of multimedia applications, which allows a rapid performance analysis of combined signal and image processing on complex embedded systems. This methodology is applied to the GStreamer multimedia framework running on Linux operating system for the OMAP3530 heterogeneous MPSoC. Our approach is based on measurements of the power consumption during the rendering of compressed audio/video streams. Resulting power models consider features of the source stream such as the duration, video resolution, audio sampling frequency and bitrate. The precision of our models is presented and finally compared to the actual measurements for two full multimedia clips. © 2012 ECSI.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共27页 << < 3 4 5 6 7 8 9 10 11 12 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：