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检索条件"任意字段=Conference on Design for Manufacturability through Design-Process Integration"

共 5204 条记录，以下是431-440 订阅

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Social, Labor and Cultural integration of Immigrants: A Quali-Quantitative Approach to the Venezuelan-Ecuadorian Case 8th

Social, Labor and Cultural Integration of Immigrants: A Qual...

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8th International conference on Science, Technology and Innovation for Society (CITIS)

作者： Medina, Candice Tapia, Nicole Velasquez, Marco Zanzzi, Fabricio NYU New York NY 10003 USA St Peters Univ Jersey City NJ USA ESPOL Polytech Univ Guayaquil Ecuador

ISBN: (纸本)9783031243264;9783031243271

Between the two extremes of the social exclusion-integration spectrum, here we addressed the second since the social integration of immigrants must be assisted by the host country. In this paper, we analyzed this process as a combination of cultural integration and labor integration, through in-depth interviews complemented with non-parametric methods, Bayesian statistics, and Boolean algebra applied to small data. In the empirical approach, we used the VenezuelanEcuadorian case. We found that this relationship is fully satisfied, therefore social integration can be evaluated in a more tangiblemanner. Themechanism that accelerates it is the network of friends. The absence of this network affectswomen more intensely. We recommend that governments encourage its conformation, evidence, and reduce the naturalization of precarious jobs of immigrants. Our results opened a line of research on differential factors with Venezuelan immigration in other countries and perceptions of immigrant inequality.

关键词： Multiculturalism Migration Venezuela Ecuador Small data

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design of a Low-Power 4x4 Wallace Tree Multiplier Using Ripple Carry Adder at 10 MHz in 180nm CMOS Techology 23

Design of a Low-Power 4x4 Wallace Tree Multiplier Using Ripp...

引用

23rd International Symposium on Communications and Information Technologies, ISCIT 2024

作者： Balatero, Phoebe Nicole L. Galang, Jhanine J. Gonzales, Trisha Mae M. Salem-Diaz, Arcel University of Science and Technology of Southern Philippines Department of Electronics Engineering Cagayan de Oro City Philippines

ISBN: (纸本)9798350353952

The research focused on designing a low-power 4x4 Wallace Tree Multiplier for integration into wearable devices, driven by the growing prevalence of wearable technology and the demand for energy-efficient circuits. The use of the Wallace tree multiplier technique, which minimized partial products to reduce power consumption and multiplication delay, was proposed. The design employs the Wallace Tree multiplier technique, strategically minimizing partial products to curtail power consumption. Executed through the 180nm CMOS process, the design features a 4x4 bit configuration and operates with a supply voltage of 1.8 V, and its performance was assessed using Synopsys. A comparative analysis was conducted to evaluate the proposed multiplier against existing designs in terms of power consumption, measuring at 11.4480 μW at FF Corner, with 10 MHz as the operating at a frequency. This conspicuous enhancement in power efficiency underscores the substantial progress achieved by the proposed design, especially in the context of minimizing power consumption for applications in wearable technology © 2024 IEEE.

关键词： CMOS integrated circuits

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Exploring Circuit Families for Optimizing 3× 2 Multiplier: design and Analyses 10

Exploring Circuit Families for Optimizing 3× 2 Multiplier: ...

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10th International conference on Signal processing and Communication, ICSC 2025

作者： Raj, Rohan Navaneeth, M. Satheesh Kumar, S. Vellore Institute of Technology Dept. of Electronics and Communication- Sense Tamil Nadu Vellore India Vellore Institute of Technology Dept. of Micro and Nanoelectronics-SENSE Tamil Nadu Vellore India

ISBN: (纸本)9798331511890

This paper presents the design, implementation and analyses of a 3× 2 multiplier using various circuit families, with the aim of optimizing it for reduced delay, area, and power consumption. A multiplier is one of the most important blocks of many Very Large-Scale integration (VLSI) applications operating as an arithmetic combinational logic circuit, also known as the digital multiplier for binary digit multiplication. through simulations, we explored multiple circuit families including CMOS logic circuit, Pass transistor logic circuit, Transmission gate logic circuit, Pseudo NMOS logic circuit, Cascode Voltage Switch Logic (CVSL) circuit, Clocked CMOS (C2MOS) logic circuit, and Dual Threshold Pass Transistor (DTPT) logic circuit. We have performed Monte Carlo and process, Voltage, and Temperature (PVT) assessing performance, stability, and reliability of the circuits in terms of power and delay. Additionally, we have focused on other parameters like area, transistors used, and Power-Delay Product (PDP). Comparison of simulation results helped to investigate the effectiveness of different circuits in multiplier optimization. We devised a Novel circuit for a 3× 2 multiplier by combining elements from various logic families, yielding superior outcomes across the metrics. Our research reports a comprehensive design and analysis of the 3× 2 multiplier which underscores the thorough optimization of the multiplier, as evidenced by our simulation's outcomes. Notably, our Novel circuit exhibited the least power consumption, moderate delay, and PDP. It gave an optimal balance between transistor count and area utilization. Further, it was observed from the Monte Carlo analyses and PVT analyses that confirmed good stability and reliability of the circuits for real-life conditions. Our study shows the design, analyses, and optimization of the Novel circuit, which outperforms conventional logic circuits in terms of efficiency and robustness. © 2025 IEEE.

关键词： Transistor transistor logic circuits

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Key Technology Research of Satellite-Ground Intergrated design on Optical Remote Sensing Satellite

Key Technology Research of Satellite-Ground Intergrated Desi...

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2024 IEEE International conference on Control Science and Systems Engineering, ICCSSE 2024

作者： Bin, Wu Yuquan, Liu Hongyi, He Yifang, Dou Jia, Liu Zhiming, Zhao Xinya, Chang Meizhi, Yan Aerospace DongFangHong Satellite Corporation Limited China Academy of Space Technology Beijing China Twenty First Century Aerospace Technology Corporation Limited Beijing China Institute of Spacecraft Application System Engineering China Academy of Space Technology Beijing China

ISBN: (纸本)9798331517199

With the advancement of satellite technology, satellite manufacturing has evolved from being merely functional to being efficient and user-friendly. designing satellites from the perspective of satellite-ground integration is a sophisticated approach to achieve efficiency and usability. This article summarizes several key technologies that require integrated satellite-ground design, based on the development experience of multiple optical remote sensing satellites. Foremost, the core indicator of satellite-ground integrated design is the accuracy of uncontrolled positioning. By analyzing the error chain, it is necessary to strictly control the orbit measurement error, star sensor attitude determination error, time synchronization error, and camera optical axis determination error throughout the satellite manufacturing process to ensure that the final uncontrolled positioning accuracy meets the requirements. Additionally, this article proposes suggestions for improving uncontrolled positioning accuracy both on the satellite and on the ground. The second key aspect involves designing the on-orbit radiometric calibration mode based on satellite-ground integration. To improve the frequency and quality of radiometric calibration, the satellite should be designed with imaging modes such as 90-degree yaw calibration and moon-oriented calibration, and the ground should be equipped with corresponding processing algorithms to achieve efficient on-orbit radiometric calibration and improve image quality. The third aspect involves designing the on-orbit geometric calibration mode, including star-oriented calibration and 180-degree yaw calibration, to enhance the frequency and effectiveness of geometric calibration. The fourth aspect focuses on designing the data transmission link for satellites carrying multiple payloads, ensuring that data is transmitted effectively through dual channels. Often, space-ground transmission errors can cause the loss of frames on a certain channel.

关键词： Radiometry

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WebverseTest: A Standardized Benchmarking Framework for Web-Metaverse integration

WebverseTest: A Standardized Benchmarking Framework for Web-...

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IEEE International conference on Web Services (IEEE ICWS)

作者： Fu, Yunkai Wei, Xinyao Liu, Zhicheng Chen, Nanxi Jia, Jinyuan Tongji Univ Sch Software Engn Shanghai Peoples R China Chinese Acad Sci Shanghai Inst Microsyst & Informat Technol Shanghai Peoples R China Univ Chinese Acad Sci Beijing Peoples R China Sch Game Jilin Animat Inst Changchun Peoples R China

ISBN: (纸本)9798350368567;9798350368550

With the advent of Web3.0 and Metaverse technologies, there is a growing interest in integrating web and metaverse environments to create immersive, cross-platform "Webverse" experiences. Despite active research in this area, the lack of standardized testing approaches has hindered the development of robust Webverse applications. This paper addresses this gap by proposing a comprehensive framework for testing WebMetaverse integrations. We analyze existing Webverse platforms, characterize different stages and scenes through network data analysis, and design a suite of standardized tests. Furthermore, we implement a one-stop benchmarking tool tailored for web-based metaverse applications. The fidelity of our tool is validated through comparisons with human testing results. To demonstrate its applicability, we utilize the proposed testing process to evaluate and compare Webverse implementations on popular platforms like Galacean and Mozilla Hubs, deployed on their respective servers. The outcomes highlight platform-specific differences and the efficacy of our standardized approach in enabling seamless Web-Metaverse convergence.

关键词： metaverse testbed test suite benchmarking framework Web3D

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An underground pipeline relocation decision support system based on BIM and GIS integration 2

An underground pipeline relocation decision support system b...

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2nd International conference on Software Engineering and Machine Learning, CONF-SEML 2024

作者： Ma, Fei Gao, Yang Zhang, Guien Huang, Can Chen, Wenkai CCCC Wuhan Zhixing International Engineering Consulting Co. Ltd. Hanyang District Wuhan430100 China

This study introduces a rapid decision-support system for underground pipeline relocation, leveraging the synergistic capabilities of Building Information Modeling (BIM) and Geographic Information Systems (GIS). The amalgamation of BIM and GIS technologies within the system facilitates comprehensive information management and analysis. To validate the system's practicality, dedicated software applications have been developed to streamline data collection, model generation, and data fusion. In the data collection phase, a mobile application has been designed to efficiently acquire standardized physical exploration data. In the design phase, we have implemented an automated pipeline modeling process, utilizing the physical exploration data through our in-house Revit plug-in. Concurrently, the plug-in enables clash detection and distance analysis. Subsequently, the model can be seamlessly transferred to our custom-built integration platform, which is founded on ArcGIS. Within this platform, the integration of the BIM model with GIS can be visually represented. Furthermore, it provides tools for analyzing project quantity and monitoring project progress. The integrating proposed system and software enhances the efficiency of underground pipeline relocation and augments decision-making capabilities. © Published under licence by IOP Publishing Ltd.

关键词： Data fusion

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Elderly Health Care Data integration Framework: design and Implementation 4th

Elderly Health Care Data Integration Framework: Design and I...

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4th International conference on Data and Information in Online Environments

作者： Zhong, Zhean Liu, Chenyu Zhao, Jing Xiao, Jianmao Gao, Qinghang Gao, Chao Ouyang, Chuying Jiangxi Normal Univ Sch Software Nanchang 330022 Jiangxi Peoples R China Jiangxi Prov Engn Res Ctr Blockchain Data Secur & Nanchang 330022 Jiangxi Peoples R China Tianjin Univ Coll Intelligence & Comp Tianjin 300072 Peoples R China Jiangxi Normal Univ Dept Phys Nanchang 330022 Jiangxi Peoples R China

ISBN: (纸本)9783031807121;9783031807138

The application of Internet of Things (IoT) detection devices in the field of elderly healthy generates a large amount of detection data, which faces problems such as diversified data sources and non-uniform parsing methods. The fragmentation and confusion of the process from data subscription to data analysis have become important challenges affecting the development of the healthy aging field. In this paper, we designed and proposed an elderly health care framework with a model-as-a-service orientation. The framework automates the integration of health data for the elderly, including subscription services. It handles Model Training Analysis through a workflow-based system. Users can configure workflows using a low-code method provided by the platform. First, we abstracted and formalized the integration problem and workflow and defined a workflow description language. Then, we built an healthy aging unified modeling framework based on the problem model and provided a general introduction to the framework architecture. The module for analyzing is responsible for model training, persistence, and data analysis, enabling users to customize the selection of machine learning models and corresponding parametric. Ultimately, we built a model library and an external RESTful interface based on the automation option of Automated machine learning (AutoML). The experiments demonstrate this paper's proposed framework's feasibility and effectiveness.

关键词： Data curation Elderly health care Model-as-a-Service Machine learning

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Software and Hardware Collaborative design and Implementation of Modular Intelligent Manufacturing System for Quick-Opening Valve Core 5

Software and Hardware Collaborative Design and Implementatio...

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5th International conference on Machine Learning and Big Data Analytics for IoT Security and Privacy, SPIoT 2024

作者： Qiao, Peng East China Jiaotong University School of Mechatronics and Vehicle Engineering Jiangxi Nanchang330013 China Shanghai Communications Polytechnic Shanghai200030 China

At present, there are problems such as insufficient automation, low production efficiency, and difficult quality control in the production process of quick-opening valve cores. This paper introduces a modular intelligent manufacturing system to improve production efficiency, optimize quality management, and realize software and hardware collaborative design and efficient integration. Method: First, a software and hardware system architecture based on modularization is designed, combining PLC (Programmable Logic Controller) control and embedded devices to achieve system scalability and efficient data processing;then, the parameter configuration in the manufacturing process is optimized through an adaptive algorithm to improve the accuracy and consistency of valve core production;finally, a real-time monitoring and feedback mechanism is adopted to ensure that each link in the production process can be adjusted and controlled in time. For the traditional production method, the efficiency of production lines A, B and C is 180, 185 and 190 pieces/hour, respectively, and the overall performance is relatively stable. However, after the introduction of the intelligent manufacturing system, the efficiency of the production line has been significantly improved, and production lines A, B and C have reached 220, 230 and 240 pieces/hour, respectively. The modular intelligent manufacturing system can effectively improve the production efficiency and quality control level of the quick-opening valve core, and has shown good feasibility and superiority in practical applications. © 2025 The Authors. Published by Elsevier B.V.

关键词： Inspection

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Adaptive Coverage Path Planning of Marine Vehicles with Multi-Sensor 3

Adaptive Coverage Path Planning of Marine Vehicles with Mult...

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3rd conference on Fully Actuated System Theory and Applications (FASTA)

作者： Zhang, Zheng Wang, Peng Shanghai Jiao Tong Univ Dept Automat Shanghai 200240 Peoples R China

ISBN: (纸本)9798350373707;9798350373691

Recent advancements in autonomous underwater vehicles (AUV) have made ocean exploration a key future frontier. This study addresses the complex challenge of adaptive coverage path planning with multi-sensors (ACPPMS) in marine environments, aiming to optimize AUV's area coverage under strict time and energy constraints. We propose a novel approach that integrates considerations of energy consumption, information acquisition, and spatial coverage, assessing the intricate trade-offs between extending area coverage and enhancing data collection. Our methodology extends traditional adaptive information path planning by incorporating the decision-making dilemma of balancing coverage with information gain, which we tackle through a tree-based sequential decision-making framework, specifically a partially observable Markov decision process. Utilizing an online planning solution, we validate our approach through rigorous simulation in a search and rescue scenario. The results affirm ACPPMS's adaptability and its superior performance in environments with medium to low reward densities, although it falls short in highly rewarding settings compared to conventional full-coverage strategies. Notably, employing multiple sensors not only elevates path efficiency but also contributes to significant energy savings, showcasing the practical benefits of our multi-sensor integration strategy in adaptive maritime exploration.

关键词： Adaptive Coverage Path Planning Area Coverage Partially Observable Markov Decision process

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Invited: Hammer: A Modular and Reusable Physical design Flow Tool 59

Invited: Hammer: A Modular and Reusable Physical Design Flow...

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59th ACM/IEEE design Automation conference (DAC) - From Chips to Systems - Learn Today, Create Tomorrow

作者： Liew, Harrison Grubb, Daniel Wright, John Schmidt, Colin Krzysztofowicz, Nayiri Izraelevitz, Adam Wang, Edward Asanovic, Krste Bachrach, Jonathan Nikolic, Borivoje Univ Calif Berkeley Berkeley CA 94720 USA Amazon Sunnyvale CA USA SiFive San Mateo CA USA MIT Cambridge MA USA JITX Berkeley CA USA

ISBN: (纸本)9781450391429

process technology scaling and hardware architecture specialization have vastly increased the need for chip design space exploration, while optimizing for power, performance, and area. Hammer is an open-source, reusable physical design (PD) flow generator that reduces design effort and increases portability by enforcing a separation among design-, tool-, and process technology-specific concerns with a modular software architecture. In this work, we outline Hammer's structure and highlight recent extensions that support both physical chip designers and hardware architects evaluating the merit and feasibility of their proposed designs. This is accomplished through the integration of more tools and process technologies-some open-source-and the designer-driven development of flow step generators. An evaluation of chip designs in process technologies ranging from 130nm down to 12nm across a series of RISC-V-based chips shows how Hammer-generated flows are reusable and enable efficient optimization for diverse applications.

关键词： Hammers

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