This paper presents a multi-index variable time step method for the integration of the equations of motion of constrained multibody systems in descriptor form. The basis of the method is the augmented Lagrangian formu...
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The popularity of simulated annealing for engineering design applications has grown in recent years, increasing the need for new techniques that improve algorithm performance. Simulated annealing is a time-consuming, ...
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A silicon-rich silicon oxide (SRSO)-based light emitting diode (LED) is integrated with a surrounding bipolar driver transistor using a standard bipolar process which was modified to include five additional lithograph...
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A silicon-rich silicon oxide (SRSO)-based light emitting diode (LED) is integrated with a surrounding bipolar driver transistor using a standard bipolar process which was modified to include five additional lithography levels and several processing steps. The driver transistor is connected in a common-emitter configuration and modulates light emission by amplifying a small base input signal and controlling current flow through the LED. The circular design is area-efficient and scalable, provides effective electrical isolation and demonstrates a truly integrated structure.
The implementation of Advanced Life Support Systems (ALSS) for missions of long duration is inevitable. Many research works have been conducted on systems which would eventually become part of an ALSS. However, when t...
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The implementation of Advanced Life Support Systems (ALSS) for missions of long duration is inevitable. Many research works have been conducted on systems which would eventually become part of an ALSS. However, when the actual integration takes place, compatibility of different systems may become another issue and require further research, redesign, and modifications to the hardware, controls and its programs. An uncoordinated designprocess will result in a costly integration effort later. If a main system with all possible integrations were adopted now, it would greatly reduce development costs and time. In the design of the subsystems, known parameters provided by researchers should be regarded. These subsystems can produce fermented foods, mushrooms, bean sprouts, escargot, radish and vinegar. Ecologically balanced subsystems include heat and water recirculation systems and biofilters with microbes and other biomedical material. These systems should be ascertained and interfaced to the degree now possible. Most of these can share part of the environment given to the main vegetable production system which will undoubtedly have a major role in regeneration, gas exchange via photosynthesis and biofiltering through transpiration. The total system design must have a harmonious balance among all the subsystems while providing economical and technical advantages. Detailed analysis of each component for consideration will not be the focus in this paper. The main focus will be the feasibility of integrating many compatible systems with plants growing machines which will most likely occupy the largest space and contribute most for the life support system. At the same time, we will investigate adoptabilities of our Gravity Independent Fluid Transfer System (GIFTS) in operating other subsystems as they all involve liquid transfer which is affected by gravitational changes. The actual findings from this development will lead to a more practical or straightforward approach to
We present results of a verification study of totally automated optical proximity correction (OPC) for mask redesign to enhance process capability. OPC was performed on an aggressive 0.35 mu m i-line LSI Logic SRAM de...
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ISBN:
(纸本)0819424625
We present results of a verification study of totally automated optical proximity correction (OPC) for mask redesign to enhance process capability. OPC was performed on an aggressive 0.35 mu m i-line LSI Logic SRAM design using the automated OPC generation code Eoptimask, employing the aerial image simulation code FAIM, both from Vector Technologies, Inc.* Three different tests were performed, varying in the agressiveness and type of corrections made. The key issues addressed in this work are the predictive capability of the aerial image simulation and, particularly, the ability of automatically generated OPC to significantly improve the fidelity of the final printed resist image for different geometries. The results of our study clearly demonstrate the utility of automated OPC based on aerial image simulation. Key experimental results include: two-fold increase of depth of focus latitude;demonstration of the feasibility of full off-axis illumination on the stepper;successful resolution of different feature types (posts, lines and spaces) on the wafer to correct CD at a single common exposure and focus condition, Future research will address detailed issues in reticle manufacture and inspection which are critical for cost-effective large-scale OPC.
An analog design methodology that uses the assistance of an expert system is presented. A top-down analytical knowledge based design that fully exploits any inherent hierarchy in the system, is first generated. Exploi...
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An analog design methodology that uses the assistance of an expert system is presented. A top-down analytical knowledge based design that fully exploits any inherent hierarchy in the system, is first generated. Exploiting hierarchy permits the designprocess to be recast as a sequence of smaller design tasks, and permits the sub-blocks to be reused in different contexts. The initial design is further refined by making use of an expert system that learns rules as it gains experience. The design methodology is demonstrated through the example of a CMOS operational amplifier.
An integrated circuit process R&D facility concurrently conducts advanced research, process control and product prototyping of three Very Large Scale Integrated Circuit process generations. Self-managed inter-depa...
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An integrated circuit process R&D facility concurrently conducts advanced research, process control and product prototyping of three Very Large Scale Integrated Circuit process generations. Self-managed inter-departmental teams of process engineers and device physicists govern most aspects of processintegrationthrough a peer review process, and collectively design short cycle experiments. Organizational structures are adjusted to minimize the number of communication channels. Key metrics traditionally associated with processintegration improve by a factor of three.
Word-parallel bit-serial processing is a solution to high speed processing suitable for VLSI. In this paper a new bit-serial parallel processing architecture is proposed. A VLSI chip for a digital filter is designed b...
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Word-parallel bit-serial processing is a solution to high speed processing suitable for VLSI. In this paper a new bit-serial parallel processing architecture is proposed. A VLSI chip for a digital filter is designed based on the proposed architecture and it is implemented on a gate array chip. through the implementation, it is verified that bit-serial parallel processing on an array architecture achieves high speed processing and easy design.
The test problem increasingly affects the system designprocess and related costs and time to market. Requirements from VLSI/WSI manufacturers are for fast and reliable testability tools, with the possibility of their...
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The test problem increasingly affects the system designprocess and related costs and time to market. Requirements from VLSI/WSI manufacturers are for fast and reliable testability tools, with the possibility of their introduction in early phases of design. The paper presents a global toolset architecture for testability analysis and test pattern generation. Three abstraction levels are considered in this design flow, from the behavioral specifications, through RTL descriptions, down to gate level. In all these phases, VHDL is chosen as the referring description language. The paper then presents an application scenario, detailing the results achieved by the proposed methodology.
This paper proposes a scheme that directly transforms unified system specifications into highly parallel dynamic data-driven programs incrementally in an interactive fashion. In this paper the scheme proposed is descr...
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This paper proposes a scheme that directly transforms unified system specifications into highly parallel dynamic data-driven programs incrementally in an interactive fashion. In this paper the scheme proposed is described with special emphasis on its application to stream-oriented processing such as the multimedia signal processing. An abstract data type for generalized multiple data streams is introduced in order to facilitate interpretations of hierarchical and diagrammatic specifications. Also an optimization technique applicable in fitting the specifications to a specific hardware configuration is shown. Finally, practicability of the methodology is illustrated through a designprocess of an HDTV signal decoder.
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