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检索条件"任意字段=Conference on High Performance Computer Modernization Program"

共 10259 条记录，以下是4881-4890 订阅

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Recognition of Information Leakage of computer via Conducted Emanations on the Power Line 3

Recognition of Information Leakage of Computer via Conducted...

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IEEE 3rd International conference on Big Data Security on Cloud (BigDataSecurity) / 3rd IEEE International conference on high performance and Smart Computing (HPSC) / 2nd IEEE International conference on Intelligent Data and Security (IDS)

作者： Yang, Shanjing Liao, Xiaoyong Hu, Jianlin Huang, Weiqing Univ Chinese Acad Sci Sch Cyber Secur Beijing Peoples R China Beijing Inst Informat Technol Beijing Peoples R China Chinese Acad Sci Inst Informat Engn Beijing Peoples R China

ISBN: (纸本)9781509062966

The security problem of screen image leakage from a display unit has become serious with the rapid speed of signal transmission technology. This paper presents a novel investigation on the characteristics of the power line compromising channel. Moreover, a measurement system has been actually developed for the leakage signal analyzing and image reconstruction. In order to overcome the degradation of reconstructed motion images and enhance the reconstructed image quality, a multi-image blind deconvolution method was proposed and test experiments were carried out to verify the effectiveness of the multi-image blind deconvolution algorithm based on the conducted signal from the power line.

关键词： computer recognition compromising emanations power line eavesdropping screen image

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The challenge of building a program to develop generic skills in an undergraduate program 36

The challenge of building a program to develop generic skill...

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36th International conference of the Chilean computer Science Society (SCCC)

作者： Schmal, Rodolfo Rivero, Sabino Vidal-Silva, Cristian Univ Talca Ingn Informat Empresarial Fac Econ & Negocios Talca Chile Univ Auitonoma Chile Fac Ingn Ingn Informat Talca Chile

ISBN: (纸本)9781538634837

Currently, competency-based education corresponds to a model of professional training of a high relevance. The objective of this paper is to present the evolution of a training program of generic competencies at the University of Talca, based on the experience of the authors as professors of an engineering major. This evolution, after more than ten years of its inception, is expressed in three versions. Even though a maturing process and continuous improvement exist, this article concludes that there are still open spaces for significant advances intending to their consolidation.

关键词： generic competence undergraduate education fundamental training

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Sparse Beamforming for Interlaced Clustering in Distributed Antenna Systems 9

Sparse Beamforming for Interlaced Clustering in Distributed ...

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9th International conference on Wireless Communication and Signal Processing (WCSP)

作者： Xia, Xinjiang Zhang, Yu Li, Jiamin Zhu, Pengcheng Wang, Dongming You, Xiaohu Southeast Univ Natl Mobile Commun Res Lab Nanjing Jiangsu Peoples R China

ISBN: (纸本)9781538620625

In ultra-dense cellular networks, research works on enhancing cell edge performance receive considerable attention. Based on interlaced clustering, we propose a heuristic sparse beamforming strategy to improve the cell edge throughput effectively in distributed antenna systems (DASs). In our scheme, each cluster pattern (CP) is divided into several adaptive cells, where all the remote antenna units (RAUs) are connected to a central processor via finite-capacity backhaul links. Relying on the adaptive cells, we then provide a low-complexity alternating optimization algorithm for the high-burden sparse beamforming design. Simulations based on practical cell parameters show that the proposed adaptive cell based sparse beamforming can achieve significant performance gain on edge user rate and further improved the sum rate.

关键词： Array signal processing Microprocessors computer architecture Indexes Bandwidth Antenna arrays Optimization

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Dynamic load balancing of massively parallel unstructured meshes 8

Dynamic load balancing of massively parallel unstructured me...

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8th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems, ScalA 2017 - Held in conjunction with the International conference for high performance Computing, Networking, Storage and Analysis, SC 2017

作者： Diamond, Gerrett Smith, Cameron W. Shephard, Mark S. Rensselaer Polytechnic Institute TroyNY United States

ISBN: (纸本)9781450351256

Simulating systems with evolving relational structures on massively parallel computers require the computational work to be evenly distributed across the processing resources throughout the simulation. Adaptive, unstructured, mesh-based finite element and finite volume tools best exemplify this need. We present EnGPar and its diffusive partition improvement method that accounts for multiple application specified criteria. EnGPar's performance is compared against its predecessor, ParMA. Specifically, partition improvement results are provided on up to 512Ki processes of the Argonne Leadership Computing Facility's Mira BlueGene/Q system. © 2017 Association for Computing Machinery.

关键词： Distributed computer systems

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Kill the program Counter: Reconstructing program Behavior in the Processor Cache Hierarchy 17

Kill the Program Counter: Reconstructing Program Behavior in...

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22nd ACM International conference on Architectural Support for programming Languages and Operating Systems (ASPLOS)

作者： Kim, Jinchun Teran, Elvira Gratz, Paul V. Jimenez, Daniel A. Pugsley, Seth H. Wilkerson, Chris Texas A&M Univ College Stn TX 77843 USA Intel Labs Hillsboro OR USA

ISBN: (纸本)9781450344654

Data prefetching and cache replacement algorithms have been intensively studied in the design of high performance microprocessors. Typically, the data prefetcher operates in the private caches and does not interact with the replacement policy in the shared Last-Level Cache (LLC). Similarly, most replacement policies do not consider demand and prefetch requests as different types of requests. In particular, program counter (PC)-based replacement policies cannot learn from prefetch requests since the data prefetcher does not generate a PC value. PC-based policies can also be negatively affected by compiler optimizations. In this paper, we propose a holistic cache management technique called Kill-the-PC (KPC) that overcomes the weaknesses of traditional prefetching and replacement policy algorithms. KPC cache management has three novel contributions. First, a prefetcher which approximates the future use distance of prefetch requests based on its prediction confidence. Second, a simple replacement policy provides similar or better performance than current state-of-the-art PC-based prediction using global hysteresis. Third, KPC integrates prefetching and replacement policy into a whole system which is greater than the sum of its parts. Information from the prefetcher is used to improve the performance of the replacement policy and vice-versa. Finally, KPC removes the need to propagate the PC through entire on-chip cache hierarchy while providing a holistic cache management approach with better performance than state-of-the-art PC-, and non-PC-based schemes. Our evaluation shows that KPC provides 8% better performance than the best combination of existing prefetcher and replacement policy for multi-core workloads.

关键词： Memory Hierarchy Data Prefetching Cache Replacement Policy

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A Control System Based on Microprocessor and FPGA for 1470nm high-power Semiconductor Laser

A Control System Based on Microprocessor and FPGA for 1470nm...

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2018 3rd International conference on Computational Modeling, Simulation and Applied Mathematics (CMSAM 2018)

作者： Ning-ning DONG Jin-jiang CUI Jian-gen XU Suzhou Institute of Biomedical Engineering and Technology Chinese Academy of Sciences

An intelligent control system for a medical high-power semiconductor laser has been developed. The system combines 1470 nm high-power semiconductor laser and intelligent control technology. The control technique applies an ARM Cortex-M3 microprocessor STM32 F103 as the core, an FPGA to drive the digital constant current source module and the power feedback loop to realize constant power control. Furthermore, the display and storage of the output data, and the driver of the touch screen are realized by designing the main control module and human-computer interaction module with the microprocessor. Finally, the Micro-Controller Development Kit(MDK) platform is used for programming. The safety performance of the whole control system conforms to the national standard of medical electrical safety.

关键词： Control system 1470nm Laser

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A Cost-efficient NVM-based Journaling Scheme for File Systems 35

A Cost-efficient NVM-based Journaling Scheme for File System...

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35th IEEE International conference on computer Design (ICCD)

作者： Zhang, Xiaoyi Feng, Dan Hua, Yu Chen, Jianxi Huazhong Univ Sci & Technol Minist Educ China Sch Comp Sci & Technol Wuhan Natl Lab OptoelectKey Lab Informat Storage Wuhan Hubei Peoples R China

ISBN: (纸本)9781538622544

Modern file systems employ journaling techniques to guarantee data consistency in case of unexpected system crashes or power failures. However, journaling file systems usually suffer from performance decrease due to the extra journal writes. Moreover, the emerging non-volatile memory technologies (NVMs) have the potential capability to improve the performance of journaling file systems by being deployed as the journaling storage devices. However, traditional journaling techniques, which are designed for hard disks, fail to perform efficiently in NVMs. In order to address this problem, we propose an NVM-based journaling scheme, called NJS. The basic idea behind NJS is to reduce the journaling overhead of traditional file systems while fully exploiting the byte-accessibility characteristic, and alleviating the relatively slow write and endurance limitation of NVM. Our NJS consists of three major contributions: (i) In order to minimize the amount of journal writes, NJS only needs to write the metadata of file systems and over-write data to NVM as write-ahead logging, thus alleviating the relatively slow write and endurance limitation of NVM. (ii) We propose a novel journaling update scheme in which the journaling data blocks can be updated in the byte-granularity based on the difference of the old and new versions of journal blocks, thus fully exploiting the unique byte-accessibility characteristic of NVM. (iii) NJS includes a garbage collection mechanism that absorbs the redundant journal updates, and actively delays the checkpointing to the file system. Evaluation results show the efficiency and efficacy of NJS. For example, compared with original Ext4 with a ramdiskbased journaling device, the throughput improvement of Ext4 with our NJS is up to 137.1%.

关键词： Nonvolatile memory Metadata performance evaluation Throughput Random access memory Phase change materials computer crashes

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A Deep Regression Architecture with Two-Stage Re-initialization for high performance Facial Landmark Detection 30

A Deep Regression Architecture with Two-Stage Re-initializat...

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30th IEEE/CVF conference on computer Vision and Pattern Recognition (CVPR)

作者： Lv, Jiangjing Shao, Xiaohu Xing, Junliang Cheng, Cheng Zhou, Xi Chinese Acad Sci Chongqing Inst Green & Intelligent Technol Beijing Peoples R China Univ Chinese Acad Sci Beijing Peoples R China Chinese Acad Sci Inst Automat Beijing Peoples R China

ISBN: (纸本)9781538604571

Regression based facial landmark detection methods usually learns a series of regression functions to update the landmark positions from an initial estimation. Most of existing approaches focus on learning effective mapping functions with robust image features to improve performance. The approach to dealing with the initialization issue, however, receives relatively fewer attentions. In this paper, we present a deep regression architecture with two-stage re-initialization to explicitly deal with the initialization problem. At the global stage, given an image with a rough face detection result, the full face region is firstly re-initialized by a supervised spatial transformer network to a canonical shape state and then trained to regress a coarse landmark estimation. At the local stage, different face parts are further separately re-initialized to their own canonical shape states, followed by another regression subnetwork to get the final estimation. Our proposed deep architecture is trained from end to end and obtains promising results using different kinds of unstable initialization. It also achieves superior performances over many competing algorithms.

关键词： Face Shape computer architecture Robustness Detectors Machine learning

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Preliminary performance Evaluation of Application Kernels using ARM SVE with Multiple Vector Lengths

Preliminary Performance Evaluation of Application Kernels us...

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IEEE International conference on Cluster Computing (CLUSTER)

作者： Kodama, Yuetsu Odajima, Tetsuya Matsuda, Motohiko Tsuji, Miwako Lee, Jinpil Sato, Mitsuhisa RIKEN Adv Inst Computat Sci Kobe Hyogo Japan

ISBN: (纸本)9781538623268

Modern high performance processors are equipped with very wide SIMD instruction set. SVE (Scalable Vector Extension) is an ARM (R) SIMD technology that supports vector lengths from 128 bits to 2048 bits. One of its promising features is to offer "vector-length agnostic" programming to allow the same SVE code to run on hardware of any vector length without any modification of the code. This feature would be useful to explore the best vector length with appropriate hardware resources in the space of various combinations of hardware parameters in order to make more efficient use of hardware resources, since we can use the same vectorized SIMD code. In this paper, we report the performance of application kernels using ARM SVE with multiple vector lengths while keeping the hardware resource the same. We have confirmed that when the performance of the program is limited by a bottleneck of a long chain of arithmetic operations or instruction issues, the performance can be improved by increasing the vector length. However, it was necessary to prepare a sufficient number of physical registers for performance improvement, and when the number of physical registers was too small, it was found that with such a program, the performance might be reduced. When the performance is limited by memory access bandwidth to cache and memory, the vector length does not affect the performance significantly.

关键词： Registers Hardware Out of order computer architecture Kernel

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A Convergent Fixed-Point Proximity Algorithm Accelerated by FISTA for the 0 Sparse Recovery Problem

A Convergent Fixed-Point Proximity Algorithm Accelerated by ...

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International conference on Imaging, Vision and Learning Based on Optimization and PDEs, IVLOPDE 2016

作者： Zeng, Xueying Shen, Lixin Xu, Yuesheng School of Mathematical Sciences Ocean University of China Qingdao China Department of Mathematics Syracuse University SyracuseNY United States School of Data and Computer Science Guangdong Province Key Lab of Computational Science Sun Yat-sen University Guangzhou China Department of Mathematics and Statistics Old Dominion University NorfolkVA United States

ISBN: (纸本)9783642543005

We propose an approximation model of the original 0 minimization model arising from various sparse signal recovery problems. The objective function of the proposed model uses the Moreau envelope of the 0 norm to promote the sparsity of the signal in a tight framelet system. This leads to a non-convex optimization problem involved the 0 norm. We identify a local minimizer of the proposed non-convex optimization problem with a global minimizer of a related convex optimization problem. Based on this identification, we develop a two stage algorithm for solving the proposed non-convex optimization problem and study its convergence. Moreover, we show that FISTA can be employed to speed up the convergence rate of the proposed algorithm to reach the optimal convergence rate of O(1 ∕ k2). We present numerical results to confirm the theoretical estimate. © 2018, Springer International Publishing AG, part of Springer Nature.

关键词： Convex optimization

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