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检索条件"任意字段=Conference on Languages, Compilers and Tools for Embedded Systems"

共 834 条记录，以下是81-90 订阅

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SmartVisor: User-Friendly Hypervisor for Mobile Robots 25

SmartVisor: User-Friendly Hypervisor for Mobile Robots

引用

25th ACM SIGPLAN/SIGBED International conference on languages, compilers, and tools for embedded systems (LCTES)

作者： Chen, Guanyu Lv, Pan Li, Hong Yang, Guoqing Zhejiang Univ Hangzhou Peoples R China

ISBN: (纸本)9798400706165

With the increasing prevalence of mobile robots, there is a growing demand for powerful system software. Integrating multiple operating systems into a single platform has become necessary, and virtualization offers a cost-effective solution for managing multiple OSes. While several types of hypervisors for embedded systems have been proposed to manage guest OSes, significant work is still needed to make hypervisors applicable in robot systems. This paper introduces SmartVisor, a microkernel-based hypervisor designed explicitly for robotic systems. Our work focuses on designing the virtual machine management module to improve robot performance and user experience. The goal is to ensure that the hypervisor-based robot meets the demands of real-world scenarios for robot developers and users.

关键词： Virtualization embedded System Robot Operating System

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MinUn: Accurate ML Inference on Microcontrollers 2023

MinUn: Accurate ML Inference on Microcontrollers

引用

24th ACM SIGPLAN/SIGBED International conference on languages, compilers, and tools for embedded systems (LCTES)

作者： Jaiswal, Shikhar Goli, Rahul Kranti Kiran Kumar, Aayan Seshadri, Vivek Sharma, Rahul Microsoft Res Bengaluru India Univ Toronto Toronto ON Canada Swiss Fed Inst Technol Zurich Switzerland Linea Labs Inc San Francisco CA USA

ISBN: (纸本)9798400701740

Running machine learning inference on tiny devices, known as TinyML, is an emerging research area. This task requires generating inference code that uses memory frugally, a task that standard ML frameworks are ill-suited for. A deployment framework for TinyML must a) be parametric in the number representation to take advantage of the emerging representations like posits, b) carefully assign high-precision to a few tensors so that most tensors can be kept in low-precision while still maintaining model accuracy, and c) avoid memory fragmentation. We describe MinUn, the first TinyML framework that holistically addresses these issues to generate efficient code for ARM microcontrollers (e.g., Arduino Uno, Due and STM32H747) that outperforms the prior TinyML

关键词： TinyML Memory Management Programming languages compilers Number Representations embedded Devices

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embedded systems in the wild: ZebraNet software, hardware, and deployment experiences 06

Embedded systems in the wild: ZebraNet software, hardware, a...

引用

LCTES 2006 - 2006 ACM SIGPLAN/SIGBED conference on languages, compilers, and tools for embedded systems

作者： Martonosi, Margaret Princeton University

ISBN: (纸本)159593362X

The Princeton ZebraNet project is a collaboration of engineers and biologists to build mobile, wireless embedded systems for wildlife tracking. Over the lifetime of the project, we have implemented a number of compression, communication, and data management algorithms specifically tailored for the small memory, constrained energy and sparse connectivity of these long-lifetime systems. We have gone through three major generations of hardware and software implementations, and have done two successful real-world deployments on Plains Zebras in Kenya, with a third deployment planned for Summer, 2007. In this talk, I will discuss our real-life experiences with Grafting embedded systems hardware and software, and our deployment experiences in Africa. I will also put forward a vision for how portability, reliability, and energy-efficiency can be well-supported in future embedded systems.

关键词： embedded systems

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Integrating safety analysis into the model-based development toolchain of automotive embedded systems 10

Integrating safety analysis into the model-based development...

引用

ACM SIGPLAN/SIGBED conference on languages, compilers and tools for embedded systems, LCTES 2010

作者： Biehl, Matthias DeJiu, Chen Törngren, Martin Stockholm Sweden

ISBN: (纸本)9781605589534

The automotive industry has a growing demand for the seamless integration of safety analysis tools into the model-based development toolchain for embedded systems. This requires translating concepts of the automotive domain to the safety domain. We automate such a translation between the automotive architecture description language EAST-ADL2 and the safety analysis tool HiP-HOPS by using model transformations and by leveraging the advantages of different model transformation techniques. Through this integration, the analysis can be conducted early in the development process, when the system can be redesigned to fulfill safety goals with relatively low effort and cost. © 2010 ACM.

关键词： Automotive industry

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Energy-conserving feedback EDF scheduling for embedded systems with real-time constraints 02

Energy-conserving feedback EDF scheduling for embedded syste...

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Joint conference on languages, compilers and tools for Embeddded systems/Software and compilers for embedded systems (LCTES 02-SCOPES 02)

作者： Dudani, A Mueller, F Zhu, YF N Carolina State Univ Dept Comp Sci Ctr Embedded Syst Res Raleigh NC 27695 USA

ISBN: (纸本)9781581135275

embedded systems have limited energy resources. Hence, they should conserve these resources to extend their period of operation. Recently, dynamic frequency scaling (DFS) and dynamic voltage scaling (DVS) have been added to a various embedded processors as a means to increase battery life. A number of scheduling techniques have been developed to exploit DFS and DVS for real-time systems to reduce energy consumption. These techniques exploit idle and slack time of a schedule. Idle time can be consumed by lowering the processor frequency of selected tasks while slack time allows later tasks to execute at lower frequencies with reduced voltage demands. Our work delivers energy savings beyond the level of prior work. We enhance the earliest-deadline first (EDF) scheduling to exploit slack time generated by the invocation of the task at multiple frequency levels within the same invocation. The technique relies strictly on operating system support within the scheduler to implement the approach. Early scaling at a low frequency, determined by a feedback mechanism and facilitated by a slack-passing scheme, capitalizes on high probabilities of a task to finish its execution without utilizing its worst-case execution budget. If a task does not complete at a certain point in time within its low frequency range, the remainder of it continues to execute at a higher frequency. Our experiments demonstrate that the resulting energy savings exceed those of previously published work by up to 33%. In addition, our method only adds a constant complexity at each scheduling point, which has not been achieved by prior work, to the best of our knowledge.

关键词： real-time systems scheduling dynamic voltage scaling

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Energy-efficient policies for embedded clusters 05

Energy-efficient policies for embedded clusters

引用

conference on languages, compilers and tools for embedded systems

作者： Xu, RB Zhu, DK Rusu, C Melhem, R Mossé, D Univ Pittsburgh Dept Comp Sci Pittsburgh PA 15260 USA

ISBN: (纸本)9781595930187

Power conservation has become a key design issue for many systems, including clusters deployed for embedded systems, where power availability ultimately determines system lifetime. These clusters execute a high rate of requests of highly-variable length, such as in satellite-based multiprocessor systems. The goal of power management in such systems is to minimize the aggregate energy consumption of the whole cluster while ensuring timely responses to requests. In the past, dynamic voltage scaling (DVS) and on/off schemes have been studied under the assumptions of continuously tunable processor frequencies and perfect load-balancing. In this work, we focus on the more realistic case of discrete processor frequencies and propose a new policy that adjusts the number of active nodes based on the system load, not system frequency. We also design a threshold scheme which prevents the system from reacting to short-lived temporary workload changes in the presence of unstable incoming workload. Simulation and implementation results on real hardware show that our policy is very effective in reducing the overall power consumption of clusters executing embedded applications.

关键词： dynamic voltage scaling load balancing space applications distributed systems cluster computing

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Optimizing Tensor Contractions for embedded Devices with Racetrack Memory Scratch-Pads 2019

Optimizing Tensor Contractions for Embedded Devices with Rac...

引用

20th International conference on languages, compilers, and tools for embedded systems (LCTES)

作者： Khan, Asif Ali Rink, Norman A. Hameed, Fazal Castrillon, Jeronimo Tech Univ Dresden Dresden Germany

ISBN: (纸本)9781450367240

Tensor contraction is a fundamental operation in many algorithms with a plethora of applications ranging from quantum chemistry over fluid dynamics and image processing to machine learning. The performance of tensor computations critically depends on the efficient utilization of on-chip memories. In the context of low-power embedded devices, efficient management of the memory space becomes even more crucial, in order to meet energy constraints. This work aims at investigating strategies for performance- and energy-efficient tensor contractions on embedded systems, using racetrack memory (RTM)-based scratch-pad memory (SPM). Compiler optimizations such as the loop access order and data layout transformations paired with architectural optimizations such as prefetching and preshifting are employed to reduce the shifting overhead in RTMs. Experimental results demonstrate that the proposed optimizations improve the SPM performance and energy consumption by 24% and 74% respectively compared to an iso-capacity SRAM.

关键词： Compiler optimization data transformation tensors tensor contraction matrix multiplication racetrack memory preshifting prefetching embedded systems

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A retargetable register allocation framework for embedded processors 04

A retargetable register allocation framework for embedded pr...

引用

Proceedings of the ACM SIGPLAN/SIGBED conference on languages, compilers, and tools for embedded systems (LCTES'04)

作者： Daveau, Jean-Marc Thery, Thomas Lepley, Thierry Santana, Miguel STMicroelectronics Central R and D Embedded System Technology 850 Rue Jean Monnet F-38926 Crolles cedex France

ISBN: (纸本)9781581138061

This paper describes the FlexCC2 register allocation framework. FlexCC2 is an optimizing retargetable C compiler for embedded processors, and in particular for DSP processors. embedded processors often contain features such as irregular and constrained register sets that complicate register allocation, making traditional methods inefficient. In this paper, we present a register allocation framework specifically tailored for embedded processor specificities. This framework has been integrated in the FlexCC2 production compiler and is used by FlexCC2 customers.

关键词： embedded systems

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Synchronous Programming of Device Drivers for Global Resource Control in embedded Operating systems 11

Synchronous Programming of Device Drivers for Global Resourc...

引用

ACM SIGPLAN/SIGBED conference on languages compilers, tools, and Theory for embedded systems (LCTES 2011)

作者： Berthier, Nicolas Maraninchi, Florence Mounier, Laurent UJF Verimag CNRS Verimag Acad Res Lab Rome Italy

ISBN: (纸本)9781450305556

In embedded systems, controlling a shared resource like the bus, or improving a property like power consumption, may be hard to achieve when programming device drivers individually. There is a need for global resource control, taking decisions based on a centralized view of the devices' states. In this paper, we study power consumption in sensor networks, where the nodes are small embedded systems powered by batteries. We concentrate on the hardware/software architecture of a node, where significant gains can be achieved by controlling the consumption modes of the various devices globally. The architecture we propose involves a simple adaptation of the application level, to communicate with the hardware via a control layer. The control layer itself is built from a set of simple automata: the drivers of the devices, whose states correspond to power consumption modes, and a controller that enforces global properties. All these automata are programmed using a synchronous language, whose compiler performs static scheduling and produces a single piece of C code. We explain the approach in details, demonstrate its use with either Contiki or a traditional multithreading operating system, and report on our experiments.

关键词： Synchronous Paradigm Automated Control Power-Aware Implementation Wireless Sensor Networks

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Scalable precision cache analysis for preemptive scheduling 05

Scalable precision cache analysis for preemptive scheduling

引用

conference on languages, compilers and tools for embedded systems

作者： Staschulat, J Ernst, R Tech Univ Braunschweig D-38106 Braunschweig Germany

ISBN: (纸本)9781595930187

Accurate timing analysis is key to efficient embedded system synthesis and integration. Caches are needed to increase the processor performance but they are hard to use because of their complex behavior especially in preemptive scheduling. Current approaches use simplified assumptions or propose exponentially complex analysis algorithms to bound the cache related preemption delay at a context switch. Existing approaches consider only direct mapped caches or propose non conservative approximation for set associative caches. In this paper we propose a novel cache related preemption delay analysis for set-associative instruction caches where the designer can adjust the analysis precision by scaling the problem complexity. Furthermore, this precise preemption delay analysis is integrated into a scheduling analysis to determine the response time of tasks accurately. In experiments we evaluate this tradeoff between analysis precision and analysis time. The results show an improvement of 22 %-71 % in analysis precision of cache related preemption delay and 5 %-21 % in response time analysis compared to previous conservative approaches.

关键词： worst case execution time analysis cache embedded systems scheduling

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