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检索条件"任意字段=Conference on Parallel Processing for Imaging Applications"

共 765 条记录，以下是131-140 订阅

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imaging Using the Transverse Field of a parallel Transmission Line

Imaging Using the Transverse Field of a Parallel Transmissio...

引用

IEEE conference on Antenna Measurements (CAMA)

作者： Woodhead, Ian Platt, Ian Tan, Adrian Lincoln Univ Lincoln Agritech Ltd Christchurch New Zealand

ISBN: (纸本)9781467391498

The transverse field resulting from a pulse propagating along a parallel transmission line can be used to image changes in the dielectric permittivity of material samples adjacent to it. This Time Domain Reflectometry approach enables a non-contact probe to be rapidly scanned across surfaces such as roads, timber and concrete to determine the subsurface moisture content. Two examples of applying this probe - timber processing and road maintenance - in industrial applications are presented.

关键词： TDR transverse field transmission line moisture waveguide timber road

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parallelization and performance of 3D ultrasound imaging beamforming algorithms on modern clusters

Parallelization and performance of 3D ultrasound imaging bea...

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conference Proceedings of the 2002 International conference on Supercomputing

作者： Zhang, Fan Bilas, A. Dhanantwari, Amar Plataniotis, Kostas N. Abiprojo, Robert Stergiopoulos, Stergios Dept. of Electrical and Comp. Eng. University of Toronto 10 King's College Road Toronto Ont. M5S3G4 Canada

Recently there has been a lot of interest in improving the infrastructure used in medical applications. In particular, there is renewed interest on non-invasive, high-resolution diagnostic methods. One such method is digital, 3D ultrasound medical imaging. Current state-of-the-art ultrasound systems use specialized hardware for performing advanced processing of input data to improve the quality of the generated images. Such systems are limited in their capabilities by the underlying computing architecture and they tend to be expensive due to the specialized nature of the solutions they employ. Our goal in this work is twofold: (i) To understand the behavior of this class of emerging medical applications in order to provide an efficient parallel implementation and (ii) to introduce a new benchmark for parallel computer architectures from a novel and important class of applications. We address the limitations faced by modern ultrasound systems by investigating how all processing required by advanced beamforming algorithms can be performed on modern clusters of high-end PCs connected with low-latency, high-bandwidth system area networks. We investigate the computational characteristics of a state-of-the-art algorithm and demonstrate that today's commodity architectures are capable of providing almost-real-time performance without compromising image quality significantly.

关键词： parallel processing systems

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Capturing a black cat in shade: The past and present of Retinex color appearance models

Capturing a black cat in shade: The past and present of Reti...

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conference on Human Vision and Electronic imaging VII

作者： McCann, JJ McCann Imaging Belmont MA 02478 USA

ISBN: (纸本)0819444022

As a part of the Symposium "Retinex at 40", this paper recounts the research on capturing real-life scenes, calculating appearances and rendering sensations on film, and other limited dynamic-range media. It describes: the first patents, a hardware display used in Land's Ives Medal Address in 1968, the first computer simulations using 20 by 24 pixel arrays, psychophysical experiments and computational models of color constancy and dynamic range compression and the Frankle-McCann computationally efficient Retinex image processing of 512 by 512 images. It will include several modifications of the approach including recent modifications and gamut-mapping applications. This paper emphasizes the need for parallel studies of psychophysical measurements of human vision and computational models of imaging systems.

关键词： Retinex model of lightness pyramid processing

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Distributed Execution of Transmural Electrophysiological imaging with CPU, GPU, and FPGA

Distributed Execution of Transmural Electrophysiological Ima...

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International conference on Reconfigurable Computing and FPGAs (ReConFig)

作者： Skalicky, Sam Lopez, Sonia Lukowiak, Marcin Rochester Inst Technol Dept Comp Engn Rochester NY 14623 USA

ISBN: (纸本)9781479920785

One of the main challenges of using cutting edge medical imaging applications in the clinical setting is the large amount of data processing required. Many of these applications are based on linear algebra computations operating on large data sizes and their execution may require days in a standard CPU. Distributed heterogeneous systems are capable of improving the performance of applications by using the right computation-to-hardware mapping. To achieve high performance, hardware platforms are chosen to satisfy the needs of each computation with corresponding architectural features such as clock speed, number of parallel computational units, and memory bandwidth. In this paper we evaluate the performance benefits of using different hardware platforms to accelerate the execution of a transmural electrophysiological imaging algorithm, targeting a standard CPU with GPU and FPGA accelerators. Using this cutting edge medical imaging application as a case study, we demonstrate the importance of making intelligent computation assignments for improved performance. We show that, depending on the size of the data structures the application works with, the usage of an FPGA to run certain computations can make a big difference: a heterogeneous system with all three hardware platforms (CPU+GPU+FPGA) can cut the execution time by half, compared to the best result using one single accelerator (CPU+GPU). In addition, our experimental results show that combining CPU, GPU, and FPGA platforms in a single system achieves a speedup of up to 62x, 2x, and 1605x compared to systems with a single CPU, GPU, or FPGA platform respectively.

关键词： Field programmable gate arrays Hardware Platform central processing units Legal Executions GRAPPER PICK UP Graphics processing Unit execution time dimensional data memory bandwidth Linear algebra Speeding

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Real-time VLSI techniques for processing of computer images 19

Real-time VLSI techniques for processing of computer images

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conference on applications of Digital Image processing XIX

作者： Farroha, BS Deshmukh, RG Florida Institute of Technology (United States)

ISBN: (纸本)0819422355

The domain of industrial automation has been of heightened interest since the introduction of robotic vision in the work place. The system discussed in this abstract is designed to be utilized in the areas of machine and robotic vision for the industrial field. It can serve as an inspection or location finding device for real-time closed loop automated systems, The performance advantage of this system is gained through the use of a massively parallel architecture. The system is built on a VLSI wafer, where the concept of a full application specific system is fabricated on a chip. These design techniques take advantage of massive parallel hardware at the lower stages of image processing whereby increasing the performance of this stage can significantly improve the total throughput of the system. The design procedure is based on custom ASIC hardware that is optimized for the task at hand. Additionally, the elements have been designed in a modular and reusable manner. The processing of system data is accomplished primarily, by parallel hardware units, with firmware assigned the responsibility of configuring and defining the task. This system incorporates the design theorems of image processing with the fundamentals of high speed architectures. This design technique, in conjunction with parallel processing principles, will overcome the current time limitations that have been persistent in the current approaches. The system is designed with three functional layers, each composed of parallel architectures and local control. A main control system is also present to monitor overall system functionality and issue queuing commands for the processes, in a non-blocking manner. The proposed system theory and design will be presented with the VLSI layout, simulation and modeling with the CADENCE design environment. Test results and prototype examples are used to determine the success of the system and test it's limitations.

关键词： VLSI architecture image processing robotic vision massive parallel processing real-time imaging

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A design methodology for hardware acceleration of adaptive filter algorithms in image processing

A design methodology for hardware acceleration of adaptive f...

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17th IEEE International conference on Application-Specific Systems, Architectures and Processors

作者： Dutta, Hritam Hannig, Frank Teich, Juergen Heigl, Benno Hornegger, Heinz Univ Erlangen Nurnberg Dept Comp Sci 12 D-8520 Erlangen Germany Siemens AG Med Solut Forchheim Germany

ISBN: (纸本)0769526829

Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a state-of-the-art algorithm in medical imaging, which falls in the class of 2D adaptive filter algorithms. In this paper we propose a semi-automatic mapping methodology for the generation of hardware accelerators for such a generic class of adaptive filtering applications in image processing. The final architecture deliver similar synthesis results as a hand-tuned design.

关键词： Image processing

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Fast ARFTIS Reconstruction Algorithms Using CUDA

Fast ARFTIS Reconstruction Algorithms Using CUDA

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2nd International conference on High Performance Computing and applications

作者： Cui, Deqi Liao, Ningfang Wu, Wenmin Tan, Boneng Lin, Yu Beijing Inst Technol Dept Opt & Elect Engn Beijing 100081 Peoples R China

ISBN: (纸本)9783642118418

In order to realize the fast reconstruction processing of all-reflective Fourier Transform imaging Spectrometer (ARFTIS) data, the authors implement reconstruction algorithms on GPU using Compute Unified Device Architecture (CUDA). We use both CUDA IDFFT library and customization CUDA parallel kernel to accelerate the spectrum reconstruction processing of ARFTIS. The results show that the CUDA can drive hundreds of processing elements ('many-core' processors) of GPU hardware and can enhance the efficiency of spectrum reconstruction processing significantly. Farther, computer with CUDA graphic cards will implement real-time data reconstruction of ARFTIS alone.

关键词： ARFTIS Reconstruction CUDA parallel

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Quality Map guided parallel Phase unwrapping algorithm for multi-lateral shearing interferometry

Quality Map guided parallel Phase unwrapping algorithm for m...

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Optical Technology and Measurement for Industrial applications conference

作者： Wang, Liang Liu, Ke Li, Yanqiu Beijing Inst Technol Sch Opt & Photon Minist Educ China Key Lab Photoelect Imaging Technol & Syst 5 South Zhongguancun St Beijing 100081 Peoples R China

ISBN: (数字)9781510647237

ISBN: (纸本)9781510647237;9781510647220

Good robustness and fast processing speed are the two main aspects of phase unwrapping algorithm for two-dimensional interferogram. Multi-lateral shearing interferometry requires the use of multidirectional differential wavefronts to reconstruct the wavefront to be measured, which leads to higher requirements on the phase unwrapping speed of the interferogram. The quality map guided algorithm is a reliable algorithm in the phase unwrapping of two-dimensional interferogram. In this paper, the computer unified device architecture (CUDA) programming platform is used to realize the parallel processing of the phase derivative variance map, the maximum phase gradient map, and the pseudo-correlation quality map, in order to improve the speed of phase unwrapping. parallel calculations are respectively performed on the variance of the wrapped phase gradient in the horizontal and vertical directions in the phase derivative variance map, the wrapped phase gradient in the horizontal and vertical directions of the maximum phase gradient map, and the sine and cosine values of the wrapped phase in the pseudo-correlation quality map. Finally, the CUDA instructions are used to distribute the calculation task and complete the parallel calculation of the quality map. The computer-generated multi-lateral shearing interferograms are used for simulation analysis. The results show that for the same interferogram of 512x512 pixels, the processing speed can be approximately increased by 3 times on the Graphics processing Unit (GPU) by performing parallel calculation to generate the quality maps. The fastest parallel processing time is 7.34ms for generating the derivative variance map. As the number of pixels increases, GPU processing speed becomes more advantageous, far exceeding that of CPU. Using the self-made quadriwave lateral shearing interferometer, the speed and accuracy of the three quality map guided phase unwrapping algorithms are compared and analyzed. The experimental results sh

关键词： lateral shearing interferometry quality map phase unwrapping parallel processing

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Image registration techniques using parallel computing in multicore environment and its applications in medical imaging: An overview 5

Image registration techniques using parallel computing in mu...

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5th IEEE International conference on Computer and Communication Technology, ICCCT 2014

作者： Saxena, Sanjay Sharma, Shiru Sharma, Neeraj Varanasi UP India

ISBN: (纸本)9781479967575

Image Registration is the key step of Image processing as it is the process to locate most accurate relative orientation among two or more images, captured at the same or different times by distinguishable or indistinguishable sensors to increase the information content. For speed optimization of Image Registration, There have been developed numerous approaches till now based on CPU platforms, GPU, CUDA Programming Models etc. Purpose of this paper is to provide a comprehensive review of the existing literature available on Image registration methods based on parallel computing in Multi core architecture. Another considerable intention of this paper is to describe the various applications of image registration using parallel computing in Medical imaging as it can be applied for different modalities of medical images. © 2014 IEEE.

关键词： Image registration

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Efficient grayscale thinning on parallel hardware 28

Efficient grayscale thinning on parallel hardware

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28th International conference on Computer applications in Industry and Engineering, CAINE 2015

作者： Weiss, John M. Karlsson, Christer Department of Mathematics and Computer Science South Dakota School of Mines and Technology Rapid CitySD57701-3995 United States

ISBN: (纸本)9781510812284

Thinning is an important task in many image processing applications, including remote sensing, photogrammetry, optical character recognition, and medical imaging. In this study, we compare the performance of thinning algorithms on parallel hardware. Grayscale thinning involves a substantial amount of computation per pixel, and may be accelerated in several ways: algorithmic improvements, code optimization, and parallelization. We describe an algorithmic improvement that speeds up grayscale thinning several-fold, and demonstrate scalable acceleration from multi-core CPU concurrency libraries (such as OpenMP), coprocessor hardware (such as the Xeon Phi), and GPUS (such as CUDA-enabled NVIDIA graphics cards). GPU processing appears to offer the most cost-effective approach for high performance grayscale thinning applications.

关键词： Cost effectiveness

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