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检索条件"任意字段=Conference on Parallel Processing for Imaging Applications"

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Platform characterization for Domain-Specific Computing

Platform characterization for Domain-Specific Computing

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Asia and South Pacific Design Automation conference

作者： Alex Bui Kwang-Ting Cheng Jason Cong Luminita Vese Yi-Chu Wang Bo Yuan Yi Zou Department of Radiological Sciences University of California Los Angeles CA USA Department of Electrical and Computer Engineering University of California Santa Barbara CA USA Department of Computer Science University of California Los Angeles CA USA Department of Mathematics University of California Los Angeles CA USA

We believe that by adapting architectures to fit the requirements of a given application domain, we can significantly improve the efficiency of computation. To validate the idea for our application domain, we evaluate a wide spectrum of commodity computing platforms to quantify the potential benefits of heterogeneity and customization for the domain-specific applications. In particular, we choose medical imaging as the application domain for investigation, and study the application performance and energy efficiency across a diverse set of commodity hardware platforms, such as general-purpose multi-core CPUs, massive parallel many-core GPUs, low-power mobile CPUs and fine-grain customizable FPGAs. This study leads to a number of interesting observations that can be used to guide further development of domain-specific architectures.

关键词： Image reconstruction Biomedical imaging Graphics processing unit USA Councils Image segmentation Measurement

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A parallel hierarchical tensor product method for n-dimensional interpolation in the Fourier domain

A parallel hierarchical tensor product method for n-dimensio...

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International conference on Electrical, Control and Instrumentation Engineering (ICECIE)

作者： Hsin-Chia Chen Hao Chiao Yang Yu-Chieh Chao Julian Nicholls Jyh-Miin Lin Chih-Ching Chen Wei-Hsuan Yu Feng-Nan Hwang Madou Sin-Lau Hospital Tainan Taiwan Robinson College University of Cambridge Cambridge UK Chung Yuan Christian University Chung Li Taiwan R.O.C National Central University Taoyuan Taiwan

ISBN: (纸本)9781665449670

parallel multi-dimensional interpolation in the complex Fourier domain (also known as the non-uniform fast Fourier transform) encounters major challenges, due to computation issues such as increasing computation complexity and space complexity. For instance, the contemporary graphics processing unit (GPU) is limited by the relatively small memory size and the increasing size of the interpolator. This issue makes multidimensional Fourier domain interpolation problematic, while finding an optimized configuration remains an unsolved challenge in industrial applications, e.g. magnetic resonance imaging (MRI) or computerized tomography. To enhance the performance of multi-dimensional interpolation on GPU, a new parallel hierarchical tensor products tree approach is proposed. The method combines the composite 1D interpolators under the limitation imposed by the memory size of the device. The resultant run-time performance on the GPU varies with different configurations. The best-tuned method is 2.52-4.98× faster than the compressed sparse row (CSR) on the discrete GPU and 4.16-9.59× faster than CSR on the integrated GPU. The hierarchical tensor product interpolation is used to compute the multi-dimensional nonuniform fast Fourier transform. An acceleration of 30× was achieved in 3D MRI reconstruction.

关键词： Performance evaluation Interpolation Tensors Three-dimensional displays Fast Fourier transforms Magnetic resonance imaging Instruments

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Fast 3D Object Alignment from Depth Image with 3D Fourier Moment Matching on GPU

Fast 3D Object Alignment from Depth Image with 3D Fourier Mo...

引用

International conference on 3D imaging, Modeling, processing, Visualization and Transmission (3DIMPVT)

作者： Hong-Ren Su Hao-Yuan Kuo Shang-Hong Lai Chin-Chia Wu Institute of Information Systems and Applications National Tsing Hua University Hsinchu Taiwan Dept. of Computer Science National Tsing Hua University Hsinchu Taiwan

In this paper, we develop a fast and accurate 3D object alignment system which can be applied to detect objects and estimate their 3D pose from a depth image containing cluttered background. The proposed 3D alignment system consists of two main algorithms: the first is the 3D detection algorithm to detect the top-level object from a depth map of the cluttered 3D objects, and the second is the 3D Fourier based point-set alignment algorithm to estimate the 3D object pose from an input depth image. We also implement the proposed 3D alignment algorithm on a GPU computing platform to speed up the computation of the object detection and Fourier-based image alignment algorithms in order to align the 3D object in real time.

关键词： Three-dimensional displays Graphics processing units Image segmentation Object detection Fourier transforms parallel processing

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parallel computing methods for X-ray cone beam tomography with large array sizes

Parallel computing methods for X-ray cone beam tomography wi...

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IEEE Symposium on Nuclear Science (NSS/MIC)

作者： D.A. Reimann M.J. Flynn V. Chaudhary I.K. Sethi Department of Diagnostic Radiology Henry Ford Health System Detroit USA Electrical and Computer Engineering Department Wayne State University Detroit USA Department Mathematics Albion College Albion MI USA Computer Science Department Wayne State University Detroit USA

Cone beam geometries are increasingly of interest for X-ray CT applications to improve imaging efficiency. In this paper, we describe our practical experience implementing circular orbit cone beam backprojection on workstation clusters. The reconstruction problem is computationally intensive, particularly for arrays of 512 voxels in each direction. A voxel driven approach is described where the reconstruction volume is partitioned into variable width slabs and each slab given to a workstation. Each projection is filtered by one workstation and then sent to the others for backprojection. While most computation is done in the backprojection step, a significant amount of time must be spent in sending projectional data. A method is detailed to further reduce the communication overhead by restricting the amount of projection sent to only what is required by each backprojecting workstation. Furthermore, if the shape of the backprojection slabs is made as square as possible, the total communication requirement can be minimized. By reduction of the communication requirement, an overall improvement in processor utilization was observed, and the crossover point where communication dominates was improved.

关键词： parallel processing X-ray imaging Computed tomography Image reconstruction Workstations Slabs Hardware Shape Geometry Biological materials

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A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applications

A fixed-point multimedia coprocessor with 50Mvertices/s prog...

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European conference on Solid-State Circuits (ESSCIRC)

作者： Ju-Ho Sohn Jeong-Ho Woo Ramchan Woo Hoi-Jun Yoo Semiconductor System Laboratory Department of EECS Korea Advanced Institute of Science and Technology Daejeon South Korea Imaging and Audio Group Texas Instruments Inc. Dallas TX USA

A fixed-point multimedia coprocessor is designed and integrated into an ARM-10 based mobile graphics processor for portable 2D and 3D multimedia applications. The user-programmable SIMD vertex shader with ARM-10 co-processor architecture realizes advanced 3D graphics algorithms and various multimedia functions. Different from conventional ARM coprocessor architecture, the multimedia coprocessor implements dual operations, by which parallel and streaming multimedia processing is enabled in mobile applications. For low power consumption, fixed-point SIMD datapath is designed with instruction-wise clock gating. The co-processor takes 10.2mm/sup 2/ in 0.18/spl mu/m 6-metal standard CMOS logic process and achieves 50Mvertices/s graphics performance with 75.4mW power consumption.

关键词： Coprocessors Graphics Streaming media Multimedia systems Energy consumption Hardware Buffer storage Fixed-point arithmetic Circuits Displays

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20-24bit Ultra-high Resolution parallel Readout Photon Counting ASIC for Hybrid X-ray Detectors

20-24bit Ultra-high Resolution Parallel Readout Photon Count...

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IEEE Nuclear Science Symposium

作者： S. Y. Soh J. H. Park K. S. Hong A. Han Y. J. Kim M. J. Soh Luxen Technologies Inc. SoC Lab Seoul Republic of Korea

This paper summarizes progress of development of LXT-RXP03BM0, an ultra-high resolution 20/24bit parallel readout photon counting ASIC for hybrid type X-ray imaging devices. Each pixel adopts a programmable 24bit Linear Feedback Shift Register (LFSR), and operates in alternating counting and readout modes. Each data bit is relayed to the corresponding LFSR of adjacent pixel in parallel, and the resolution can be adjusted to 20bit if faster data reading out is required. The chip core is comprised of a matrix arrayed single pixels, which are capable of detecting and discriminating incoming photoelectric signals from photo sensor. Periphery digital control blocks and a column addressing block are embedded within the IC to generate various necessary control signals, and data readout. A single pixel is equipped with a programmable CSA, a programmable 20/24bit LFSR, and data transfer logics. The image resolution can be controlled by setting each LFSR to either 20bit or 24bit depending on applications. The CSA can operate at two different gain modes: typical gain and high gain, to widen the input dynamic range of the ASIC. Degree of amplification is determined by the ratio of embedded feedback components such as capacitors and resisters that are controlled by switches in accordance with an external digital gain selection signal. Data processing is done in digital, for discrete data reading out. The data acquired from a pixel counter is transferred to a next corresponding counter, pixel-to-pixel, bit-to-bit basis. The data come out in 20 or 24bit parallel. The LXT-RXP03BM0 is a prototype chip, designed and manufactured in a 6-metal 0.18μm CMOS technology. The chip is being tested, and a revision chip will be out in near future.

关键词： Photonics Radiation detectors Image resolution Data transfer Detectors X-ray imaging Testing

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An Efficient and Highly parallel Hyperspectral Imagery Compression Scheme Based on Distributed Source Coding

An Efficient and Highly Parallel Hyperspectral Imagery Compr...

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Asilomar conference on Signals, Systems & Computers

作者： Ngai-Man Cheung Antonio Ortega Signal and Image Processing Institute Ming Hsieh Department of Electrical Engineering University of Southern California Los Angeles CA USA

This paper extends our previous work on hyperspectral imagery compression based on distributed source coding (DSC). We apply DSC principles to facilitate efficient parallel encoder implementations with moderate memory requirement. Based on our previously proposed wavelet-based DSC framework, we propose a novel adaptive coding scheme that judiciously combines DSC and intra coding tools, taking into account the source statistics and inter-band correlation, as well as the coding gains and limitations imposed by tools. Bits extracted from wavelet coefficients tend to have different statistics and inter-band correlation at different significance levels and in different wavelet subbands. Therefore, it is non-trivial to determine the optimal coding strategy. Toward this we propose modeling techniques to estimate the performance of DSC/intra coding under different bits extraction scenarios. This model is used to define adaptive coding strategies that can optimally incorporate different bit- extraction techniques with DSC/intra coding tools according to the bit significance levels and wavelet subbands. Experimental results demonstrate that adaptive coding can achieve up to 4dB improvement over a non-adaptive system, and the improved DSC-based system is comparable to some 3D wavelet system in terms of coding performance. While we focus on hyperspectral images in this paper, many of the proposed techniques are applicable to other wavelet- based DSC image and video applications.

关键词： Hyperspectral imaging Image coding Source coding Adaptive coding Wavelet coefficients Statistics Decoding Filtering Memory management Signal processing

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Incorporating memory layout in the modeling of message passing programs

Incorporating memory layout in the modeling of message passi...

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Euromicro conference on parallel, Distributed and Network-Based processing

作者： F.J. Seinstra D. Koelma Intelligent Sensory Information Systems Faculty of Science University of Amsterdam Amsterdam Netherlands

ISBN: (纸本)0769514448

One of the most fundamental tasks of an automatic parallelization tool is to find an optimal domain decomposition for a given application. For regular domain problems (such as simple matrix manipulations) this task may seem trivial. However, communication costs in message passing programs often significantly depend on the memory layout of data blocks to be transmitted. As a consequence, straightforward domain decompositions may be non-optimal. In this paper we introduce a new point-to-point communication model (called P-3PC) that is specifically designed to overcome this problem. In comparison with related models (e.g., LogGP) P-3PC is similar in complexity, but more accurate in many situations. Although the model is aimed at MPI's standard point-to-point operations, it is applicable to similar message passing definitions as well. The effectiveness of the model is tested in a framework for automatic parallelization of imaging applications. Experiments are performed on two Beowulf-type systems, each having a different interconnection network, and a different MPI implementation. Results show that, where other models frequently fail, P-3PC correctly predicts the communication costs related to any type of domain decomposition.

关键词： Message passing Costs Predictive models Image processing Intelligent systems Intelligent sensors Information systems Matrix decomposition Automatic testing Multiprocessor interconnection networks

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High dimension CNF to DNF conversion using grid computing in parallel

High dimension CNF to DNF conversion using grid computing in...

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Recent Advances and Innovations in Engineering (ICRAIE)

作者： Bashirahamed F. Momin Mayuresh S. Pardeshi Department of Computer Science and Engineering Walchand College of Engineering Sangli M.H India

CNF to DNF Conversion is considered as vast area of research by scientists for PLA's, circuit designs, FPGA's, artificial intelligence, etc. High dimension variable conversion has become a key demand in the current business standard. Various applications are in its requirement like gnome analysis, grid computing, bioinformatics, imaging system, rough sets requires higher variable processing algorithm. Problem statement is - Design and implementation of High dimension optimal conjunctive normal form to optimal (prime implicants) disjunctive normal form conversion which is an “NP hard problem conversion to an NP complete”. Thus CNF to DNF can only be considered to evaluate best performance for higher variable processing on high end systems. The best-known representations of Boolean functions f are those as disjunctions of terms (DNFs) and as conjunctions of clauses (CNFs). It is convenient to define the DNF size off as the minimal number of terms in a DNF representing f and the CNF size as the minimal number of clauses in a CNF representing f.

关键词： Programmable logic arrays Software Software algorithms Blood Skin

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On chip implementation of a pixel-parallel approach for retinal vessel tree extraction

On chip implementation of a pixel-parallel approach for reti...

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European conference on Circuit Theory and Design, ECCTD

作者： C. Alonso-Montes P. Dudek D. L. Vilarino M. G. Penedo Dept. of Computer Science Univ. A Coruña SPAIN Dept. of Electrical and Electronics Engineering Univ. Manchester UK Dept. of Electronics and Computer Science Univ. Santiago de Compostela SPAIN

Retinal vessel tree extraction from angiography images plays an important role not only in the medical domain, but also in biometric identification applications. From the image processing point of view, many algorithms and strategies have been developed to deal with this topic. Although reliable results have been obtained, the main disadvantage in most of these proposals is still the high computation effort required. In this paper, a methodology to extract the retinal vessel tree has been developed, specially defined in terms of fine grain SIMD processing with the purpose of improving the computation time. The proposal has been implemented on a cellular processor array VLSI chip. The execution times for the main modules of the proposed algorithm have been included to show its capability.

关键词： Retinal vessels Proposals Computer science Active contours Biomedical imaging Very large scale integration Cellular neural networks Machine vision Pixel Biomedical engineering

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