distributed execution of real-time data analytics such as event stream processing is the key to scalability, performance and reliable detection of situation changes. Although real-time analytics is highly I/O centric,...
详细信息
Multi-view hashing efficiently integrates multi-view data for learning compact hash codes, and achieves impressive large-scale retrieval performance. In real-world applications, multi-view data are often stored or col...
详细信息
ISBN:
(纸本)9781728163956
Multi-view hashing efficiently integrates multi-view data for learning compact hash codes, and achieves impressive large-scale retrieval performance. In real-world applications, multi-view data are often stored or collected in different locations, where hash code learning is more challenging yet less studied. To fulfill this gap, this paper proposes a novel supervised multi-view distributed hashing (SMvDisH) for hash code learning from multi-view data in a distributed manner. SMvDisH yields the discriminative latent hash codes by joint learning of latent factor model and classifier. With local consistency assumption among neighbor nodes, the distributed learning problem is divided into a set of decentralized subproblems. The subproblems can be solved in parallel, and the computational and communication costs are low. Experimental results on three large-scale image datasets demonstrate that SMvDisH achieves competitive retrieval performance and trains faster than state-of-the-art multi-view hashing methods.
Appling mathematical modeling methods for analyses synchronization processes of distributed data processing systems makes it possible to significantly optimize these processes and guarantee the required level of consi...
Appling mathematical modeling methods for analyses synchronization processes of distributed data processing systems makes it possible to significantly optimize these processes and guarantee the required level of consistency. To analyze stochastic distributed synchronization procedures, mathematical modeling tools are needed to adequately reflect their stochastic nature and form a probabilistic time characteristics assessment of the shared resource ownership distributed between the parallel processes. The research carried out within the current paper shows that stochastic modeling tools are able to solve a number of complex problems in this area and in particular to adapt synchronization algorithms for use in heterogeneous computing systems with a different set of hardware components and providing an acceptable synchronization time for a large amount of data. The paper essentially analyzes Markov synchronization models with group maintenance and considers tools for bringing these models to the case of arbitrary service time.
Transformer-based sequential recommendation is highly powerful as it can capture short-term and long-term sequential recommendation. It plays a crucial role in personalized recommendation systems, aiming to extract dy...
详细信息
ISBN:
(数字)9798350374407
ISBN:
(纸本)9798350374414
Transformer-based sequential recommendation is highly powerful as it can capture short-term and long-term sequential recommendation. It plays a crucial role in personalized recommendation systems, aiming to extract dynamic and diverse preference information from users’ realtime growing behaviors. This is mainly due to its unique selfattention mechanism, which utilizes item-item interactions within the sequences. However, in online platforms, due to the interweaving of items in user behavior, user behavior data inevitably contains noise. Currently, most methods model user preferences in the time domain, overlooking the influence of frequency patterns on user behavior. To address this issue, this paper shifts the perspective to the frequency domain and proposes a novel contrast-enhanced filtering model for sequential recommendation based on the bidirectional Transformer, called CEFRec. Specifically, the paper designs a filtering layer on top of the bidirectional Transformer, allowing learnable filters to operate on different layers’ spectra. This enables the model to capture various frequency patterns and adaptively attenuate noise information within the frequency domain. Next, the model combines the cloze task mask and dropout masks to generate high-quality positive samples and utilizes contrastive learning to enhance the quality of user embeddings learned from the frequency domain. Finally, experimental results on three public benchmark datasets demonstrate that the CEFRec model outperforms state-of-theart sequential recommendation models.
distributed arithmetic (DA) implementation for finite impulse response (FIR) filters on field-programmable gate arrays (FPGAs) is highly desirable in digital signal processing due to its fast computational speed and l...
distributed arithmetic (DA) implementation for finite impulse response (FIR) filters on field-programmable gate arrays (FPGAs) is highly desirable in digital signal processing due to its fast computational speed and low power consumption. However, traditional LUT-based DA implementation on FPGAs is challenging because of its high memory space requirements. To overcome this challenge, LUT-partition and MUX-incorporation techniques have been proposed to reduce memory space, but they also increase the FPGA resource utilization. Furthermore, the inherent serial nature of DA computing can limit data throughput. parallelprocessing of multiple bits can improve computational performance but at the cost of chip area. Therefore, it is beneficial to combine optimization methods to achieve desired performance. This paper proposes a comprehensive approach for optimizing memory space, computational performance, and chip area by analyzing different LUT partitions and incorporating MUX configurations. The proposed method is evaluated on a Xilinx Zynq 7010 FPGA, demonstrating its effectiveness.
Moving object detection plays a significant role in video surveillance. However, existing moving object detection methods often rely on software implementations, which means low real-time performance and high power co...
详细信息
ISBN:
(数字)9798331540043
ISBN:
(纸本)9798331540050
Moving object detection plays a significant role in video surveillance. However, existing moving object detection methods often rely on software implementations, which means low real-time performance and high power consumption. This paper's core detection algorithm employs a frame difference method that is enhanced by morphological filtering. Additionally, we propose an architecture that integrates FPGA(Field Programmable Gate Array) and ARM(Advanced RISC Machine), fully leveraging the parallel computing advantages of FPGA and the high processing efficiency of ARM. The system utilizes a ZYNQ7000 SoC, coupled with an OV7725 camera for image capture and DDR3 SDRAM for data caching, to address the challenges of high-speed data processing and low power consumption. Experimental results show that the system meets the requirements for high real-time performance and low power consumption with a frame rate of 85.9375 frames per second and a total power consumption of 1.101 W.
This paper implements and demonstrates visual route mapping and localisation upon a Pixel Processor Array (PPA). The PPA sensor comprises of an array of processing Elements (PEs), each of which can capture and process...
详细信息
ISBN:
(纸本)9781728190778
This paper implements and demonstrates visual route mapping and localisation upon a Pixel Processor Array (PPA). The PPA sensor comprises of an array of processing Elements (PEs), each of which can capture and process visual information directly. This provides significant parallelprocessing power allowing novel ways in which information can be processed on-sensor. Our method predicts the correct node within a topological map generated from an image sequence by measuring image similarities, spatial coherence, and exploiting the parallel nature of the PPA. Our implementation runs at +300Hz on large public datasets with +2K locations requiring 2.5W at 500 GOPS/W. We compare vs traditionally implemented methods demonstrating better F-1 performance even on simulation. As far as we are aware, we present the first on-sensor mapping and localisation system running entirely on-sensor.
This paper presents a joint parallel loop filtering algorithm based on multi-thread load balancing in HEVC decoding, which implements the parallelprocessing of deblocking filtering (DBF) and sample adaptive compensat...
详细信息
The changes in technologies has also changed the way we compute. Computing applications provide various types of functionalities. However, a common thing is to secure the same computing system. It requires a high leve...
详细信息
ISBN:
(纸本)9781665454025
The changes in technologies has also changed the way we compute. Computing applications provide various types of functionalities. However, a common thing is to secure the same computing system. It requires a high level of developer skills to secure a system. Generally, verifying users before access of services, encryption of data, and techniques of parallel access of information by multiple users is done to ensure only valid users can access the services. One need to verify person, device, process, or service before it access the related service(s). In this paper, we present a review of authentication techniques used in computing computing. It elaborates methods used for traditional authentication using articles, letters, people, passwords, one-time passwords, digital certificates, two-way authentication to latest behavioural, doodles, image sequence, gestures based recognition of users using biometrics, gait-based and their behavioural analytics. It also discusses key features of various methods including gaps and scope of improvement.
Fractal image compression has higher space domain compression performance compared to the mainstream image compression algorithms using discrete cosine transform, but the search time for coding fractal image compressi...
详细信息
Fractal image compression has higher space domain compression performance compared to the mainstream image compression algorithms using discrete cosine transform, but the search time for coding fractal image compression is too long and less practical. In this paper, we propose a fractal image block classification scheme based on discrete cosine transform, and use NVIDIA CUDA architecture to achieve parallel coding, which shows that this scheme can achieve 107 times faster speedup than the basic fractal scheme, and the coding time is significantly reduced, and the PSNR decreases only about 0.4, so this scheme has greater practicality.
暂无评论