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检索条件"任意字段=Conference on Ph.D Research in Microelectronics and Electronics"

共 836 条记录，以下是111-120 订阅

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design of a Nano-Power Capacitor-Less LdO Voltage Regulator for Wake-Up Radio Applications

Design of a Nano-Power Capacitor-Less LDO Voltage Regulator ...

引用

ph.d. research in microelectronics and electronics (PRIME)

作者： Marco Villa Marco Guerrini Eleonora Franchi Scarselli Matteo d'Addato Alessia Maria Elgani Alessandro Nicolosi Sandro Rossi Aldo Romani ARCES-DEI - University of Bologna Italy STMicroelectronics Bologna Italy STMicroelectronics Comaredo Italy

ISBN: (数字)9798350386301

ISBN: (纸本)9798350386318

This paper presents a subthreshold capacitorless low-dropout (LdO) voltage regulator for powering a Wake-Up Receiver (WuRX) in an ultra-low power IoT system. The system must maintain very low quiescent current to maximize the battery life of the node. Since the standby power consumption of the reference wake-up circuit is extremely low « 55 nW)., it is crucial that the LdO has even lower power consumption to avoid becoming the bottleneck of the entire system. The proposed LdO maintains a power consumption below 5 nW across the entire possible input voltage range from 0.7-V to 4.2-V, which includes the typical voltage range of lithium batteries. In nominal condition, with input voltage of 1.2 V, the power consumption is only 803 p W, accounting for less than 2 % of the entire node. Circuit design was performed on an STmicroelectronics 90-nm CMOS technology and achieve low output voltage ripple in presence of the current profiles requested by the WuRX load, and temperature stability, while maintaining the above power consumption across possible process and temperature variations. Additionally, a transistor-level simulation of the entire circuit consisting of LdO and WuRX is reported, to demonstrate the correct functionality of the whole system.

关键词： MOSFET Power demand Regulators Receivers Stability analysis microelectronics Internet of Things

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A C/V Converter for MEMS Gyroscope Readouts Featuring a Single Stage Class AB OTA

A C/V Converter for MEMS Gyroscope Readouts Featuring a Sing...

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ph.d. research in microelectronics and electronics (PRIME)

作者： Raphael Maier Mourad Elsobky Carsten Leube Thomas Alpert Jens Anders Robert Bosch GmbH Automotive Electronics Reutlingen Germany Institute of Smart Sensors University of Stuttgart Stuttgart Germany

In this paper, we present a fully differential single stage charge-to-voltage (C/V) converter with a class AB output stage for gyroscope readout circuits. The proposed amplifier offers low noise and low power consumption by using a current reuse architecture in the OTA core while also providing a rail to-rail output swing for a good signal-to-noise ratio (SNR). I this work we benefit from a single stage amplifier which has the advantage of requiring no compensation capacitance, therefor (reducing the overall area. Moreover, having a class AB output stage allows us to reduce the needed quiescent current compare to a class A output stage while offering a high voltage swing at the output. In order to ensure that the proposed amplifier fulfills the sensor frontends specifications, extensive simulations have been carried out over a temperature range from (−5°C to 70°C) including process, voltage and micro electro-mechanical system (MEMS) variations. The simulated power consumption is below 37 $\mu$W from a 1.6 V supply and the input-referred noise stays below 35 nV/$\sqrt{\mathrm{H}\mathrm{z}}$ from 35 kHz to 10 MHz. The C/V is designed in a 40 nm CMOS process and offers a gain drift of 0.4% from −5°C to 70°C, a phase drift of below 3.5 mrad and a total harmonic distortion (THd) of below 1.5% for an output swing of 1.2 $\mathrm{V}_{\mathrm{p}\mathrm{p}}$ over all process corners while consuming an area of $145 \times 165\mu \mathrm{m}^{2}$.

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CPW-Fed Low Profile Resistive Loaded Antenna design 4

CPW-Fed Low Profile Resistive Loaded Antenna Design

引用

4th International conference on Smart Systems and Inventive Technology, ICSSIT 2022

作者： Reji, V. Manimegalai, C.T. Department of Electronics and Communication SRM Institute of Science and Technology Chennai India

ISBN: (纸本)9781665401180

A CPW-fed low profile resistive loaded V- antenna for wireless communication is proposed. The base antenna with double leg configuration is designed for 5.2GHz and the frequency is shifted to different frequency ranges by varying the number of legs to four and six. For changing the radiation pattern from unidirectional to bidirectional minimum of six resistors are loaded on the top of the six legs. The antenna is designed for very small dimensions with 14mm width, 16mm length andsubstrate height of *** antenna is fed by the CPW feed method through two conducting strips. The minimum angle selected between the legs is 60o and the maximum angle between the legs is 100o. A maximum of 6.4dB gain is achieved at six legs with 1KΩ resistive load and maximum efficiency of 86% is achieved at six legs with 100KΩ resistive load. © 2022 IEEE

关键词： Antenna feeders

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A 64 × 64 SPAd Array For Quantum Ghost Imaging with Integrated TdCs and Event-driven Readout in a 40 nm CMOS Technology

A 64 × 64 SPAD Array For Quantum Ghost Imaging with Integra...

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ph.d. research in microelectronics and electronics (PRIME)

作者： davide Moschella davide Berretta Alberto Tosi Federica Villa Dipartimento di Elettronica Informazione e Bioingegneria Politecnico di Milano Milan Italy

ISBN: (数字)9798350386301

ISBN: (纸本)9798350386318

The exploitation of quantum phenomena has become a pioneering frontier allowing imaging in scenarios where direct illumination is challenging or impractical. Quantum Ghost Imaging (QGI), among various techniques, stands out as a robust and promising approach. While in traditional imaging light interacts directly with the scene, QGI makes use of two separate quantum-correlated beams, one illuminating the object and later being detected by a non-spatially resolved sensor, the other one being straight detected by a pixelated sensor. The scene is then reconstructed by comparing the time tags associated to the detected photons. This work focuses on the design of the spatially solved imager, a 64 × 64 pixel Single-photon Avalanche diode (SPAd) sensor. It is implemented with a 3d-stack approach employing the STmicroelectronics C40 technology node for the bottom tier containing the processing electronics, a dedicated imaging technology for the top die embedding the SPAd array, and a microlens array for enhancing the collection efficiency. The integrated 12-bit Time-to-digital Converters (TdCs) resolution is 200 ps and their stability to process-voltage-temperature (PVT) variations is guaranteed by a shared on-chip wide-tuning range phase-Locked-Loop (PLL). The event-driven jump readout approach maximizes the acquisition duty-cycle allowing the chip to operate at up to 1.2 Mframe/s.

关键词： Power demand Imaging Lighting System-on-chip microelectronics Spatial resolution phase locked loops

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drift-Tolerant Implementation of a Neural Network on a PCM-Based Analog In-Memory Computing Unit for Motor Control Applications

Drift-Tolerant Implementation of a Neural Network on a PCM-B...

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ph.d. research in microelectronics and electronics (PRIME)

作者： F. Zavalloni A. Antolini M. L. Torres A. Nicolosi F. d'Angelo A. Lico E. Franchi Scarselli M. Pasotti ARCES-DEI - University of Bologna Bologna Italy STMicroelectronics Agrate Brianza Italy STMicroelectronics Cornaredo Italy STMicroelectronics Bologna Italy

ISBN: (数字)9798350386301

ISBN: (纸本)9798350386318

Neural Networks (NN) are involved in a plethora of applications, such as gesture recognition and data labeling. In this scenario, Analog In-Memory Computing (AIMC) is a promising paradigm to deal with the prohibitive energy constraints and performance issues related to the NN implementation. As a proof of concept, this paper proposes a realization of a simple NN for a motor control driver through an AIMC unit based on an embedded phase-Change Memory (ePCM), both designed in a 90-nm CMOS STmicroelectronics technology. The accuracy of the NN inference is characterized in different scenarios to evaluate the influence of cells conductance drift in a real application. In particular, classification accuracy in both uncompensated and compensated cases is experimentally evaluated at several time intervals and considering different cells conductance levels. Results highlight that the proposed compensation method allow to obtain an accuracy above the 96 % after 5 days from cells programming even with lower levels of conductance.

关键词： phase change materials Motor drives Accuracy Artificial neural networks Programming In-memory computing phase change memory

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A 7.69 ENOB, $161\mu W$ SAR AdC in 28nm CMOS for Proton Sound detectors

A 7.69 ENOB, $161\mu W$ SAR ADC in 28nm CMOS for Proton Soun...

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ph.d. research in microelectronics and electronics (PRIME)

作者： davide Turossi Elia Arturo Vallicelli Marcello de Matteis Gennaro di Meo Fabio d'Ottavi Andrea Baschirotto Department of Physics University of Milano-Bicocca Milan Italy Section of Milano-Bicocca National Institute of Nuclear Physics (INFN) Milan Italy Department of Electrical Engineering and Information Technologies University Federico II Naples Italy

ISBN: (数字)9798350386301

ISBN: (纸本)9798350386318

Imaging in proton-based radiotherapy can be advanced by the full characterisation of the thermoacoustic signal generated after the deposition of the proton beam energy into the absorber material. This paper presents an 8-bit 20M Samples Per Second fully differential Successive Approximation Register designed in 28nm CMOS for new generation Proton Sound detectors. The specifications of the converter are determined by the low amplitude, high frequency and non-periodicity of the thermoacoustic signal, and by the electrical requirements of the detector acquisition chain. The proposed converter achieves, in nominal conditions, a Signal to Noise Ratio of 48.07, corresponding to an Equivalent Number Of Bits of 7.69, near ideal differential and integral non-linearity, and a total power consumption of $160.98\mu W$ . The circuit is designed to be robust to Process- Voltage-Temperature variations being able to achieve a worst-case-scenario Equivalent Number Of Bits of 7.42, and to mismatch suffering a maximum full-scale voltage reduction of $3LSB$ .

关键词： Protons Particle beams Power demand detectors Voltage Silicon Robustness

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A C-Band MMIC Multi-Functional Core Chip with 7 Bits phase Shifter and Attenuator Using GaAs phEMT

A C-Band MMIC Multi-Functional Core Chip with 7 Bits Phase S...

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ph.d. research in microelectronics and electronics (PRIME)

作者： Swati Sharma Shikha Swaroop Sharma Patrick E. Longhi Sergio Colangeli Walter Ciccognani Ernesto Limiti Department of Electronics Engineering University of Rome Rome Italy

ISBN: (数字)9798350386301

ISBN: (纸本)9798350386318

This paper demonstrates about MMIC multi-function core chip with the operating frequency range from 5GHz to 6G Hz for space payload earth observation applications. The core chip has been realized using 0.15um GaAs phEMT process to design 7-bits phase shifter, 7-bits attenuator, three amplifiers, and -bits parallel to serial converter. The attenuator possesses an attenuation of 31.5dB with O.25dB step. The proposed 7-bits phase shifter depicts low insertion loss of 9.5dB, good return loss of less than -10dB and lower amplitude variation of 0.5dB in between the 128-phase states. This work conveyed the deep physical insight for phase shifter and attenuator is that they must be designed by taking into account the EM coupling effects of adjoining components. The core chip signifies the RMS phase and attenuator error of less than 6° and 0.5dB respectively in the desired frequency band. The two realized functionalities has the dimension of 3.8mm * *** including RF and dC pads.

关键词： Radio frequency phased arrays Couplings 6G mobile communication Attenuators phase shifters phEMTs

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Centroid estimation method with sub-pixel resolution for event-based sun sensors

Centroid estimation method with sub-pixel resolution for eve...

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ph.d. research in microelectronics and electronics (PRIME)

作者： Ł ukasz Farian Pablo Ferná ndez-Peramo philipp Hä fliger Juan A. Leñ ero-Bardallo Department of Informatics Nanoelectronics Group University of Oslo Norway Institute of Microelectronics of Seville (IMSE-CNM) CSIC-Universidad de Sevilla Spain

A new method to obtain sub-pixel measurement resolution for sun sensors based on spiking pixels is presented. The procedure is intended to increase the resolution of the estimated angle. The method uses the profile of incident light to estimate the angle of the vector towards the sun with sub-pixel resolution. Read-out time, data bandwidth, and spatial resolution are improved. Experimental results are provided. The proposed method can be implemented in any asynchronous sun sensor operating in Time-to-First-Spike (TFS) mode.

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An analysis of the behaviour of a PUF based on ring oscillators depending on their locations

An analysis of the behaviour of a PUF based on ring oscillat...

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ph.d. research in microelectronics and electronics (PRIME)

作者： M. Garcia-Bosque R. Aparicio G. dd ez-Señ orans C. Sá nchez-Azqueta S. Celma Centro Universitario de la Defensa Academia General Militar Zaragoza Spain Group of Electronic Design University of Zaragoza Zaragoza Spain

In this paper, an analysis regarding the influence of the chosen locations of the ring oscillators in the performance of a ring oscillator physically Unclonable Function has been carried out. For this purpose, five different strategies to select a small set of locations out of a big set of locations to construct a PUF have been proposed and compared. The analysis reflects that, depending on the chosen selection strategy, the quality of the PUF can be greatly affected, especially in terms of uniqueness.

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A Switched Capacitor Approach for Power Line Communication in differential Networks

A Switched Capacitor Approach for Power Line Communication i...

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ph.d. research in microelectronics and electronics (PRIME)

作者： Andreas Ott Federico d’ Aniello Andrea Baschirotto Melexis GmbH Erfurt Germany Dept. of Physics &#x201C G. Occhialini&#x201D Univ. Milan-Bicocca- Milan (Italy)

In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.

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