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检索条件"任意字段=Conference on Ph.D Research in Microelectronics and Electronics"

共 836 条记录，以下是271-280 订阅

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A Chip-Level Post-CMOS Via-Last Cu TSV Process for Multi-Layer Homogeneous 3d Integration 12

A Chip-Level Post-CMOS Via-Last Cu TSV Process for Multi-Lay...

引用

12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Eroglu, Seniz E. Kucuk Cho, Woo Yeong Leblebici, Yusuf Ecole Polytech Fed Lausanne Lausanne Switzerland Samsung Elect Seoul South Korea

ISBN: (纸本)9781509004935

In this paper, a die-level CMOS post-processing scheme for 3d integration using the via-last approach is presented for multi-layer stacking. The process includes TSV fabrication, chip-to-chip bonding, and finally the TSV filling with Cu electroplating. The proposed process flow is used to fabricate a 4-layer chip stack using homogeneous CMOS memory chips. Electrical measurements are carried out to determine the resistance value of the TSVs. Kelvin bridge method is used in order to eliminate the additional resistance introduced by the experimental setup, and the average resistance value of a single TSV is determined as 180 m Omega. The current carrying capability is also investigated for possible electrical failures. It is concluded that the TSVs can carry up to 1.5 A (dC) current values without any failure.

关键词： 3d integration TSV via-last approach post-CMOS processing

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A dC-coupled 27 MHz LNA and Automatic Gain Control Amplifier on an Ultra-Thin 0.5 μm CMOS Gate Array for a Wireless Sensor System-in-Foil 12

A DC-coupled 27 MHz LNA and Automatic Gain Control Amplifier...

引用

12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Briem, Jochen Groezing, Markus Berroth, Manfred Univ Stuttgart Inst Elect & Opt Commun Engn INT Stuttgart Germany

ISBN: (纸本)9781509004935

This paper presents a dC-coupled 27 MHz low noise amplifier (LNA) and automatic gain control (AGC) amplifier on a specially processed ultra-thin 0.5 mu m CMOS gate array for the RF receiver of a wireless and bendable sensor system-in-foil. As the receiver is made for amplitude shift keying (ASK) signals, it needs an AGC. An offset feedback (OSFB) control circuit is realized to compensate for offsets. As required for the application specific protocol, a short settling time is needed. Therefore a Manchester coded input signal is used. The ASK modulation is used because of circuit energy consumption reasons in the given technology. The RF receiver works without a local oscillator (LO).

关键词： flexible electronics wireless sensor networks analog integrated circuits automatic control broadband amplifiers amplitude shift keying demodulation low noise amplifiers

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A 10 bit A-to-d converter development within power optimized BCd technology 12

A 10 bit A-to-D converter development within power optimized...

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12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： d'Amico, Antonio Brugger, Florian Haerle, dieter Petruzzi, Luca Baschirotto, Andrea Univ Milano Bicocca Dept Phys Milan Italy Infineon Technol Villach Austria KAI Villach Austria

ISBN: (纸本)9781509004935

This paper presents the development of a 10b AdC dedicated to the digitalization of a sensing current within advanced automotive applications. The presented AdC has been developed in a power optimized BCd technology, i.e. a process specifically optimized for power delivery and featuring signal processing capabilities. However it presents some limitations, i.e. highly non-linear capacitances, large mismatch, etc.. In this scenario a 10b AdC has been developed by means of a customized MATLAB model enabling the target performance achievements. The aim of this work is to study the effect of non-ideal components on the conversion performances focusing in particular on the technology limitations, like capacitors non-linearity and components mismatch. In order to achieve this, a Matlab model has been developed and then a demonstrator circuit has been designed at transistor level.

关键词： MATLAB

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design of differential delay lines in low temperature cofired ceramics 12

Design of differential delay lines in low temperature cofire...

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12th conference on ph.d. research in microelectronics and electronics, PRIME 2016

作者： Colom, Pablo Benet Ramos, Francisco Cordoba, Javier Sieiro Research and Development and Innovation Department Francisco Albero S.A.U. FAE Hospitalet del Llobregat Spain Radiofrequency Department University of Barcelona UB GRAF Spain

ISBN: (纸本)9781509004935

In this paper, a 3d differential delay line fabricated using a low temperature cofired ceramic (LTCC) technology is presented. The main feature of this component is its high value of delay density per unit area when compared with other differential geometries such as meanders, edge-coupled lines or twisted pair lines. An increase of a factor of 6 in the delay density is demonstrated, whereas distortion, attenuation and return loss are kept inside reasonable values. © 2016 IEEE.

关键词： Temperature

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design of a 64 channels current-to-frequency converter ASIC, front-end electronics for high intensity particle beam detectors 12

Design of a 64 channels current-to-frequency converter ASIC,...

引用

12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Fausti, F. Mazza, G. Marchetto, F. Sacchi, R. Cirio, R. Turin Polytech Natl Inst Nucl Phys Turin Italy Univ Turin Dept Phys Turin Italy Natl Inst Nucl Phys Turin Italy Univ Turin Natl Inst Nucl Phys Dept Phys Turin Italy

ISBN: (纸本)9781509004935

new wide-input dynamic range, 64-channels current-to-frequency converter ASIC has been designed and is now under characterization. This chip, nicknamed TERA09, has been realized to equip the front-end readout electronics for the new generation of beam monitor chambers for particle therapy applications. In this field, the trend in the accelerator development is moving toward compact solutions providing high-intensity pulsed-beams. However, such a high intensity will saturate the present readout of the beam monitor chambers. In order to deal with the technology innovations in the particle therapy, the chip described in this work is able to cope with a higher maximum intensity while keeping high resolution by working on a six orders of magnitude conversion-linearity zone (hundreds of pA to hundreds of mu A), with a gain spread in the order of 1-3% (r.m.s.), with a 200fC charge resolution.

关键词： Readout electronics Current-to-frequency converter Radiotherapy Hadrontherapy Charged particles Ionization chambers

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A 4-mode reconfigurable low noise amplifier for implantable neural recording channels 12

A 4-mode reconfigurable low noise amplifier for implantable ...

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12th conference on ph.d. research in microelectronics and electronics, PRIME 2016

作者： Valtierra, José Luis Rodríguez-Vázquez, Ángel delgado-Restituto, Manuel Institute of Microelectronics of Seville University of Sevilla Avda. Americo Vespucio s/n Sevilla41092 Spain

ISBN: (纸本)9781509004935

In this paper a reconfigurable implantable low noise amplifier for the recording of neural signals is presented. It is comprised by low-power and noise efficient current reuse OTAs in its direct path. The proposed architecture allows for an active feedback to set the high-pass corner in place of the commonly used pseudoresistor. Bandwidth selectivity is achieved by cicuit reconfigurability which changes the pole frequencies of the system without impacting the total power consumption. Simulation results in AMS 0.18μm technology validate the proposed architecture in both nominal and corner process conditions with an estimated total power consumption of 454nW. © 2016 IEEE.

关键词： Low noise amplifiers

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A 2.3 mW Quadrature Bandpass Continuous-Time ΔΣ Modulator with Reconfigurable Quantizer 12

A 2.3 mW Quadrature Bandpass Continuous-Time ΔΣ Modulator ...

引用

12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Saalfeld, Tobias Atac, Aytac Liao, Lei Wunderlich, Ralf Heinen, Stefan Rhein Westfal TH Aachen Chair Integrated Analog Circuits & RF Syst Kopernikusstr 16 D-52074 Aachen Germany

ISBN: (纸本)9781509004935

This paper presents a continuous-time (CT) quadrature bandpass (QBP) delta Sigma AdC which is reconfigurable in terms of quantizer resolution, bandwidth (BW) and IF. It is designed for use in a low power low-IF multi-band transceiver system. In simulations the presented implementation in a 130nm RF CMOS process achieves a resolution of 10.5 bit. Additionally, a total power consumption of 2.3mW from an 1.2V supply voltage is simulated. The BW of the 3rd order QBP filter can be set to 0.5, 1.0 or 2.0MHz together with the IF. Likewise the loop quantizer is capable of single and dual-bit analog to digital conversion. Separate digital to analog converters (dAC) for both modes are used in the feedback of the delta Sigma loop. Furthermore an improved data weighted averaging (dWA) algorithm is presented to control the dual-bit dAC unity cells and cope with the dACs I/Q mismatch.

关键词： digital to analog conversion

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Multi-Gb/s OOK mm-Wave Modulator ICs on 28 nm Low-Power digital CMOS 12

Multi-Gb/s OOK mm-Wave Modulator ICs on 28 nm Low-Power Digi...

引用

12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Leufker, Jan dirk Fritsche, david Belfiore, Guido Carta, Corrado Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory Dept Elect & Comp Engn D-01062 Dresden Germany

ISBN: (纸本)9781509004935

This paper presents two on-off-keying millimetre-wave modulator ICs working with measured data rates of up to 30 Gb/s fabricated on 28nm low-power digital CMOS. The first circuit is a switched cross-coupled oscillator with oscillation frequency of 54 GHz and measured data rates of up to 6 Gb/s. The power-up time of the oscillator is minimized by generating and introducing a pulse signal into the oscillator core enabling multi-Gb/s data rate operation. Proper power-down behaviour is achieved by shortcut the LC-tank in the off-state. The circuit consumes 10mA from a 1.2 V-source. The second circuit is a compensated modulator working with carrier frequencies of up to 60GHz and measured data rates of up to 30 Gb/s while consuming 6mA from a 1.2 V-source. Both circuits compare well with the state-of-the-art.

关键词： Switched oscillator modulator OOK CMOS mm-wave IC

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design of an Integrated CMOS Highly Sensitive True RMS RF Power detector for Cognitive Radio Applications 12

Design of an Integrated CMOS Highly Sensitive True RMS RF Po...

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12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Varga, Gabor Wolf, Benedikt van Rey, Tobias Ashok, Arun Heinen, Stefan Rhein Westfal TH Aachen Integrated Analog Circuits & RF Syst Lab D-52062 Aachen Germany

ISBN: (纸本)9781509004935

A high dynamic range true RMS power detector is designed for broadband frequency agile applications like Cognitive Radio. The RF bandwidth of the Power detector covers 0.5 GHz - 3 GHz with a dynamic range of 50 dB and a minimum detectable power of -50dBm (50 Omega). Its architecture is differential employing a pseudo-differential squaring circuit and it has a high input impedance enabling it to be placed on high impedance as well as on 50 Omega lines. Particularly the noise behaviour of the circuit is investigated due to the inherently strong low-frequency noise of the squaring stage. Preamplifier stages, automatic offset cancellation, calibration and oversampling are employed to reach high sensitivity. Logarithmic amplifier stages after the squaring unit care for a linear-in-dB conversion. The power detector has been designed in a commercial UMC 130nm CMOS technology in order to provide easier integration with other mixed-signal blocks and low-cost production.

关键词： Cognitive radio

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Class-O power amplifier with enhanced linearity using floating body technique in 130 nm standard CMOS technology 12

Class-O power amplifier with enhanced linearity using floati...

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12th conference on ph.d. research in microelectronics and electronics (PRIME)

作者： Khan, Muhammad Abdullah Negra, Renato Rhein Westfal TH Aachen Chair High Frequency Elect D-52074 Aachen Germany

ISBN: (纸本)9781509004935

In this paper, we present a modified class-O power amplifier (PA) which employs floating-body technique to achieve high linearity. Class-O is a new PA topology which incorporates two sub-amplifiers working in parallel to achieve high linearity and efficiency. The two sub-amplifiers are operated in common drain (Cd) and common source (CS) configuration. The proposed floating-body technique is verified with on-wafer measurements on single power transistors. The simulation results of overall class-O amplifier show a 2.3 dB improvement in output 1 dB compression point (P-out1dB) over the conventional body shorted to source version of the amplifier. The power added efficiency (PAE) of proposed class-O is 33.3% as compared to 24% for conventional version. Hence, enabling the proposed amplifier to transmit higher linear output power with more efficiency. The operating frequency of both the amplifiers 960 MHz and the technology used is UMC 130nm standard RFCMOS.

关键词： Power amplifiers

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