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检索条件"任意字段=Conference on Ph.D Research in Microelectronics and Electronics"

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Pressure-based intelligent stent for restenosis control 11

Pressure-based intelligent stent for restenosis control

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Miguel, J. A. Rivas, d. Lechuga, Y. Allende, M. A. Martinez, M. Univ Cantabria Microelect Engn Grp Santander Spain

ISBN: (纸本)9781479982295

This paper describes an intelligent stent for Pulmonary Artery Restenosis (PAS) monitoring, comprising MEMS pressure sensors and CMOS electronics. First, a novel MEMS sensor design tool is described and some fabricated PolyMUMPs devices are presented. Then, a proposed low-power analog system for monitoring intelligent stents is analyzed. This architecture is fully-integrated and can be divided into four basic blocks: voltage rectifier, voltage reference, mode-selector and oscillator. The integrated circuit (IC) has been fabricated in TSMC 0.18 mu m CMOS technology. Post-layout simulation results show average power consumptions of 152.1 mu W and 547.1 mu W in idle and active states, respectively.

关键词： Biomedical Transducers Low-Power electronics Rectifiers Biomedical electronics

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Very High-Speed CMOS Comparators for multi-GS/s A/d Converters 11

Very High-Speed CMOS Comparators for multi-GS/s A/D Converte...

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Muratore, dante Gabriel Akdikmen, Alper Maloberti, Franco Univ Pavia Dept Elect Comp & Biomed Engn Pavia Italy Istanbul Tech Univ Dept Elect Comp & Biomed Engn Istanbul Turkey

ISBN: (纸本)9781479982295

Ultra high-speed comparators for data-converters operating with conversion rate of 10+ GS/s are discussed. It is shown that the use of nanometer technologies and specific architectures allow comparator speeds in the 30 ps range or below. State-of-the-art schemes of latch are critically analysed and strategies for enhancing the speed are discussed. A novel scheme, the latch with embedded preamp, increases the speed of the fast scheme by almost a factor 2.

关键词： Speed

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Application-Specific Optimization of Optical Sensors Based on Single-photon Avalanche diodes 11

Application-Specific Optimization of Optical Sensors Based o...

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Schwinger, Alexander Bechen, Benjamin Nitta, Christian Hosticka, Bedrich J. Kokozinski, Rainer Fraunhofer Inst Microelect Circuits & Syst IMS Finkenstr 61 D-47057 Duisburg Germany

ISBN: (纸本)9781479982295

In recent years, various developments have advanced the field of optical sensors based on single-photon avalanche diodes. In this contribution we present two sensors that were designed in 0.35 mu m CMOS technology. A silicon photomultiplier achieves a fill factor of 68% at 50 mu m pixel pitch and allows improved functionality by cointegration of application-specific readout electronics. A time-gated line sensor with gating times down to 1.5 ns and serial digital output was designed based on optimized pixel geometry suitable for spectroscopy applications. Planned further improvements of sensors based on single-photon avalanche diode technology, including on-chip temperature compensation, are presented.

关键词： single-photon avalanche diode (SPAd) silicon photomultiplier (SiPM) time gating

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Platform Based design of 3d Hall Sensor Conditioning electronics 11

Platform Based Design of 3D Hall Sensor Conditioning Electro...

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Sarti, Luca Sisto, Arcangelo Pilato, Luca di Piro, Luigi Fanucci, Luca Univ Pisa Dept Informat Engn Via Caruso I-56122 Pisa Italy Italy Srl I-56123 Pisa Italy

ISBN: (纸本)9781479982295

In this paper the modeling activity for the realization of a general architecture suitable to interface a heterogeneous set of magnetic sensors for automotive applications is presented. This work represents the first step of a "platform based" approach that aims at improving system performance while minimizing time-to-market. In particular, a case study is shown in which 3d Hall sensors have been used;these sensors allow 2d and 3d magnetic field measurements in Cartesian or polar coordinates, position measurements, rotation and tilt measurements and Joystick position measurements. The system has been end-to-end modeled starting from the physical phenomenon, passing through acquisition and conditioning and ending with digital elaboration;then it has been extensively simulated to verify the correctness of its behavior and to identify the metrics for a proper analog\digital\software partitioning.

关键词： 3-axis Hall sensors platform based design

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Characterisation and Modelling of Mg doped ZnO TFTs 11

Characterisation and Modelling of Mg Doped ZnO TFTs

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Shaw, A. Gao, C. Jin, J. d. Mitrovic, I. Z. Hall, S. Univ Liverpool Dept Elect & Elect Engn Liverpool Merseyside England

ISBN: (纸本)9781479982295

The ever-increasing use of ZnO TFTs requires further in depth analysis and the need for a suitable model to obtain the true transport mechanisms. This paper explores the modelling of MgZnO TFTs using a defect state model based on multiple trapping and release and successfully validates the model with the fitting parameters. Namely, flat band voltage, characteristic temperature associated with the defect distribution, number of traps and conductivity of the ZnO film.

关键词： Zinc oxide (ZnO) Magnesium doped Zinc Oxide (MgZnO) atomic layered deposition (ALd) thin film transistor (TFT) TFT modelling

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TCAd-based Methodology for Reliability Assessment of nanoscaled MOSFETs 11

TCAD-based Methodology for Reliability Assessment of nanosca...

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2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Hussin, R. Gerrer, L. Amoroso, S. M. Wang, L. Weckx, P. Franco, J. Vanderheyden, A. Vanhaeren, d. Horiguchi, N. Kaczer, B. Asenov, A. Univ Glasgow Glasgow G12 8LT Lanark Scotland Univ Malaysia Perlis Sch Microelect Engneering Arau Malaysia Gold Standard Simulat Ltd Glasgow G12 8LT Lanark Scotland IMEC B-3001 Leuven Belgium

ISBN: (纸本)9781479982295

The microelectronics industry faces important challenges in reducing technology development and circuit design times. This advocates the use of TCAd approaches to co-optimize circuits and device development. This paper presents the process of calibrating pMOSFET TCAd simulations against measured devices starting with the physical structure, and the doping distribution and achieving good matching of the statistical variability and Random Telegraph Noise (RTN) measurements. The investigated device has been fabricated and characterized by IMEC, while Gold Standard Simulations (GSS) TCAd tools are used to accomplish this task. The calibration includes different channel lengths and widths to capture properly the scaling trends and to match the measured variability and reliability behaviour.

关键词： Statistical variability TCAd modelling statistical simulations reliability RTN

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Synthesis of Graphene on Ultra-Smooth Copper Foils for Large Area Flexible electronics 11

Synthesis of Graphene on Ultra-Smooth Copper Foils for Large...

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Polat, Emre O. Balci, Osman Kakenov, Nurbek Kocabas, Coskun dahiya, Ravinder Univ Glasgow Elect & Nanoscale Engn Glasgow G12 8QQ Lanark Scotland Bilkent Univ Dept Phys Ankara Turkey

ISBN: (纸本)9781479982295

This work demonstrates the synthesis of high quality, single layer graphene on commercially available ultra-smooth copper foils. The presented method will result in improved scalability of graphene based electronic and optical devices. Our approach is compatible with roll-to-roll printing as well as transfer printing of graphene layers on to a broad range of substrates including flexible and ultra-thin polymers. We propose that using commercially available ultra-smooth coppers provides scalable approach with the reduced variation of transport properties sourced from local graphene quality.

关键词： Graphene chemical vapor deposition smooth copper foil scalability

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Finite Element Analysis of uniaxial bending of ultra-thin Silicon dies embedded in flexible foil substrates 11

Finite Element Analysis of uniaxial bending of ultra-thin Si...

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2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Palavesam, Nagarajan Landesberger, Christof Kutter, Christoph Bock, Karlheinz Fraunhofer Res Inst Microsyst & Solid State Techn Hansastr 27d D-80686 Munich Germany Tech Univ Dresden Fac Elect & Comp Engn Elect Packaging Lab D-01062 Dresden Germany

ISBN: (纸本)9781479982295

We report a Finite Element Model to calculate the bending stress of thin and ultra-thin silicon dies embedded in flexible foil substrates (chip-in-foil package) at lower bending radii. The values of fracture strength computed using Finite Element Analysis showed very good agreement with the experimental results. Furthermore, an increase in the fracture or critical stress (bending stress at fracture) of the dies due to embedding in flexible foil substrates was observed. Besides, the impact of foil material and thickness on the bending stress of ultrathin silicon die is discussed by comparing two foil materials: Stainless Steel and Polyimide.

关键词： breaking strength chip embedding in foils chip-in-foil steel foil critical stress bending stress

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Techniques for Maximizing Input Handling and Improving Linearity of Gain Interpolating VGAs 11

Techniques for Maximizing Input Handling and Improving Linea...

引用

2015 11th conference on phd Res in Microelect & Elect PRIME

作者： El-Shennawy, Mohammed Joram, Niko Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory D-01062 Dresden Germany

ISBN: (纸本)9781479982295

This work presents gain interpolating variable gain amplifier (VGA) design aspects. A technique is introduced to improve the VGA input handling capability from a few hundred millivolts to rail-to-rail without affecting any other performance parameters and with low complexity. An additional technique is proven by hand analysis and simulations to reduce the 3rd order intermodulation products (IM3) of the VGA by 4dB. The VGA is designed in an IBM 0.13 mu m BiCMOS 7LM technology. It has a 56.5dB gain control range and draws 1.76mA from a 3V supply.

关键词： Gain control attenuators amplifiers feedback circuits interpolation

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Analysis of the Source/drain Parasitic Resistance and Capacitance depending on geometry of FinFET 11

Analysis of the Source/Drain Parasitic Resistance and Capaci...

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2015 11th conference on phd Res in Microelect & Elect PRIME

作者： Jay, Pathak darji, A. d. SVNIT Dept Elect Engn Surat India

ISBN: (纸本)9781479982295

The FinFET technology is one of the ultimate solutions for Moores Law. Since sizes of device channel shrink, several Short Channel Effects (SCEs) appear. The FinFET or Multigate are best solutions for SCEs. However, this device provides several parasitic components which may reduce the performance. The parasitic components are in form of parasitic resistance and in parasitic capacitance. Here, in this paper, source/drain region parasitic components with respect to geometry of FinFET are analyzed. The study shows S/d parasitic components are mainly dependent on the structural geometry of FinFET. The parasitic components w.r.t fin geometry as well as metal contact thickness have been analyze. So in order to reduce these parasitic the device geometry is to be optimized.

关键词： Spreading Resistance Transmission Line Model Fringing Capacitance FinFET Short Channel

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