A design automation system for Sigma-Delta analog-to-digital converters (ADC) which operates at system level is presented. New error models and a new approach to system level design exploration and/or automation are i...
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ISBN:
(纸本)0780393457
A design automation system for Sigma-Delta analog-to-digital converters (ADC) which operates at system level is presented. New error models and a new approach to system level design exploration and/or automation are illustrated. Finally, verification of the approach on a chip design is presented.
In this paper we propose novel multidirectional transformers, intended for application as passive power dividers, operating in the frequency range from 5 MHz to 862 MHz in multimedia separators for CATV systems. The p...
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ISBN:
(纸本)0780393457
In this paper we propose novel multidirectional transformers, intended for application as passive power dividers, operating in the frequency range from 5 MHz to 862 MHz in multimedia separators for CATV systems. The performance of these transformers is analysed in MATLAB by means of node voltage technique and compared with the results of measurements.
The paper focuses on the possibilities of hardware implementation (above all VLSI proposals) of the multiplication in GF(2n). Encouraging solutions were implemented in technology 0.35 μm and served as the models for ...
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ISBN:
(纸本)0780393457
The paper focuses on the possibilities of hardware implementation (above all VLSI proposals) of the multiplication in GF(2n). Encouraging solutions were implemented in technology 0.35 μm and served as the models for the projection of the main circuits parameters (silicon area, speed, power consumption) for currently used and more advanced technologies.
For the AES cipher, tradeoffs of VLSI architecture design relating to datapath width, round organization, and subkey preparation are being discussed. Six ASIC implementations that exploit different corners of the solu...
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ISBN:
(纸本)0780393457
For the AES cipher, tradeoffs of VLSI architecture design relating to datapath width, round organization, and subkey preparation are being discussed. Six ASIC implementations that exploit different corners of the solution space are compared in terms of silicon area, throughput and security against side-channel attacks.
Based on a novel analog switch, a two-way time-interleaved bipolar track-and hold amplifier is proposed, achieving 7-bit resolution at 4GSa/s sampling rate.
ISBN:
(纸本)0780393457
Based on a novel analog switch, a two-way time-interleaved bipolar track-and hold amplifier is proposed, achieving 7-bit resolution at 4GSa/s sampling rate.
An evolutionary computation method is used to place a set of different microelectronics Center of North Carolina (MCNC) benchmark circuits on traditional symmetrical Field Programmable Gate Array (FPGA). The experimen...
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ISBN:
(纸本)0780393457
An evolutionary computation method is used to place a set of different microelectronics Center of North Carolina (MCNC) benchmark circuits on traditional symmetrical Field Programmable Gate Array (FPGA). The experimental results are compared to the state-of-the-art results from Versatile Placement and Routing (VPR). The proposed algorithm achieves promising performance, in terms of routing channel density.
A novel approach for RF/microwave modeling and optimization of ball grid array (BGA) packages is presented. Using the proposed methodology, wideband models that account for the parasitic contribution of all package co...
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ISBN:
(纸本)0780393457
A novel approach for RF/microwave modeling and optimization of ball grid array (BGA) packages is presented. Using the proposed methodology, wideband models that account for the parasitic contribution of all package components along complete signal paths (chip-to-board) were developed and validated. With the aid of these models, root causes of potential signal integrity (SI) problems were studied. Based on the results obtained, novel design measures were derived.
We present a novel error estimation driven three-dimensional unstructured mesh adaptation technique based on a posteriori error estimation techniques with upper and lower error bounds. In contrast to other work [1, 2]...
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ISBN:
(纸本)0780393457
We present a novel error estimation driven three-dimensional unstructured mesh adaptation technique based on a posteriori error estimation techniques with upper and lower error bounds. In contrast to other work [1, 2] we present this approach in three dimensions using unstructured meshing techniques to potentiate an automatically adaptation of three-dimensional unstructured meshes without any user interaction. The motivation for this approach, the applicability and usability is presented with real-world examples.
A low power consuming VCO core at C-band frequencies is presented. With a supply voltage of 2.5 V and a VCO core current consumption of only 1.5 mA a phase noise between -98 to -104 dBc/Hz is measured. Varying the tun...
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ISBN:
(纸本)0780393457
A low power consuming VCO core at C-band frequencies is presented. With a supply voltage of 2.5 V and a VCO core current consumption of only 1.5 mA a phase noise between -98 to -104 dBc/Hz is measured. Varying the tuning voltage from 1 V to 2.5 V yields a tuning range of 800 MHz with a center frequency of 4.6 GHz. The fully integrated circuit is fabricated on a commercial 0.25 μm BiCMOS process.
The goal of this paper is to identify simulation models for the deposition of silicon dioxide layers from TEOS (Tetraethoxysilane) in a CVD (Chemical Vapor Deposition) process and to calibrate the parameters of these ...
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ISBN:
(纸本)0780393457
The goal of this paper is to identify simulation models for the deposition of silicon dioxide layers from TEOS (Tetraethoxysilane) in a CVD (Chemical Vapor Deposition) process and to calibrate the parameters of these models by comparing simulation results to SEM (Scanning Electron Microscope) images of deposited layers in trenches with different aspect ratios. We describe the three models used and the parameters which lead to the best results for each model which allows us to draw conclusions on the usefulness of the models.
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