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检索条件"任意字段=Conference on Reconfigurable Technology - FPGAs for Computing and Applications"

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An Optimization Method for Accelerating Convolutional Neural Networks Based on FPGA 13

An Optimization Method for Accelerating Convolutional Neural...

引用

13th International conference of Information and Communication technology, ICTech 2024

作者： Li, Dongji Yin, Zhenyu Gao, Wei Hu, MingZhi Du, Jianglin Shenyang University of Chemical Technology Liaoning Key Laboratory of Domestic Industrial Control Platform Technology on Basic Hardware & Software Shenyang China Shenyang Institute of Computing Technology Chinese Academy of Sciences Liaoning Key Laboratory of Domestic Industrial Control Platform Technology on Basic Hardware & Software Shenyang China Shenyang University of Chemical Technology Shenyang China

ISBN: (纸本)9798350376258

Aiming at the problems of slow deployment of convolutional neural networks in the central processing unit (CPU) and high power consumption in the graphics processing unit (GPU), the convolutional neural network (CNN) developed based on the field programmable gate array (FPGA) platform is adopted.) recognition system, which can achieve the effect of improving the operation speed of the algorithm. FPGA is a reconfigurable hardware device that can be programmed to implement various logic functions and can be optimized according to specific applications. Through the design optimization of LeNet5, this paper designs a LeNet_Min network model with fewer parameters. Considering that the calculation amount of the algorithm and the consumption of logic resources are mainly concentrated in the convolution and pooling layers, a pipeline-based dual-channel data model is proposed. Comparison methods. In the pooling layer and activation function of convolutional neural network, flow pooling is designed, and the design method of activation function and pooling layer isomorphism is proposed. The test results show that the recognition speed of Letnet_Min is about 13 times that of the same network model realized by the CPU on the computer side, and higher than that of the GPU, and the system power consumption is only 1.96w. In addition, the system has high versatility and low resource occupation, and can be applied to other neural network models. ©2024 IEEE.

关键词： Convolutional neural networks

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Accelerating Oblivious Transfer with a Pipelined Architecture

Accelerating Oblivious Transfer with a Pipelined Architectur...

引用

2025 Design, Automation and Test in Europe conference, DATE 2025

作者： Li, Xiaolin Yan, Wei Liu, Hongwei Zhang, Yong Hao, Qinfen Liu, Yong Sun, Ninghui Institute of Computing Technology Chinese Academy of Sciences Beijing China Chinese Academy of Sciences Beijing China Zhongguancun Laboratory Beijing China

ISBN: (纸本)9783982674100

With the rapid development of machine learning and big data technologies, ensuring user privacy has become a pressing challenge. Secure multi-party computation offers a solution to this challenge by enabling privacy-preserving computations, but it also incurs significant performance overhead, thus limiting its further application. Our analysis reveals that the oblivious transfer protocol accounts for up to 96.64% of execution time. To address these challenges, we propose POTA, a high-performance pipelined OT hardware acceleration architecture supporting the silent OT protocol. Finally, we implement a POTA prototype on Xilinx VCU129 fpgas. Experimental results demonstrate that under various network settings, POTA achieves significant speedups, with maximum improvements of 22.67x for OT efficiency and 192.57x for basic operations in MPC applications. © 2025 EDAA.

关键词： Pipeline processing systems

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Design of Microstrip Patch Antenna Integrated with Metal Rings, Stubs and Defective Ground for Wideband applications

Design of Microstrip Patch Antenna Integrated with Metal Rin...

引用

2023 International conference on Sustainable computing and Smart Systems, ICSCSS 2023

作者： Ashokkumar, N. Garthima, Sowjanya Gawala, Sai Dinesh Sai Gayathri, B. Diwakar, C. Kavitha, T. Mohan Babu University Dept of Ece Tirupati India Dept of Ece Tirupati India VelTech Rangarajan Dr.Sagunthala R& D Institute of Science and Technology Dept of Ece Tamilnadu India

ISBN: (纸本)9798350333602

There is a growing need for multiband, omnidirectional antennas that are small in size and have a straightforward implementation to gratify the needs of contemporary standard wireless communication systems. RF Notations, satellite communications, WLAN, Bluetooth, and fifth generation (5G) cellular networks are used worldwide. The pattern reconfigurable antenna offers a fresh method of application that will broaden its use in contemporary wireless communications. A broadband microstrip antenna is suggested in this study the limited antenna is a energy cover with two flawed grounds and rectangular metal rings linked by a microstrip line on the top layer. Multiple resonances of the antenna surge's slots, rings and stubs influence the bandwidth all together so as to create detectable wideband radiation. The bandwidth of -10dB impedance ranges varies 5.2 GHz to 5.4 GHz. The antenna gauging 45 x 45 mm possesses a typical gain of 5 dBi. © 2023 IEEE.

关键词： Bandwidth

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Pruning and Early-Exit Co-Optimization for CNN Acceleration on fpgas

Pruning and Early-Exit Co-Optimization for CNN Acceleration ...

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Design, Automation and Test in Europe conference and Exhibition (DATE)

作者： Korol, Guilherme Jordan, Michael Guilherme Rutzig, Mateus Beck Castrillon, Jeronimo Beck, Antonio Carlos Schneider Univ Fed Rio Grande do Sul UFRGS Inst Informat Porto Alegre Brazil Univ Fed Santa Maria UFSM Elect & Comp Dept Santa Maria Brazil Tech Univ Dresden Ctr Adv Elect Dresden Dresden Germany Ctr Scalable Data Analyt & Artificial Intelligenc Dresden Germany

ISBN: (纸本)9798350396249

The challenge of processing heavy-load ML tasks, particularly CNN-based ones at resource-constrained IoT devices, has encouraged the use of edge servers. The edge offers performance levels higher than the end devices and better latency and security levels than the Cloud. On top of that, the rising complexity of ML applications, the ever-increasing number of connected devices, and the current demands for energy efficiency require optimizing such CNN models. Pruning and early-exit are notable optimizations that have been successfully used to alleviate the computational cost of inference. However, these optimizations have not yet been exploited simultaneously: while pruning is usually applied at design time, which involves retraining the CNN before deployment, early-exit is inherently dynamic. In this work, we propose AdaPEx, a framework that exploits the intrinsic reconfigurable FPGA capabilities so both can be cooperatively employed. AdaPEx first explores the trade-off between pruning and early-exit at design-time, creating a design space never exploited in the state-of-the-art. Then, AdaPEx applies FPGA reconfiguration as a means to enable the combined use of pruning and early-exit dynamically. At runtime, this allows matching the inference processing to the current edge conditions and a user-configurable accuracy threshold. In a smart IoT application, AdaPEx processes up to 1.32x more inferences and improves EDP by up to 2.55x over the state-of-the-art FPGA-based FINN accelerator.

关键词： Edge computing Adaptive Inference CNN FPGA

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Design and Investigation of graphene based 2 × 2 CPW feed Vivaldi MIMO Antenna for THz applications

Design and Investigation of graphene based 2 × 2 CPW feed V...

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2023 IEEE International conference on Device Intelligence, computing and Communication Technologies, DICCT 2023

作者： Kushwaha, Ritesh Kumar Shukla, Devesh Tripathi, Yogesh Karuppanan, P. Chandigarh University Dept. Ece Punjab Gharua Mohali India Graphic Era University Dept. of Ece UK Dehradun India Kl Education Foundation Dept. of Cse AP Vaddeswaram India Mnnit Allahabad Dept. of Ece Prayagraj India

ISBN: (纸本)9781665474924

In this paper, 2 × 2 CPW feed Vivaldi multiple-input-multiple-outputs (MIMO) antenna is projected for different Terahertz (THz) applications. Graphene material is utilized over the radiating copper patch of Vivaldi's arm to enhance the conductivity and achieve the frequency reconfigurability of the proposed design. The projected antenna is configured by placing all four elements at the orthogonal position to each other. Also, all the elements are structured on the SiO2 substrate having a dielectric permittivity of 3.75. reconfigurable characteristics are observed by changing the chemical potential with bias voltage of graphene sheets. This Vivaldi-structured MIMO antenna shows good isolation (>25 dB), maximum Gain of 10 dB, and maximum radiation efficiency of around 92.5% in the operating frequency band from 0.65 THz to 1.3 THz. The Envelop-Correlation-Coefficient (ECC) and Diversity-Gain (DG) are also studied to verify the MIMO performance. © 2023 IEEE.

关键词： Graphene

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Frequency reconfigurable Antenna using Advanced Materials: A Study

Frequency Reconfigurable Antenna using Advanced Materials: A...

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Advancements in Electrical, Electronics, Communication, computing and Automation (ICAECA), International conference on

作者： K. Karthika K. Anusha K.Kavitha R. Harshadha D. S. Dharshini N. Arun Sundhar Department of ECE Kumaraguru College of Technology Coimbatore India Department of ECE Velammal College of Engineering and Technology Madurai India

ISBN: (数字)9798331525439

ISBN: (纸本)9798331525446

reconfigurable antennas are essential in modern wireless communication, dynamically adjusting frequency, radiation pattern, and polarization. This paper reviews frequency reconfigurable antennas using advanced materials like graphene, liquid crystals, and metamaterials. Graphene enables wideband tunability and miniaturization for Terahertz (THz) applications, while liquid crystals offer dielectric anisotropy for dynamic reconfiguration and beam steering in adaptive networks. Metamaterials enhance bandwidth, radiation efficiency, and multi-band functionality. These materials significantly improve antenna performance, minimizing the need for multiple fixed-frequency antennas. Further, this review explores various design methodologies of antenna stated earlier, and its applications in 5G, 6G, and satellite communications, aiding next-generation wireless technology development.

关键词： 6G mobile communication Satellite antennas Reviews Graphene Metamaterials Liquid crystals Antennas Satellite communications Wideband Antenna radiation patterns

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reconfigurable Distributed FPGA Cluster Design for Deep Learning Accelerators

Reconfigurable Distributed FPGA Cluster Design for Deep Lear...

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IEEE International conference on Electro-Information technology

作者： Hans Johnson Tianyang Fang Alejandro Perez-Vicente Jafar Saniie Department of Electrical and Computer Engineering Embedded Computing and Signal Processing (ECASP) Research Laboratory Illinois Institute of Technology Chicago IL U.S.A.

We propose a distributed system based on low-power embedded fpgas designed for edge computing applications focused on exploring distributing scheduling optimizations for Deep Learning (DL) workloads to obtain the best performance regarding latency and power efficiency. Our cluster was modular throughout the experiment, and we have implementations that consist of up to 12 Zynq-7020 chip-based boards as well as 5 UltraScale+ MPSoC FPGA boards connected through an ethernet switch, and the cluster will evaluate configurable Deep Learning Accelerator (DLA) Versatile Tensor Accelerator (VTA). This adaptable distributed architecture is distinguished by its capacity to evaluate and manage neural network workloads in numerous configurations which enables users to conduct multiple experiments tailored to their specific application needs. The proposed system can simultaneously execute diverse Neural Network (NN) models, arrange the computation graph in a pipeline structure, and manually allocate greater resources to the most computationally intensive layers of the NN graph.

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Area Efficient Hardware Architecture of Skeletonization for 2D Images 12

Area Efficient Hardware Architecture of Skeletonization for ...

引用

12th International conference on computing Communication and Networking Technologies, ICCCNT 2021

作者： Verma, Kajal Meenpal, T. Jaiswal, Kokila Bharti Dept. of Electronics & Comm. National Institute of Technology CG Raipur492010 India

ISBN: (纸本)9781728185958

Thinning algorithms (TA) are commonly utilized to extract an object's functioning parameters. The skeletonization algorithm (SA) comprises of broad range of complex mathematics and involves lengthy implementations when dealing with real time (RT). Algorithms on hardware platforms can be applied to boost the efficiency of image processing applications. reconfigurable equipment used as hardware module in the field of Field Programmable Gate Arrays (fpgas) that can offer high performance with lower latency are being used for real world applications. fpgas' inherent reprogramming capacity allows them application versatility while maintaining the efficiency benefits of a particular approach for an operation. Just real-time hardware devices can be used with fewer tools as in real-time implementations image sizes get larger. In the proposed architecture, the 8x8 image pixels are processed in one 3x3 window per clock cycle instead of one pixel per cycle. The proposed design shows significant reduction in area. © 2021 IEEE.

关键词： Pixels

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An Architecture-Independent CGRA Compiler enabling OpenMP applications 36

An Architecture-Independent CGRA Compiler enabling OpenMP Ap...

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36th IEEE International Parallel and Distributed Processing Symposium (IEEE IPDPS)

作者： Kojima, Takuya Adhi, Boma Cortes, Carlos Tan, Yiyu Sano, Kentaro Univ Tokyo Grad Sch Informat Sci & Technol Tokyo Japan RIKEN Ctr Computat Sci R CCS Kobe Hyogo Japan

ISBN: (纸本)9781665497473

Coarse-Grained reconfigurable architecture (CGRA) is a promising platform for HPC systems in the post-Moore's era. A single-source programming model is essential for practical heterogeneous computing. However, we do not have a canonical programming model and a frontend compiler for it. Existing versatile CGRAs, in respect to their execution model, computational capability, and system structure, magnify the difficulty of orchestrating the compiler techniques. It consequently forces designers of the CGRAs to develop the compiler from scratch, working only for their architectures. Such an approach is outdated, given other successful accelerators like GPU and fpgas. This paper presents a new CGRA compiler framework in order to reduce development efforts of CGRA applications. OpenMP annotated codes are fed into the proposed compiler, as recent OpenMP support device offloading to the accelerators. This property improves the reusability of the existing source code for HPC workloads. The design of the compiler is inspired by LLVM, which is the most famous compiler framework so that the frontend is built to be architecture-independent. In this work, we demonstrate that the proposed compiler can handle different types of CGRAs without changing the source codes. In addition, we discuss the effect of architecture-independent optimization algorithms. We also provide an open-source implementation of the compiler framework at https://***/hal-lab-u-tokyo/CGRAOmp.

关键词： Codes Runtime Computational modeling Graphics processing units Programming Heterogeneous networks reconfigurable architectures

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State of the Art on Stacked Intelligent Metasurfaces Communication, Sensing and computing in the Wave Domain

State of the Art on Stacked Intelligent Metasurfaces Communi...

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European conference on Antennas and Propagation, EuCAP

作者： Marco Di Renzo CNRS CentraleSupélec Laboratoire des Signaux et Systémes Université Paris-Saclay Gif-sur-Yvette France Department of Engineering Centre for Telecommunications Research King's College London London United Kingdom

ISBN: (数字)9788831299107

ISBN: (纸本)9798350366327

Stacked intelligent metasurface (SIM) is an emerging technology that capitalizes on reconfigurable metasurfaces for several applications in wireless communications. SIM is considered an enabler for integrating communication, sensing and computing in a unique platform. In this paper, we offer a survey on the state of the art of SIM for wireless communications.

关键词： Wireless communication Surveys Europe Information processing reconfigurable intelligent surfaces Electromagnetic modeling Metasurfaces Hardware Sensors Optimization

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