The proceedings contain 115 papers. The topics discussed include: mapping precedence-constrained simulation tasks;a multicomputer simulation of the Galileo spacecraft command and data subsystem;resource management in ...
ISBN:
(纸本)0818622903
The proceedings contain 115 papers. The topics discussed include: mapping precedence-constrained simulation tasks;a multicomputer simulation of the Galileo spacecraft command and data subsystem;resource management in a large reconfigurable transputer-based system;fault tolerance of the cyclic buddy subcube location scheme in hypercubes;automatic data partitioning on distributed memory multiprocessors;automatic support for data distribution;efficientalgorithms for scheduling tasks on hypercubes;architectural support for dynamic data distribution and dynamic scheduling;communication abstraction and process refinement;scatter scheduling for problems with unpredictable structures;and probabilistic analysis of the optimal efficiency of the multi-level dynamic load balancing scheme.
The proceedings contain 27 papers. The special focus in this conference is on Foundations of software Technology and Theoretical Computer Science. The topics include: A linear-time recognition algorithm for P -reducib...
ISBN:
(纸本)9783540520481
The proceedings contain 27 papers. The special focus in this conference is on Foundations of software Technology and Theoretical Computer Science. The topics include: A linear-time recognition algorithm for P -reducible graphs;impossibility results in the presence of multiple faulty processes;an adaptive regulator approach for the design of load sharing algorithms;an algebraic compositional semantics of an object oriented notation with concurrency;an axiomatization of event structures;deducing causal relationships in CCS;annotated program transformations;algebraic software development concepts for module and configuration families;on the limitations of locally robust positive reductions;query evaluation with null values: How complex is completeness?;average case complexity analysis of RETE pattern-match algorithm and average size of join in databases;fast parallel approximations of the maximum weighted cut problem through derandomization;the frobenius problem;an efficient implicit data structure for path testing and searching in rooted trees and forests;robust decompositions of polyhedra;gate matrix layout revisited: Algorithmic performance and probabilistic analysis;parallel parsing on a one-way linear array of finite-state machines;energy-time trade-offs in VLSI computations;time and real-time in programs;a proof system for communicating processes with value-passing (extended abstract);a new class of separators and planarity of chordal graphs;optimal parallel algorithms on circular-arc graphs;algebraic properties of the space of multivalued and paraconsistent logic programs;an autoepistemic logical view of knowledge base;a natural semantics for logic programs with negation.
This paper describes a new variant of the segment tree approach for VLSI design rule checking. The best known algorithms to date for flat VLSI design rule checking require O(n log n) expected time and PI expected spac...
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This paper describes a new variant of the segment tree approach for VLSI design rule checking. The best known algorithms to date for flat VLSI design rule checking require O(n log n) expected time and PI expected space, where n is the total number of edges on a mask layer of the chip. We present a new algorithm that can run in O(n log m) expected time, where m is the maximum feature size on a particular mask layer. Since the maximum feature size must be bounded by the height of a chip, i.e. m ≤ O(√n), the new algorithm is adaptively more efficient than O(n log n). For layers such as diffusion or contact windows where the maximum feature size is independent of chip size, i.e. m = O(1), the new algorithm runs in O(n) expected time, a definite improvement. The improved time efficiency is achieved without sacrificing (√n) expected space complexity.
A method for efficient complication of circuits which is used in a commercially available fault grader is described. datastructures and algorithms are presented which can be used in processing circuits in a textural ...
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A method for efficient complication of circuits which is used in a commercially available fault grader is described. datastructures and algorithms are presented which can be used in processing circuits in a textural or schematic format. Performance is documented by showing the results for various circuits. It is shown that on the average, the compiler can process 2000 lines of CDL text per minute, and the loader and flattener process 10300 flattened nets per minute. These times show that incremental circuit changes can be performed in analysis tools without using a separate complication procedure. This efficiency is possible by creating datastructures which require minimal manipulation and by the organization of data in the circuit library. Memory utilization is kept to a minimum by optimizing the location of circuit information on the datastructures.< >
The domination and Hamilton circuit problems are of interest both in algorithm design and complexity theory. The domination problem has applications in facility location and the Hamilton circuit problem has applicatio...
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We present algorithms for performing connectivity analysis, transistor identification, and boolean geometric operations with region numbering. Previous methods all require O(n) space where n is the number of edges in ...
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ISBN:
(纸本)9780818600265
We present algorithms for performing connectivity analysis, transistor identification, and boolean geometric operations with region numbering. Previous methods all require O(n) space where n is the number of edges in the circuit artwork; our method takes only O(√n) space and can therefore handle circuits of any foreseeable size. Our algorithms are based on traditional scanline techniques in such a way that any implementation of our method will be at least as fast, as well as more compact. Statistics on one such implementation are presented.
Hierarchical representations of 3-dimensional objects are both time and spaceefficient. They typically consist of trees whose branches represent bounding volumes and whose terminal nodes represent primitive object el...
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ISBN:
(纸本)0897910214
Hierarchical representations of 3-dimensional objects are both time and spaceefficient. They typically consist of trees whose branches represent bounding volumes and whose terminal nodes represent primitive object elements (usually polygons). This paper describes a method whereby the object space is represented entirely by a hierarchical data structure consisting of bounding volumes, with no other form of representation. This homogeneity allows the visible surface rendering to be performed simply and efficiently. The bounding volumes selected for this algorithm are parallelepipeds oriented to minimize their size. With this representation, any surface can be rendered since in the limit the bounding volumes make up a point representation of the object. The advantage is that the visibility calculations consist only of a search through the data structure to determine the correspondence between terminal level bounding volumes and the current pixel. For ray tracing algorithms, this means that a simplified operation will produce the point of intersection of each ray with the bounding volumes. Memory requirements are minimized by expanding or fetching the lower levels of the hierarchy only when required. Because the viewing process has a single operation and primitive type, the software or hardware chosen to implement the search can be highly optimized for very fast execution. � ACM. All rights reserved.
It has previously been shown that automatically generated digital signal processings software can incorporate precomputed, data independent, program control and data access parameters. Such software is "time-effi...
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It has previously been shown that automatically generated digital signal processings software can incorporate precomputed, data independent, program control and data access parameters. Such software is "time-efficient"; that is, at run time, only data dependent computation occurs. In this paper, alternative program structures, all of which accommondate the autogen feature, are examined for time/ space (memory) efficiency considerations on both conventional machines and those having cache memories. A novel structure derived from threaded code -- knotted code -- is proposed and shown to incorporate an excellent time/space tradeoff.
This paper deals with a programming language under development at NASA's Langley Research Center for theCDC STAR-100. The design goals for the language are that it be basic in design and able to be extended as dee...
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This Festschrift volume, published in honour of J. Ian Munro, contains contributions written by some of his colleagues, former students, and friends. In celebration of his 66th birthday the colloquium "conference...
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ISBN:
(数字)9783642402739
ISBN:
(纸本)9783642402722
This Festschrift volume, published in honour of J. Ian Munro, contains contributions written by some of his colleagues, former students, and friends. In celebration of his 66th birthday the colloquium "conference on spaceefficientdatastructures, streams and algorithms" was held in Waterloo, ON, Canada, during August 15-16, 2013. The articles presented herein cover some of the main topics of Ian's research interests. Together they give a good overall perspective of the last 40 years of research in algorithms and datastructures.
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