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Proceedings of the IEE Colloquium on Advanced developments in Microelectronic engineering

作者： Bushehri, E. Bratov, v. Staroselsky, v. Schlichter, T. Timoshenkov, v. Saber, M.

Over the past few years there has been a steady progress in the development of digital GaAs technologies providing vLSI complexity to the high speed system designers. The improvements in the fabrication process have resulted in the emergence of over one million transistor GaAs technologies to support ultra high speed data rates. The purpose of this paper is to show the current state of the technology for high speed data and telecommunication circuits requiring vLSI complexity. The issues covered are the Logic gate design and impact of algorithm on performance. An adder circuit configuration is also presented to give an indication of the speed and power dissipation at higher levels of integration.

关键词： vLSI circuits

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CLIMACS prephase A, design of a medium resolution SAR for land applications

CLIMACS prephase A, design of a medium resolution SAR for la...

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Conference on Microwave Sensing and Synthetic Aperture Radar

作者： Adrian, v Suinot, N Lin, CC Alcatel Espace (France) ESTEC (Netherlands)

ISBN: (纸本)0819423629

This paper gives the current status of a medium resolution SAR definition prephase A study. The objective of such a novel SAR instrument is the global monitoring of land surfaces and polar region. The study was conducted in order to analyze all the possible concepts that could be compliant with this mission definition. Several trade-off were performed in order to select an instrument concept compatible with large coverage, medium spatial resolution, good absolute radiometric accuracy, low mass and low power consumption.

关键词： Antennas Synthetic aperture radar Radar Spatial resolution Polarization L band Radiometric resolution Calibration Space operations Speckle

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New technology developments make passive laser/fiber alignment a reality

New technology developments make passive laser/fiber alignme...

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Laser Diode Chip and Packaging Technology

作者： Collins, John v. MacDonald, Brian M. Lealman, I.F. Jones, C.A. BT Labs. Ipswich Suffolk UK

ISBN: (纸本)0819419745

In this paper we report on the combination of a precision cleaved large spot laser and a silicon micromachined optical bench to achieve high coupling efficiencies by purely passive alignment. Coupling efficiencies of over 50% have been obtained by passively aligning precision cleaved large spot sized lasers to singlemode fiber on a silicon micromachined substrate. This is the highest known coupling figure reported for passive alignment. The packaging of semiconductor laser chips has always presented a range of technical problems due to the sub-micron tolerances required to obtain optimum coupling of the small laser spot size to the larger spot size of a singlemode fiber. Lasers have been developed that can ease these tolerances by matching the laser spot size to that of cleaved fiber. This is achieved by tapering the active layer to adiabatically expand the laser mode size. A method of controlling the physical size of laser diode chips to sub-micron accuracy has enabled these lasers to be bonded against substantial alignment features on a silicon micro-engineered optical bench which also includes a v-groove into which a cleaved single-mode optical fiber can be fixed. Results are also discussed for an alternative ferrule-based, non-hermetic laser packaging design which utilizes the relaxed alignment tolerances of the large spot lasers to give simple package assembly suitable for automation. Both of the packaging technologies discussed offer a viable route to obtaining the very low cost optoelectronic components required for fiber to the home networks.

关键词： optical fiber coupling

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A highly accurate mesfet model to predict the nonlinear behavior of a linear power amplifier

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MICROWAvE AND optical TECHNOLOGY LETTERS 1996年第4期13卷 184-186页

作者： Roh, TM Suh, YS Kim, YS Park, WS Kim, BM Department of Electronic and Electrical Engineering Microwave Application Research Center Pohang University of Science and Technology San 31 Hyoja-Dong Pohang Kyungbuk 790-784 Korea Department of Electronic and Electrical Engineering Microwave Application Research Center Pohang University of Science and Technology San 31 Hyoja-Dong Pohang Kyungbuk 790-784 Korea Department of Electronic and Electrical Engineering Microwave Application Research Center Pohang University of Science and Technology San 31 Hyoja-Dong Pohang Kyungbuk 790-784 Korea Department of Electronic and Electrical Engineering Microwave Application Research Center Pohang University of Science and Technology San 31 Hyoja-Dong Pohang Kyungbuk 790-784 Korea Department of Electronic and Electrical Engineering Microwave Application Research Center Pohang University of Science and Technology San 31 Hyoja-Dong Pohang Kyungbuk 790-784 Korea

A new channel current model to accurately represent I-v dimes has been developed, and its effect on the nonlinear parameters of MESFET models such as I-ds, C-gs, C-gd, and C-ds has been investigated for lineal power amplifier design. The channel current model should be constructed from pulsed I-v data at operation bias point and die nonlinear behavior of a GaAs MESFET is strongly dependent on the C-gs model. (C) 1996 John Wiley & Sons, Inc.

关键词： nonlinear MESFET modeling linear power amplifier

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Novel high-speed architecture for machine vision applications

Novel high-speed architecture for machine vision application...

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Machine vision Applications, Architectures, and Systems Integration v

作者： Farroha, Bassam S. Deshmukh, R.G. Astronaut Memorial Space Science Center BCC P.O. Box 1274 Melbourne FL 32902 United States Electrical and Computer Engineering Dept. Florida Institute of Technology 150 W. University Blvd. Melbourne FL 32901 United States

This paper focuses on producing a state-of-the-art technique for designing an image recognition system for machine vision applications. The motivation behind the new system design is to provide a unique methodology, using strategic design techniques, to implement a system that addresses real-world image recognition applications. The introduction of application-specific, massively parallel array of processors, where low-level processing is accomplished on reconfigurable hardware structures, highlights the scheme. The system was built and simulated on a vLSI chip and results were verified using Electric Rules Check and Harris Timing Analysis examination tools. The system is composed of there functional layers and a main control unit. The top two layers are used for image loading and manipulation and the third layer is used for processing the pixel values. Each layer has a local control unit, while the main control unit oversees the operations of the whole system and synchronizes the processes. A CAD designer tool was implemented to facilitate the design and reconfiguration f the low-level processing elements. This tool has a modular library of processing elements and a logic verification algorithm. The current architecture of the chip was built to accommodate a 64 by 64 array with unlimited stackable characteristics to handle larger images. This paper will present the top level design layers, the distributed control, and demonstrate that the proposed system is image complexity invariant. The massively parallel approach of transferring data and control signals and the processing of image data is presented. The system takes into consideration cost, size, speed,and reliability needs of today's applications. ©2005 Copyright SPIE - The International Society for optical engineering.

关键词： Computer vision

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Hardware and software developments for a closed-loop infrared mission simulation test capability

Hardware and software developments for a closed-loop infrare...

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Conference on Targets and Backgrounds - Characterization and Representation II

作者： Fugerer, RH Hervig, DJ Holt, LL SVERDRUP TECHNOL INC AEDC OPERATARNOLD AFBTN 37889

ISBN: (纸本)0819421235

The Arnold engineering Development Center (AEDC) scene generation test capability (SGTC) program has completed the development of a laser based direct write scene generation (DWSG) facility that provides dynamic mission simulation testing for infrared (IR) focal plane arrays (FPAs) and their associated signal processing electronics. The AEDC DWSG focal plane array test capability (FPATC) includes lasers operating at 0.514, 1.06, 5.4, or 10.6 micrometer, and acousto-optic deflectors (AODs) which modulate the laser beam position and amplitude. Complex radio frequency (rf) electronics controls each AOD by providing multi-frequency inputs. These inputs produce a highly accurate and independent multi-beam deflection or 'rake,' that is swept across the FPA sensor under test. Each rf amplitude input to an AOD translates into an accurate and independent beam intensity in the rake. Issues such as scene fidelity, sensor frame rates, scenario length, and real-time laser beam position adjustments require rf control electronics that employs the use of advanced analog and digital signal processing techniques and designs. By implementing flexible system architectures in the electronics, the overall capability of the DWSG to adapt to emerging test requirement is greatly enhanced. Presented in this paper is an overview of the signal processing methodology and designs required to handle the DWSG requirement. Further, the paper summarizes the current status of recent AEDC technology efforts tasked with the implementation of real-time and closed-loop scene manipulation including sensor optical simulation using the DWSG. The paper describes a proof-of-principle (PoP) demonstration which used high speed digital signal processors inherent in the DWSG electronic design to compute the rotation, translation, optical transfer function convolution, and system calibration functions during scene projection.

关键词： scene infrared FPA sensor analog digital RF acousto-optic deflector digital synthesizer frame

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Micro-Hall magnetic sensors with high magnetic sensitivity based on III-v heterostructures

Micro-Hall magnetic sensors with high magnetic sensitivity b...

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3rd International Conference on Intelligent Materials/3rd European Conference on Smart Structures and Materials

作者： DelMedico, S Benyattou, T Guillot, G venet, T Gendry, M Tardy, J Chovet, A INST NATL SCI APPL PHYS MAT LABURA CNRS 358F-69621 VILLEURBANNEFRANCE

ISBN: (纸本)0819421650

In this work, we propose solutions based on engineering of III-v heterostructures to develop new types of semiconductor magnetic sensors. These micro-Hall sensors use the properties of a 2D electron gas and the benefit of pseudomorphic material, in which both the alloy composition and the built-in strain offer additional degrees of freedom for band structure tailoring, to exhibit high magnetic sensitivity, good linearity, low temperature coefficient and high resolution. With the growth optimization which is described, two pseudomorphic In_0.75Ga_0.25As/In_0.52Al_0.48As heterostructures were grown on a semi- insulating InP substrate by molecular beam epitaxy. To understand better the influence of the heterostructure design on its electronic properties, a model involving the self-consistent solution of the Poisson and Schrodinger equations using the Fermi-Dirac statistics has been developed. These results have been used to optimize the structure design. A magnetic sensitivity of 346 v/AT with a temperature coefficient of -230 ppm/ degree(s)C between -80 degree(s)C and 85 degree(s)C has been obtained. The device show good linearity against magnetic field and also against the supply current. High signal-to-noise ratios corresponding to minimal magnetic field of 350 nT/Hz^1/2 at 100 Hz and 120 nT/Hz^1/2 at 1 kHz have been measured.

关键词： Magnetism Magnetic sensors Heterojunctions Sensors Doping Indium gallium arsenide Information operations Magnetic semiconductors Semiconductors Statistical modeling

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Revision and upgrading of seismic design specifications

Revision and upgrading of seismic design specifications

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Seismic Rehabilitation of Concrete Structures at 1994 ACI Spring Convention

作者： Nutt, Richard v. CA United States

ISBN: (纸本)9780870316586

Applied Technology Council (ATC) is conducting a California Department of Transportation (Caltrans) sponsored project to review and revise existing standards, performance criteria, specifications, and practices for the seismic design and construction of new bridge structures within California. The goal is to provide standards and criteria that will ensure that California bridge structures of all types perform well in earthquakes. Specifically, as affirmed by the Governor following the 1989 Loma Prieta earthquake, all transportation structures must be seismically safe and important transportation structures must maintain their function after earthquakes. The project builds on developments in bridge seismic design that have been made over the past twenty years. It uses results from current research plus observations made in recent earthquakes to identify several significant improvements that can be made to the current Caltrans' Bridge design Specifications (BDS). At the present time a draft revised BDS and Commentary have been developed. The revised BDS is based on new performance criteria that was developed by Caltrans, it's independent Seismic Advisory Board and ATC. Specific improvements to design procedures are made in several areas including seismic loading, foundation design, dynamic analysis, and concrete and steel design. The project is ongoing and the draft BDS will continue to be evaluated and most likely revised as the project continues. In addition to an overall review by the panel of 13 technical advisors selected for this project, independent external reviews will be conducted by selected experts in various aspects of seismic design. Several trial designs will also be performed using the draft provisions. The results of these trial designs will help point out deficiencies in the draft specifications that can then be improved prior to their being adopted for general use. In the end this project will produce bridge seismic design criteria that reflects a c

关键词： Seismic design

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Ultra high speed sub-micron gallium arsenide vLSI

Ultra high speed sub-micron gallium arsenide VLSI

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IEE Colloquium on Advanced developments in Microelectronic engineering (Digest No: 1996/235)

作者： E. Bushehri v. Bratov v. Staroselsky T. Schlichter v. Timoshenkov M. Saber

关键词： Gallium compounds

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Past, present and future for dependency in C&I

Nuclear Engineer

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Nuclear Engineer 1996年第1期37卷 16-19页

作者： Brand, v.P.

This work addresses the issues associated with current developments in C&I systems in Nuclear Installations, in the light of their vital importance to the safe and economic operations of such part. The ARM issues in C&I systems that relate to both engineering design and ARM assessment are highlighted. Finally, the issues in relation to dependency are discussed, questions regarding what is being done to address existing (but unresolved) are asked and new issues as well as the need for forward thinking by designers, reliability assessors, utilities and regulators alike are accounted.

关键词： Nuclear instrumentation

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