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Electronics design Automation (ISEDA), International Symposium of

作者： Zhaohai Di Yue Zhao Yanna Luo Haoqing Xu Lingfei Wang Jianhui Bu Yongliang Li Zhenhua Wu Institute of Microelectronics Chinese Academy of Sciences Beijing China

ISBN: (数字)9798350352030

ISBN: (纸本)9798350352047

In this work, we propose an all-vertical-transistor based 3D heterogeneous 6T SRAM design. Self-align Si vertical gate-all-around (vGAA) FEOL CFET inverters and vertical channel all around (vCAA) BEOL-compatible IGZO pass gates (PG) are stacked vertically again in 3 layers within a 2T footprint area. State-of-the-art Virtual Fab process emulation validates the hetero-integration flow and generate near realistic geometry of not only the transistor but also the interconnect of a 6T SRAM cell. Furthermore, by physics-based simulation augmented fine tuning and extending the experimental validated device compact model and the interconnect RC, geometry- and parasitic-aware device to circuit DTCO analysis of the 3D heterogeneous 6T SRAM is performed. The hetero-integration of IGZO vCAA PG and vGAA CFET inverters showed 59% Read Static Noise Margin (RSNM) enhancement, 86% static leakage power reduction, and 53% area reduction.

关键词： Solid modeling Three-dimensional displays Integrated circuit interconnections Logic gates SRAM cells Inverters Stability analysis

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Multi-dimensional Parameter Fitting Method for Device Aging modeling

Multi-dimensional Parameter Fitting Method for Device Aging ...

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Asia Pacific Conference on Postgraduate Research in microelectronics & Electronics (PrimeAsia)

作者： Qianqian Sang Xinhuan Yang Chuanzheng Wang Shuo Wang Liang Wang Yuanfu Zhao School of Electronic Information Hangzhou Dianzi University Hangzhou China Beijing Microelectronics Technology Institute Beijing China

As semiconductor devices become smaller and smaller, device aging simulation plays an increasingly important role in the overall circuit design. In recent years, the research of device aging modeling has gradually become the focus of researchers. Most of the current aging modeling methods only consider the degradation of one parameter, resulting in inaccurate simulation of the model in actual testing. In response to this problem, this paper establishes an HCI(Hot Carrier Injection) aging model on NMOS devices, focusing on the simultaneous degradation of multiple parameters (drain current in saturation region $(I_{dsat})$ and threshold voltage $(v_{th})$ in the process of extracting model parameters. simulation results show that this method can improve the fitting accuracy of aging model.

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Applying Hodgkin-Huxley Neuron Model for Perovskite Memristor in Circuit simulation

Applying Hodgkin-Huxley Neuron Model for Perovskite Memristo...

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Metrology for Extended Reality, Artificial Intelligence and Neural Engineering (MetroXRAINE), IEEE International Conference on

作者： Mostafa Shooshtari Manuel Jiménez Través Saeideh Pahlavan Teresa Serrano-Gotarredona Bernabé Linares-Barranco The Neuromorphic Group Institute of Microelectronics of Seville (IMSE-CNM) CSIC University of Seville. Sevilla Spain

ISBN: (数字)9798350378009

ISBN: (纸本)9798350378016

The convergence of memristor technology and neuromorphic computing represents a paradigm shift in the field of electronics and artificial intelligence (AI). Memristors, with their ability to remember past electrical states, offer a fundamental building block for the realization of energy-efficient and adaptive electronic systems. Meanwhile, neuromorphic computing, inspired by the brain's architecture and functionality, aims to emulate its efficiency and adaptability in electronic circuits. This paper introduces a mathematical model, the Hodgkin-Huxley model, to describe the behavior of metal halide perovskite (MHP) memristors within the framework of neuromorphic computing. By extending a set of nonlinear differential equations and implementing them in Verilog-A code, the model facilitates the simulation and analysis of perovskite memristors within electronic circuits. Through comprehensive simulations, the model successfully reproduces both volatile and nonvolatile switching behaviors observed in perovskite-based memristors, demonstrating its versatility and applicability in electronic circuit design. The simulation results demonstrate that with appropriate excitation, the output current in the memristor nonlinearly tracks the input voltage, resulting in the observation of the initial high-resistance (HRS) state and the low-resistance state (LRS) in the presented structures. Moreover, Altering the scan and range of the input voltage can subsequently modify the resistance of the memristors and the threshold voltage. The design is presented, along with its corresponding simulation results using the Cadence Virtuoso toolset. The proposed MHP memristors structure combines the density and scalability advantages of memristive crossbar arrays with the feasibility of implementing them at the top of the CMOS layer. These findings offer insights into the potential of perovskite memristors to revolutionize various fields, including artificial intelligence, energy-efficient com

关键词： Adaptation models Electric potential Neuromorphic engineering Computational modeling Memristors Perovskites Mathematical models Integrated circuit modeling Artificial intelligence Electronic circuits

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Space Mapping Optimization Method for Four-Order Parallel Coupled Substrate Integrated Suspended Line Bandpass Filter

Space Mapping Optimization Method for Four-Order Parallel Co...

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International Applied Computational Electromagnetics Society Symposium (ACES)

作者： Shuang Wu Feng Feng Jingpei Zhang Kaixue Ma Qi-Jun Zhang School of Microelectronics Tianjin University Tianjin China Department of Electronics Carleton University Ottawa Canada

ISBN: (数字)9798350355581

ISBN: (纸本)9798350355598

For substrate integrated suspended line (SISL) with complex structure, design optimization using EM simulation software requires a significant time cost. Space mapping (SM) optimization provides a solution to such problems, which can accelerate EM optimization. It has both the computational efficiency of coarse models and the accuracy of fine models. In this paper, standard SM optimization and parallel SM optimization are applied to the design optimization of the four-order parallel coupled SISL bandpass filter. The effectiveness of the SM method applied to SISL is verified through the analysis of experimental results.

关键词： Band-pass filters Costs Accuracy Computational modeling Space mapping Computational electromagnetics Software Computational efficiency Substrates Standards

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Automated Surrogate modeling and Optimization for 4th-Order Transformer-Based Resonator

Automated Surrogate Modeling and Optimization for 4th-Order ...

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Radio Frequency and Antenna Technologies (iWRF&AT), IEEE International Workshop on

作者： Hongzhen Yi Qingsha S. Cheng Quan Pan Department of Electrical and Electronic Engineering Southern University of Science and Technology Shenzhen China School of Microelectronics Southern University of Science and Technology Shenzhen China

ISBN: (数字)9798350384765

ISBN: (纸本)9798350384772

We propose an automated and efficient design method for a 4th-order transformer-based resonator for injection-locked frequency divider (ILFD). The method constructs a surrogate model using the data automatically collected from EM simulation (CST) of transformers using MATLAB. In the procedure, using a set of specifications required by ILFD, the best set of geometry parameter values of 4th-order transformer and capacitance values of tuning capacitors are obtained through a "cascade" particle swarm optimization (PSO) method. Applying the optimized results to an ILFD, the locking range (LR) of optimized 4th-order transformer-based resonator layout achieves LR of 40.13% (24.5-36.8 GHz).

关键词： Geometry Layout Resonant frequency Frequency conversion Mathematical models Integrated circuit modeling Particle swarm optimization

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Deductive Matrix Synthesis for Fault simulation

Deductive Matrix Synthesis for Fault Simulation

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International Conference on CAD Systems in microelectronics (CADSM)

作者： Wajeb Gharibi Vladimir Hahanov David Devadze Abdullayev Vugar Hacimahmud Svetlana Chumachenko Zaza Davitadze Eugenia Litvinova Ivan Hahanov University of Missouri Kansas City MO USA Design Automation Department Kharkiv National University of Radioelectronics Kharkiv Ukraine Department of Computer Sciences Batumi Shota Rustaveli State University Batumi Georgia Computer Engineering Department Azerbaijan State Oil and Industry University Baku Azerbaijan

Elements of logical vector computing are proposed, which are focused on fault simulation in digital devices. The concept of a logical vector is introduced for simulation of a single fault as addresses. For the first time the method of synthesis of deductive matrices on the logical vector of functionality is considered. The deductive matrix is used to generate tests for diagnosing a functional element and simulating faults to verify the quality of tests. A compact vector form for specifying graph structures is proposed. The advantages of fault simulation on logical vectors are shown, which lies in the high parallelism of processing faults as addresses. All models and methods are original, the validity of which is confirmed by numerous examples of the synthesis of the failure simulation matrix.

关键词： Solid modeling Computational modeling Personal digital devices Parallel processing

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A unified model for TCAD simulation of the charge generated in semiconductors by low-energy alpha particles and protons

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microelectronics RELIABILITY 2022年 138卷

作者： Pocaterra, M. Ciappa, M. Pfaeffli, P. Swiss Fed Inst Technol Integrated Syst Lab Zurich Switzerland Synopsys Switzerland LLC Zurich Switzerland

TCAD simulation of the generation and transport of ionization tracks produced in semiconductors by ions is very relevant for device reliability, as well for the design of radiation detectors. This paper presents a unified model calibrated and validated for the charge generated along the ionization track of low-energy alpha particles and protons in Si, SiC, Ge, GaAs, and GaN. The new model presents several advantages over the traditional ones, in particular the ease of calibration, the numerical stability, and capability to be extended to other ion types.

关键词： TCAD simulation of the ionization tracks of alpha particles and protons in semiconductors TCAD modeling TCAD simulation of power devices Crystal Ball model Testing for terrestrial cosmic rays SEB events

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Circuitry of Micro-Power JFET and CMOS Input Differential Stages for Op-Amps on Silicon and Wide-Band Semiconductors

Circuitry of Micro-Power JFET and CMOS Input Differential St...

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2022 International Siberian Conference on Control and Communications, SIBCON 2022

作者： Chumakov, Vladislav Prokopenko, Nikolay Titov, Alexey Don State Technical University Rostov-on-Don Russia Don State Technical University Institute for Design Problems in Microelectronics of RAS Zelenograd Rostov-on-Don Russia Southern Federal University Rostov-on-Don Russia

ISBN: (纸本)9781665476287

The study presents an analysis of universal JFET and CMOS differential stages (DS) circuits. Such cascades provide a smaller range of transistor currents (10-100 $\mu$A) compared to classical cascades. The described DSs are implemented on combined process technologies, and therefore can be designed on JFET, BJT or CMOS chips. In addition, gallium arsenide, diamond gallium nitride, thin-film TFT and silicon carbide transistors. A computer simulation of the static modes of the developed DSs and their current dependences is presented. The results of GaAs DS modeling and its frequency dependence are presented. © 2022 IEEE.

关键词： Thin films

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A High-Resolution SAR ADC design with Linearity Enhancement Achieving Signal-to-Noise-and- Distortion-Ratio of 97.4dB 5

A High-Resolution SAR ADC Design with Linearity Enhancement ...

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5th IEEE International Conference on Electronics Technology, ICET 2022

作者： Chen, Zulin Wang, Zongmin Zhang, Tieliang Yang, Song Yang, Long Beijing Microelectronics Technology Institute China Academy of Launch Vehicle Technology Beijing100076 China

ISBN: (纸本)9781665485081

Spaceborne industry and medical imaging equipment have been developed rapidly these years, resulting in the demand for system performance, integration level and energy efficiency in their signal chains. SAR ADCs that reside in the region where it runs faster than 1MS/s with 16-bit to 18-bit resolution have good prospects in these fields. A high-resolution SAR ADC with Signal-to-Noise-and-Distortion-Ratio (SNDR) enhanced by digital calibration is proposed based on the 0.25 mu m Mixed-Signal CMOS process, using a 5V external reference while the digital works in 2.5V. design issues across voltage domains are discussed. SPECTRE and MATLAB tools are used for modeling and simulation. Results show that the SNDR is 70.8dB before calibration, which gives an ENOB value of 11.47-bit. While after calibration, the SNDR is 97.4dB, reaches an ENOB value of 15.88-bit. © 2022 IEEE.

关键词： Calibration

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Deterministic Policy Gradient based Reinforcement Learning for Current Control of Hybrid Active Power Filter

Deterministic Policy Gradient based Reinforcement Learning f...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Cheng Gong Chio-Hong Leong Chi-Seng Lam State Key Laboratory of Analog and Mixed-Signal VLSI University of Macau Macau China Institute of Microelectronics University of Macau Macau China Department of Electrical and Computer Engineering Faculty of Science and Technology University of Macau Macau China

ISBN: (数字)9798350330991

ISBN: (纸本)9798350331004

The hybrid active power filter (HAPF) emerges as a cost-effective remedy for power quality challenges in medium voltage power systems. The success of HAPF, crucially, hinges on the efficacy of its current control mechanism. This paper introduces a novel approach by proposing a deterministic policy gradient based reinforcement learning (DPG-RL) as the current control strategy for HAPF. In stark contrast to conventional model-based control methods, the DPG-RL leverages artificial intelligence (AI) technology, rendering it model-free and capable of dynamically seeking the optimal control policy to enhance HAPF performance. A notable advantage lies in its significantly lower computational burden during each sampling period, distinguishing it from other contemporary AI-aided control methods. The paper outlines a systematic design process, encompassing feature selection and reward function design, to formulate the RL problem. The comprehensive design procedure of DPG-RL is then detailed. simulation results are subsequently presented, validating the effectiveness and reliability of the proposed DPG-RL across diverse operational scenarios.

关键词： Current control Systematics Computational modeling simulation Optimal control Reinforcement learning Active filters

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