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UNIVERSAL MOSFET HOLE MOBILITY DEGRADATION MODELS FOR CIRCUIT simulation

IEEE TRANSACTIONS ON COMPUTER-AIDED design OF INTEGRATED CIRCUITS AND SYSTEMS 1993年第3期12卷 439-445页

作者： AGOSTINELLI, VM YERIC, GM TASCH, AF Microelectronics Research Center University of Technology Austin TX USA

In order to simulate complex VLSI/ULSI circuits, circuit simulators must have accurate inversion layer mobility models which properly account for mobility degradation with increasing electric field. In the conventional mobility models in circuit simulators, such as SPICE, the common practice is to refit the parameters in the model for each different processing technology, which is cumbersome, and which restricts the versatility of the model. Universal models, fortunately, can be developed which provide user-friendliness, versatility, and accuracy to circuit simulation codes. We present new universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit simulation programs such as SPICE. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness scattering for p-channel MOSFET's at room temperature, these new models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The new expressions reported in this paper accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate voltage, and substrate bias, and agree very well with recently published experimental mobility degradation data. When implemented in a circuit simulation code, these new models will accurately determine the channel mobility in surface p-channel MOSFET's using only the channel doping concentration, gate oxide thickness, substate bias, and applied gate drive voltage as input parameters. The new models are, therefore, much more universal and a considerable improvement over the current SPICE level 3 model, which must be refitted for each different processing technology.

关键词： MOSFET circuits Degradation Semiconductor process modeling Circuit simulation SPICE Acoustic scattering Scattering parameters Surface fitting Predictive models Doping

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modeling and simulation of RF discharges used for plasma processing

Modeling and simulation of RF discharges used for plasma pro...

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作者： Vahedi, Vahid University of California Berkeley

学位级别：Ph.D.

In the last decade, plasma processing has become an essential step in many manufacturing and engineering areas, ranging from semiconductor processing and very large scale integrated (VLSI) circuit fabrication to hardening of metals and other materials. The role of plasma processing is becoming even more important with decreasing feature sizes on semiconductor wafers. Understanding how and where plasma is created and identifying creation, loss and transport mechanisms for various species in the plasma can assist in the design and production of better plasma sources. The work presented here discusses how particle-in-cell (PIC) simulations can be used to study RF glow discharges which are used widely in the microelectronics industry. In order to use PIC simulations for modeling collisional plasmas and self-sustained discharges, it is necessary to add interactions between charged and neutral particles. In Chapter 1, a Monte-Carlo collisional (MCC) package is explained in detail which is compatible with the PIC scheme. In Chapter 2, the conventional PIC scheme and its limitations in terms of computational efficiency is described. A review of the implicit subcycling method as a way of improving the computational speed of the simulation is presented. Implementation of the implicit subcycling scheme into a bounded one-dimensional electrostatic code, called PDP1, results in an order of magnitude reduction in the simulation run time when the accuracy conditions are satisfied. In Chapter 3, electron energy probability functions obtained from PDP1 are compared with the laboratory measurements and are shown to be in very good agreement. In Chapter 4, a two-dimensional capacitive RF discharge is investigated in detail. Simple frequency scaling laws for predicting the behavior of some plasma parameters are derived and then compared with simulation results, finding good agreements. It is shown that as the drive frequency increases, the sheath width decreases, and the bulk plasma be

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modeling test and measurement equipment for simulated testing: bridging the gap between simulation and reality

Modeling test and measurement equipment for simulated testin...

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University/Government/Industry microelectronics Symposium

作者： P. Van Halen Department Of Electrical Engineering Portland State University Portland OR USA

It is important to incorporate the concept of manufacturability and testability into the engineering curriculum. Incorporating state-of-the-art computer-controlled test and measurement equipment in the curriculum requires an efficient and cost-effective solution to deal with access to this level of equipment. The concept of simulated testing as an innovative solution to this problem is presented.< >

关键词： Manufacturing industries Circuit testing Electrical equipment industry Costs Manufacturing processes Data acquisition Process design design engineering Computational modeling Circuit simulation

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A Numerical simulation Study Of SiGe/Si-heterostructured PMOS And Dipolar Devices

A Numerical Simulation Study Of SiGe/Si-heterostructured PMO...

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International Workshop on VLSI Process and Device modeling, VPAD

作者： J.B. Kuo D.Y. Chen H.P. Chen T.C. Lu J.H. Sim Microelectronics Laboratory Department of Electrical Engineering National Taiwan University Taiwan

This paper reports a numerical simulation study of SiGe/Si heterostructured PMOS and bipolar devices using a modified 2D device simulation program. As confirmed by published data, the numerical simulation provides a good prediction on the IV characteristics for the SiGe-channel PMOS device and the fr for the SiGe-based bipolar device.

关键词： Numerical simulation Silicon germanium Germanium silicon alloys MOS devices Photonic band gap Doping microelectronics design optimization Very large scale integration Transconductance

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The use of STADIUM statistical TCAD simulation methodology in industrial environments

The use of STADIUM statistical TCAD simulation methodology i...

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University/Government/Industry microelectronics Symposium

作者： T.J. Sanders M.M. Shahsavari D.P. Means Department of Electrical and Computer Engineering Florida Institute of Technology Melbourne FL USA

The software program called STADIUM has been developed by researchers at Florida Institute of Technology. The purpose of STADIUM is to facilitate the statistical design and simulation of integrated processes, devices and products. It is a software shell which uses existing simulators in a design of experiments statistical methodology, and which allows the estimation of the statistical response of the manufacturing environment. Some of the details of STADIUM are described together with activities of the Florida SEMATECH Center of Excellence to implement this software in several industrial environments.< >

关键词： Circuit simulation design for manufacture Predictive models Computer industry Virtual manufacturing Manufacturing processes Computational modeling Statistical analysis Integrated circuit yield Software tools

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From Layout To Circuit: Multi-dimensional Process And Device simulation Current Status And Open Problems

From Layout To Circuit: Multi-dimensional Process And Device...

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International Workshop on VLSI Process and Device modeling, VPAD

作者： W. Fichtner Integrated Systems Laboratory Swiss Federal Institute of Technology Zurich Switzerland

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Demosthenes-A technology-independent power DMOS layout generator

Demosthenes-A technology-independent power DMOS layout gener...

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European design Automation Conference

作者： G. Fourneris N. Bekkara J. Benkoski L. Zullino D. Spatafora G. Martino SGS-Thomson Microelectronics Grenoble France SGS-Thomson Microelectronics Cornaredo Italy

A methodology to automate DMOS layout generation starting from electrical specifications is presented. The main features of the Demosthenes technology independent layout generator that make it possible to synthesize lateral and vertical DMOS in different low and high voltage technologies are described. The built-in electrical model used by the generator to extract the device layout resistance is exposed and the accuracy of the model, ranging from 1% to 15%, is reported, according to comparisons with silicon measurements. In the future, the Demosthenes generator will be extended to support the next generation of BCD technology. In addition, electrical modeling capabilities will be improved by generating detailed electrical simulation models that make it possible to accurately simulate DMOS switching.< >

关键词： Power generation microelectronics Low voltage MOSFETs FETs Switches Libraries Solid modeling CMOS technology Silicon

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A Practical Approach to Top/Down Analog Circuit design

A Practical Approach to Top/Down Analog Circuit Design

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European Conference on Solid-State Circuits (ESSCIRC)

作者： J.-P. Morin F. Lemery E. Nercessian V. Sharma J. Benkoski D. Samani SGS-Thomson Microelectronics Grenoble France TIMA Laboratory Institut National Polytechnique de Grenoble France

Since the advent of the behavioral modeling languages in the analog domain, a practical paradigm for Top/Down analog design bringing the benefits already found in the digital domain has been sought. The difficulty to harness the power of the behavioral modeling languages has however been a limiting factor to their widespread usage in the design flow. The approach presented in this paper combines a graphical access to the most commonly used behavioral funcitons and a framework-based integration supporting the Top/Down design paradigm in the analog domain with a clear design methodolgy. These three components are key to a practical Top/Down design, encompassing the system level study, the architectural and structural decisions, and the implementation and verification of the circuit using analog multi-level and mixed-signal simulations. The benefits of this approach are demonstrated in the Top/Down design of a phase-locked loop presented in this paper.

关键词： Analog circuits design methodology Circuit simulation Phase locked loops Testing microelectronics Operational amplifiers Libraries Circuit synthesis Buildings

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A physical approach to the current and charge relations in SiGe-base HBT modeling for circuit simulation and device design

A physical approach to the current and charge relations in S...

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Bipolar/BiCMOS Circuits and Technology Meeting

作者： Niu Ruan Tang Institute of Microelectronics Fudan University Shanghai China ASIC and System Laboratory Shanghai China

The current and charge relations for SiGe-base heterojunction bipolar transistor (HBT) are derived from the differential equations for carriers in the base. A universal description for all injection levels is obtained, which is suitable for circuit simulation. Based on these relations, the invalidity of the concept of effective doping used previously in high injection is identified and explained physically. The base profile design for applications at both room and liquid nitrogen temperature is also discussed.

关键词： Heterojunction bipolar transistors

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General purpose simulated annealing on hardware

General purpose simulated annealing on hardware

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IEEE Winter Workshop on Nonlinear Digital Signal Processing

作者： J. Niittylahti H. Raittinen K. Kaski Microelectronics Laboratory Tampere University of Technology Tampere Finland

A general purpose hardware for the Simulated Annealing optimization method has been designed and implemented. It is a digital stand-alone system that requires no host computer. The prototype design utilizes a full custom VLSI random number generator chip among standard digital circuits. Altera's reprogrammable FPGA technology is used to increase the packing density and to allow modifications. Thisfast optimization tool call be used to optimize any dynamically configurable hardware to adapt a given task. All application example and performance estimations are also presented.

关键词： Simulated annealing Hardware Cost function Temperature Circuit simulation Random number generation Computational modeling Solid modeling Optimization methods microelectronics

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