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IEEE SOI-3D-Subthreshold microelectronics Technology Unified Conference (S3S)

作者： R. Howes W. Redman-White K.G. Nichols M. Robinson J. Kerr P.J. Mole Department of Electronics Southampton UK GEC-Plessey Semiconductors Lincoln UK GEC-Marconi Hirst Research Centre Wembley UK STC Technology Limited Harlow UK

The authors present details of a charge-based circuit simulation model which is continuous from subthreshold to strong inversion and is therefore suitable for analog design. The model has been implemented in the SPICE2 program. The model equivalent circuit is shown, and a set of simulated subthreshold characteristics for an n-channel device is presented. The current is smooth and continuous from cutoff through subthreshold to strong inversion, and the influence of the kink effect can be seen in increasing the inverse subthreshold slope with increasing drain bias. Sample capacitance characteristics are illustrated, and these are also smooth and continuous into subthreshold, allowing accurate small-signal simulation and enhancing convergence in transient simulation. Good modeling of the drain conductance is achieved throughout the kink region, ensuring correct prediction of circuit small-signal gain. In the frequency domain, the model predicts the correct behavior of drain admittance, which is particularly important in analog design. The typical measured threshold shift dependence on total radiation dose is also illustrated.< >

关键词： MOSFET circuits SPICE Circuit synthesis Circuit simulation Predictive models Equivalent circuits Capacitance-voltage characteristics Convergence Frequency domain analysis Admittance

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simulation and Experimental Study of Zn Outdiffusion During Epitaxial Growth of a Double Heterostructure Bipolar Transistor Structure

Simulation and Experimental Study of Zn Outdiffusion During ...

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European Conference on Solid-State Device Research (ESSDERC)

作者： A. Paraskevopoulos R. Weber P. Harde H. Schroeter-JanBen Heinrich-Hertz-Institut für Nachrichtentechnik Berlin GmbH Berlin Germany

A model is developed describing Zn outdiffusion during epitaxial growth of a Double Heterostructure Bipolar Transistor (DHBT) structure. This model is used for the design of the highly p-doped base layer. Experimental... 详细信息

关键词： Zinc Epitaxial growth Bipolar transistors Indium gallium arsenide Indium phosphide Semiconductor process modeling Temperature microelectronics Doping profiles Epitaxial layers

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Analysis and optimization of BiCMOS gate circuits

Analysis and optimization of BiCMOS gate circuits

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： T. Kuroda Y. Sakata K. Matsuo Toshiba Corporation Kawasaki Japan Toshiba Microelectronics Corporation Kawasaki Japan

An optimization strategy for BiCMOS gates is described. A simple gate delay model is proposed whose parameters can be extracted with SPICE simulations. Therefore a device model can be precise, while keeping the optimization procedure simple and unchangeable in any device generation. With the proposed procedure, BiCMOS gate delays can be calculated quickly and optimized efficiently just by looking up design tables that are obtained easily and are applicable to any design with the same device technology. The sizing strategy of cascaded drivers is also studied. BiCMOS-BiCMOS cascaded buffers are optimized when the scale-up factor is e/sup 2.3/, while BiCMOS-CMOS cascaded buffers become the fastest when the scale-up factor, e/sup 1.6/, is employed. The strategy was successfully applied to the design of high-speed BiCMOS static-RAM (SRAM) macros for standard cell libraries.< >

关键词： BiCMOS integrated circuits Delay Capacitance Circuit simulation MOSFETs design optimization Bipolar transistors SPICE Semiconductor device modeling Random access memory

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A simple unified analytical model for ferroelectric thin film capacitor and its applications for nonvolatile memory operation

A simple unified analytical model for ferroelectric thin fil...

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IEEE International Symposium on Applications of Ferroelectrics (ISAF)

作者： Deng-Yuan Chen M. Azuma L.D. McMillan C.A. Paz de Araujo Ramtron International Corporation Colorado Springs CO USA Electronics Research Laboratory Matsushita Electronics Corporation Osaka Japan Symetrix Corporation Colorado Springs CO USA Microelectronics Research Laboratory University of Colorado Colorado Springs CO USA

A simple unified analytical ferroelectric model has been developed based on an effective field assumption and statistical physics, which covers ferroelectric hysteresis, switching, and phase transitions including first and second order phase transitions as well as Curie-Weiss law. The model parameters may be extracted from measured data using commercial customizable optimization tools such as SmartSpice's Optimizer. The model can be used for modeling, simulation and statistical process control for ferroelectric nonvolatile memory design and fabrication.

关键词： Analytical models Ferroelectric materials Transistors Capacitors Polarization Hysteresis Temperature Physics Nonvolatile memory Springs

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A VALUE SYSTEM FOR SWITCH-LEVEL modeling

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IEEE design & TEST OF COMPUTERS 1990年第3期7卷 33-41页

作者： SMITH, SP ACOSTA, RD Microelectronics and Computer Technology Corporation USA International Software Systems Inc.

An approach to switch modeling that provides an excellent compromise between accuracy and performance and requires only minor modifications to basic gate-level simulators is described. The evaluation technique is fully compatible with the VHDL (VHSIC hardware description language) specification. Switch and node models are implemented as primitive elements to achieve maximum performance, but models could also be implemented entirely in VHDL source code. MCC has successfully run the VHDL system based on this approach on a variety of test circuits, and it is now in general release. The model and its integration with a VHDL simulator are discussed, a design example is presented, and some refinements to the switch model are described.

关键词： Switches Discrete event simulation Computational modeling Switching circuits Circuit simulation Voltage SPICE Explosions Signal analysis Performance analysis

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A UNIVERSAL MOSFET MOBILITY DEGRADATION MODEL FOR CIRCUIT simulation

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IEEE TRANSACTIONS ON COMPUTER-AIDED design OF INTEGRATED CIRCUITS AND SYSTEMS 1990年第10期9卷 1123-1126页

作者： YERIC, GM TASCH, AF BANERJEE, SK Microelectronics Research Center University of Texas Austin Austin TX USA

From the physical insights provided by the universal effective mobility versus effective vertical electric field curve for electrons in MOS inversion layers, a simple general expression for the gate voltage dependence of the effective electron mobility is derived for use in SPICE circuit simulation. This expression is quite accurate over a wide range of channel doping concentrations and gate oxide thicknesses, without the need for fitting parameters, such as the theta parameter of the current SPICE level 3 mobility degradation model. It is, therefore, a much more universal model than the present SPICE level 3 mobility expression. Furthermore, the relative accuracy of this new model compared to the current SPICE model is expected to increase at the higher vertical electric fields typical of submicrometer oxide semiconductor field effect transistors (MOSFETs).< >

关键词： MOSFET circuits Degradation Circuit simulation SPICE Semiconductor process modeling Electron mobility Genetic expression Voltage Doping FETs

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COMPUTATIONAL simulation OF CHEMICAL-KINETICS AND FLUID TRANSPORT IN CHEMICAL VAPOR-DEPOSITION

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CARBON 1990年第6期28卷 755-756页

作者： KEE, RJ EVANS, GH COLTRIN, ME SANDIA NATL LABS DIV COMPUTAT MECHLIVERMORECA 94551 SANDIA NATL LABS DIV SURFACE PROCALBUQUERQUENM 87185

Chemical vapor deposition (CVD) processes involve the complex interaction of gas-phase chemical reaction, fluid-mechanical transport, and heterogeneous chemical reaction at the deposition surface. As with most CVD processes, it is believed that computational simulation of diamond CVD can play an important role in developing a quantitative understanding that will facilitate reactor design and process control. While there is much yet to be learned about the underlying chemistry of diamond growth, there has been progress in developing the computational tools need to model such processes. The authors a modeling approach that has proved successful in combustion research and CVD for microelectronics applications and suggest its application to diamond growth.

关键词： Diamonds

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IMPROVED BIPOLAR-TRANSISTOR PERFORMANCE IN CMOS BY NOVEL USE OF PARASITIC COLLECTOR RESISTANCE

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IEEE JOURNAL OF SOLID-STATE CIRCUITS 1990年第2期25卷 619-623页

作者： DOYLE, DJF LANE, WA National Microelectronics Research Centre University College Cork Ireland

A design and layout technique which allows the use of the parasitic bipolar collector resistance as a load component in common emitter stages is discussed. This is achieved by using an extra collector contact in a force-sense arrangement. This removes the need for another load component, thereby reducing area, but more importantly the parasitic collector resistance is no longer limiting the transistor speed. The principle of operation is verified with fabricated transistors. The technique is applied to a bipolar/CMOS analog voltage comparator, and a speed improvement of a factor of three is obtained over a previous design in the same process which does not employ this technique. simulation results for a voltage comparator designed by the technique, which resolved 12 b in 40 ns, are presented.< >

关键词： Bipolar transistors MOSFET circuits Voltage Subthreshold current Doping Electrical resistance measurement Solids Implants Semiconductor process modeling Predictive models

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modeling and simulation of the 16 megabit EPROM cell for write/read operation with a compact SPICE model

Modeling and simulation of the 16 megabit EPROM cell for wri...

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1990 International Electron Devices Meeting

作者： Gigon, Francois SGS-Thomson Microelectronics Grenoble France

A compact SPICE model to stimulate an EPROM cell is presented. Starting from the physics-based MOS model and taking into account impact ionization and the parasitic bipolar effect, 'avalanche' leading to snap-back is described. Gate current, based on the 'lucky-electron' model, is integrated in one dimension along the channel. The floating gate voltage is induced by external biases and trapped charges. Threshold voltage as seen from the control gate is issued. Results from simulations of transient behavior during writing and reading operations are shown;they were satisfactorily used for the submicron cell in the design of the 16 megabit EPROM.

关键词： Data Storage, Digital

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Application of mechanical-technology CAD to microelectronic device design and manufacturing

Application of mechanical-technology CAD to microelectronic ...

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IEEE/CHMT(CPMT) International Electronics Manufacturing Technology Symposium

作者： F. Maseeh R.M. Harris D.S. Boning M.L. Heytens S.A. Gelston S.D. Senturia Teknekron Sensor Development Corporation Menlo Park CA USA Microsystems Technology Laboratories Massachusetts Institute of Technology Cambridge MA USA

A computer-aided-design (CAD) architecture for microelectromechanical systems is presented in which conventional mask layout and process simulation tools are linked to three-dimensional mechanical CAD and finite-element tools for analysis and simulation. The architecture is exercised at an elementary level by modeling the first steps of the MIT baseline CMOS process. An architecture for an object-oriented material property simulator is shown in which material properties and their process dependence are stored and are accessed based on the specific process conditions.< >

关键词： microelectronics Object oriented modeling Computational modeling Analytical models Computer simulation Material properties Application software Microelectromechanical systems Finite element methods Semiconductor device modeling

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