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检索条件"任意字段=Design, Modeling, and Simulation in Microelectronics"

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iSMILE: A Novel Circuit simulation Program with emphasis on New Device Model Development

iSMILE: A Novel Circuit Simulation Program with emphasis on ...

引用

design Automation Conference

作者： A.T. Yang S.M. Kang Center for Compound Semiconductor Microelectronics Coordinated Science Laboratory and Department of Electrical and Computer Engineering University of Illinois Urbana IL USA

The laborious task of implementing a new device model in a circuit simulator has long been recognized as a painful bottleneck to device modeling. In contrast to the conventional circuit simulators which employ a built-in model library approach, iSMILE generates and links all the necessary codes automatically from a minimal set of model descriptions contained in a user's model input file. Users are completely shielded from the internal complexity of the program when implementing new models. This flexibility of extraction and by comparing circuit simulation results in terms of performance and accuracy. iSMILE has been used successfully as a CAD tool for the development of new models for high-speed optoelectronic integrated circuits.

关键词： Circuit simulation Integrated circuit modeling Equations Permission Computational modeling SPICE Data mining Analytical models microelectronics Libraries

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The impact of hardware description languages on the education of hardware design

The impact of hardware description languages on the educatio...

引用

University/Government/Industry microelectronics Symposium

作者： Z. Navabi Dept. of Electr. & Comput. Eng. Northeastern Univ. Boston MA USA

The author describes hardware description languages (HDLs) and various levels of abstraction. He then examines applications of these languages for teaching purposes. This is illustrated by use of examples in commonly used teaching HDLs. The VHSIC HDL (VHDL) and the possibility of its being used as a teaching tool are described. The requirements for a small hardware oriented subset of VHDL are also discussed.< >

关键词： Hardware design languages Digital circuits Program processors Computer science education Computational modeling Circuit simulation Documentation Digital systems Computer architecture design engineering

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A Newton waveform relaxation algorithm for circuit simulation

A Newton waveform relaxation algorithm for circuit simulatio...

引用

IEEE International Conference on Computer-Aided design

作者： D.J. Erdman D.J. Rose Microelectronics Center of North Carolina Duke University North Carolina

A novel algorithm, called Newton waveform relaxation, for solving large differential algebraic systems which arise from circuit simulation is discussed. It will be compared to waveform relaxation, waveform relaxation Newton (WRN), and direct methods. This approach has been implemented as a SPICE level circuit simulator called WCAzM (waveform circuit analyzer with macromodeling) and was found to be as much as three times faster than a direct method and always faster than WRN for the circuits benchmarked. Furthermore it was found that the number of model evaluations required by WCAzM was as much as seven times smaller than a direct method. These numbers indicate that further improvements in speed can be made.< >

关键词： Circuit simulation Costs microelectronics Linear systems Computational modeling Relaxation methods Partitioning algorithms SPICE Nonlinear equations Very large scale integration

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modeling requirements for computer-aided VLSI circuit reliability assessment

Modeling requirements for computer-aided VLSI circuit reliab...

引用

University/Government/Industry microelectronics Symposium

作者： B.J. Sheu W.-J. Hsu V.C. Tyree Department of Electrical Engineering and Information Sciences Institute University of Southern California Los Angeles CA USA USC Information Sciences Institute Marina del Rey CA USA

It is noted that challenges to the improvement of quality and reliability in VLSI circuits come from the rapid advances of CMOS fabrication technologies. To provide circuit designers with the means for designing circuits that can utilize the full reliability potential of the fabrication technology, a circuit reliability simulator has been developed. Key reliability concerns in VLSI circuits and microsystems include hot-carrier damage, electromigration, time-dependent dielectric breakdown, packaging damage, radiation damage, and contamination of oxides and junctions. The authors describe several salient modeling requirements for reliability simulations at the detailed circuit design level using the SPICE circuit simulator as the key module.< >

关键词： Very large scale integration CMOS technology Circuit simulation Fabrication Semiconductor device modeling Hot carriers Electromigration Dielectric breakdown Packaging Contamination

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Neural network development using VHDL

Neural network development using VHDL

引用

Annual IEEE International Conference and Exhibit ASIC

作者： J.M. Avery Microelectronics Division NCR Corporation Fort Lauderdale CO USA

A developmental approach for hardware implementations of neural networks is presented. Neural network architectural representations including both behavioral and structural influences are presented using the VHSIC High-Level Description Language (VHDL). VHDL design entities and configurations are applied to neural network algorithm development and simulation. Neural network design interchange formats are discussed.< >

关键词： Neural networks Very large scale integration Circuit simulation Algorithm design and analysis Computational modeling Circuit synthesis Software algorithms Process design Mathematical model Convergence

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A Novel Algorithm for Improving Convergence Behavior of Circuit Simulators

A Novel Algorithm for Improving Convergence Behavior of Circ...

引用

design Automation Conference

作者： Zhiping Yu Weijian Zhao Zhilian Yang Y.E. Lien The Institute of Microelectronics Tsinghua University Beijing China

A novel algorithm based on the Newton projection scheme [1] is proposed to improve the convergence behavior of circuit simulation. The computation experiment shows that the number of iterations to achieve convergence in Newton-Raphson method can be cut by as much as twenty nine-fold, and the convergence behavior of the Newton iteration is made much more robust using this algorithm. Moreover, the implementation of the proposed algorithm in conventional circuit simulators such as SPICE is very easily done. Both the theoretical background and actual implementation of the algorithm are discussed. The experimental circuit and simulation results are also shown.

关键词： Convergence Circuit simulation Computational modeling Newton method SPICE Voltage Kirchhoff's Law Permission Robustness Computer simulation

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Efficient Integration of Device and Circuit simulation

Efficient Integration of Device and Circuit Simulation

引用

European Conference on Solid-State Device Research (ESSDERC)

作者： P. O'Sullivan C.G. Cahill C. Lyden National Microelectronics Reseaich Gentle University College Cork Ireland

Integration of process, device and circuit simulation tools is desirable in modern process development and circuit design, as it allows rapid assessment of the impact of a new process or process change on circuit performance, [1]. This paper presents an efficient scheme for the extraction of MOSFET linear region SPICE level 3 parameters from numerical device simulations. Carrier concentrations, potential and mobility are used to derive a total of seven linear region parameters from three off-state bias points. This is in contrast to standard curve fitting techniques where twenty or, more on-state bias points would typically be used to obtain the required parameters.

关键词： Circuit simulation Predictive models Computational modeling Voltage SPICE Numerical simulation Doping microelectronics Educational institutions Modems

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Synthesis of analog ASICs using optimization in conjunction with circuit simulation techniques

Synthesis of analog ASICs using optimization in conjunction ...

引用

Annual IEEE International Conference and Exhibit ASIC

作者： K. Doganis K. Walsh P. Linardes Electrical Engineering Software Inc. Santa Clara CA USA Computer Science and Microelectronics Dept School of Applied Science Aristotelion University Thessaloniki Greece

A description is given of the optimization methodology applied by the PRECISE computer program for the synthesis of analog ASICs. The application of simulation and optimization technology allows engineers to determine easily and automatically the element values and geometries needed to reach desired or measured analog circuit performance. The integration of both technologies to determine the optimum design parameters necessary to reach circuit objectives specified by the designer is described. Optimization in AC, DC, and transient domains can occur simultaneously to account for the interdependencies of the circuit element value in those domains. In addition, the optimization process can take place in discrete and constrained design parameter space so that the technological limits are accounted for and the optimal drawn lengths and widths are manufacturable. The optimization approach can be a powerful tool for the design of analog ASICs.< >

关键词： design optimization Space technology Optimization methods Analog computers Circuit synthesis Application software Computational modeling Solid modeling Circuit simulation Geometry

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An enhanced high performance combinational fault simulator using two-way parallelism

An enhanced high performance combinational fault simulator u...

引用

IEEE International Conference on Computer design: VLSI in Computers and Processors, (ICCD)

作者： S.P. Smith Computer Aided Design Program Microelectronics and Computer Technology Corporation Austin TX USA

A combinational fault simulator using two-way parallelism and a number of refinements to reduce memory usage is presented. The results show the approach to be generally superior to the basic parallel patterns single fault propagation (PPSFP) algorithm. One of the refinements, processing to encourage the sharing of fault machine indices by independent faults, appears to require substantially more processing time than it saves during simulation. The remaining preprocessing steps are comparable to those used for basic PPSFP, and are highly justified by their run-time savings. The concept of adjusting the parallelism factor to account for increasingly random-resistant faults seems to work quite well.< >

关键词： Circuit faults Circuit simulation Computational modeling Parallel processing Electrical fault detection Computer simulation Concurrent computing Merging Memory management Fault detection

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modeling and enhancing virtual memory performance in logic simulation

Modeling and enhancing virtual memory performance in logic s...

引用

IEEE International Conference on Computer-Aided design

作者： S.P. Smith J. Kuban Computer Aided Design Program Microelectronics and Computer Technology Corporation Austin TX USA

To achieve acceptable performance, virtual memory systems generally rely on the presence of a high degree of spatial and temporal reference locality during code execution. The enormous quantity of intricately related data typically found in logic simulation makes this a dubious assumption. There simply is no way to statically organize circuit representation data to ensure locality. This phenomenon is explored through the analysis of address reference data obtained from a logic tester monitoring simulation execution on a general-purpose virtual memory workstation. Data from code compilation runs are included to illustrate the differences in reference behavior found between logic simulation and more conventional applications. An improved virtual memory management scheme based on speculative references and tuned to logic simulation is presented.< >

关键词： Circuit simulation Analytical models Computational modeling Memory management Frequency Logic design High performance computing Logic testing Circuit faults Predictive models

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