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检索条件"任意字段=Design, Modeling, and Simulation in Microelectronics"
1662 条 记 录,以下是1651-1660 订阅
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Statistical modeling and simulation for DAC design
Statistical Modeling and Simulation for DAC Design
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European Conference on Solid-State Circuits (ESSCIRC)
作者: C.S.G. Conroy W.A. Lane National Microelectronics Research Centre University College Cork Ireland
A Monte-Carlo approach has been applied to the estimation of yield of CMOS Digital-to-Analog Converter circuits as a design optimization tool. Parasitic circuit elements are included. A components of variance model is... 详细信息
来源: 评论
Fabrication and modeling of a novel self-Aligned AlGaAs/GaAs heterojunction bipolar transistor with a cutoff frequency of 45 GHz
Fabrication and modeling of a novel self-Aligned AlGaAs/GaAs...
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International Electron Devices Meeting (IEDM)
作者: M. Madihian K. Honjo H. Toyoshima S. Kumashiro Microelectronics Research Laboratories NEC Corporation Limited Kawasaki Miyazaki Japan VLSI CAD Engineering Division NEC Limited Kawasaki Japan
This paper establishes a systematic approach for design, fabrication, and modeling of a newly proposed self-aligned AlGaAs/GaAs heterojunction bipolar transistor (HBT) employing a two-dimensional heterostructure devic... 详细信息
来源: 评论
Introduction
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IEEE Transactions on Computer-Aided design of Integrated Circuits and Systems 1985年 第1期4卷 2-2页
作者: Dutton, Robert W. Electrical Engineering at Stanford University Stanford CA USA
来源: 评论
modeling OF DISCRETE SEMICONDUCTOR-DEVICES
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microelectronics RELIABILITY 1984年 第2期24卷 297-312页
作者: PROFIRESCU, MD Department of Electronics and Telecommunications Polytechnical Institute of Bucharest Romania
Numerical modeling established itself as a powerful tool for the analysis and design of discrete semiconductor devices and integrated circuits. The paper reviews the basic semiconductor equations, the physical interna... 详细信息
来源: 评论
IDA: Interconnect Delay Analysis for Integrated Circuits  84
IDA: Interconnect Delay Analysis for Integrated Circuits
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design Automation Conference
作者: A.J. de Geus J.B. Reed M. Rekhson G. Wikle General Electric Microelectronics Center Research Triangle Park Laboratory NC USA University of California Berkeley USA Massachusetts Institute oF Technology USA Lehigh University USA
A delay analysis program has been developed to compute the signal propagation delays attributed to RC interconnection nets in integrated circuits. To take into account the bidirectional nature of MOS transmission gate... 详细信息
来源: 评论
Symbolic Parasitic Extractor for Circuit simulation (SPECS)  83
Symbolic Parasitic Extractor for Circuit Simulation (SPECS)
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design Automation Conference
作者: J.D. Bastian M. Ellement P.J. Fowler C.E. Huang L.P. McNamee Defense Electronics Operations Microelectronics Research & Development Rockwell International Corporation Anaheim CA USA Computer Science Department University of California Los Angeles USA
This paper describes the design, development and implementation of the program SPECS. The purpose of SPECS is to automatically extract from a Rockwell microelectronic symbolic matrix description a netlist for circuit ... 详细信息
来源: 评论
modeling AND simulation
MICROPROCESSING AND MICROPROGRAMMING
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MICROPROCESSING AND MICROPROGRAMMING 1982年 第2-3期10卷 139-151页
作者: SCHINDEL, U JAGER, U WOLFF, D AEG-TELEFUNKEN Geschäftsbereich Elektronische Bauelemente Postfach 1109 D-7100 Heilbronn Federal Republic of Germany
The design of IC's needs software tools as an aid to optimize devices, reduce design time and costs. This representation gives an overview about different aspects of modeling and simulation techniques applied in t... 详细信息
来源: 评论
A Survey of Third-Generation simulation Techniques
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Proceedings of the IEEE 1981年 第10期69卷 1264-1280页
作者: Hachtel, Gary D. Sangiovanni-Vincentelli, Alberto L. Department of Electrical Engineering University of Colorado Boulder CO 80309 United States Department of Electrical Engineering and Computer Science University of California Berkeley CA United States
We present a review of recent work on circuit simulation techniques which are “third generation” in that they go beyond the Sparse Gauss Elimination, Newton Iteration, Stiff Implicit time integration approach which ... 详细信息
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2D Process modeling and simulation for VLSI design
2D Process Modeling and Simulation for VLSI Design
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Symposium on VLSI Technology
作者: C. D. Maldonado W. F. Hall W. D. Murphy S. A. Louie Rockwell International Microelectronics Research and Development Center Anaheim CA USA Rockwell International Corporation Anaheim CA USA Rockwell International Science Center Thousand Oaks CA USA
As device geometries are reduced in size the use of two dimensional (2D) device and process simulators as design aids will become increasingly important. Two dimensional device simulators have been successfully develo... 详细信息
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FUNCTIONAL modeling OF LSI FOR simulation.
Proceedings of the Technical Program - International Microel...
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Proceedings of the Technical Program - International microelectronics Conference 1980年 221-227页
作者: Wiles, Douglas
During the last decade, LSI technology has changed from theory to application in almost every facet of electronic equipment. This trend will certainly continue in the future. While LSI simplifies board design by perfo... 详细信息
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