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检索条件"任意字段=Design, Modeling, and Simulation in Microelectronics"
1686 条 记 录,以下是281-290 订阅
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Automated Parameter Extraction and SPICE Model Modification For Gate Enclosed MOSFETs simulation  16
Automated Parameter Extraction and SPICE Model Modification ...
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16th International Conference on Synthesis, modeling, Analysis and simulation Methods and Applications to Circuit design (SMACD) / 15th Conference on PhD Research in microelectronics and Electronics (PRIME)
作者: Contreras, Boris Ducoudray, Gladys Palomera, Rogelio Bernal, Carlos Univ Puerto Rico Dept Elect & Comp Engn Mayaguez PR 00681 USA
This work focuses in using experimental measurements to extract the aspect ratio (W/L) for Gate-Enclosed or Annular MOSFETs. All measurements and calculations are performed with an automated virtual instrumentation (V... 详细信息
来源: 评论
Performance Evaluation of Negative Capacitance Reconfigurable Field Effect Transistor for Sub 10 nm Integration
Performance Evaluation of Negative Capacitance Reconfigurabl...
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IEEE Electron Devices Technology and Manufacturing Conference (EDTM)
作者: Zihan Sun Xianglong Li Yabin Sun Ziyu Liu Yanling Shi Xiaojin Li East China Normal University Shanghai China School of Microelectronics Fudan University Shanghai China
A dual-gate negative capacitance reconfigurable field effect transistor (NC-RFET) is proposed in present work. Combining with 3D TCAD simulation with Landau-Khalatnikov equation, critical electrical parameters such as... 详细信息
来源: 评论
modeling Assisted Room Temperature Operation of Atomic Precision Advanced Manufacturing Devices
Modeling Assisted Room Temperature Operation of Atomic Preci...
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International Conference on simulation of Semiconductor Processes and Devices (SISPAD)
作者: Xujiao Gao Lisa A. Tracy Evan M. Anderson DeAnna M. Campbell Jeffrey A. Ivie Tzu-Ming Lu Denis Mamaluy Scott W. Schmucker Shashank Misra Electrical Models & Simulation Sandia National Laboratories Albuquerque USA Quantum Phenomena Sandia National Laboratories Albuquerque USA Multiscale Fab Sci & Tech Dev Sandia National Laboratories Albuquerque USA Biological & Chemical Sensors Sandia National Laboratories Albuquerque USA Cognitive & Emerging Computing Sandia National Laboratories Albuquerque USA
One big challenge of the emerging atomic precision advanced manufacturing (APAM) technology for microelectronics application is to realize APAM devices that operate at room temperature (RT). We demonstrate that semicl... 详细信息
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基于MEMS电容式加速度计的闭环读出电路设计
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传感技术学报 2021年 第2期34卷 162-167页
作者: 徐娇 张玉龙 杨中宝 吴次南 刘泽文 贵州大学大数据与信息工程学院 贵州贵阳550025 清华大学微电子学研究所 北京100084
设计了面向圆片级封装的一种闭环加速度计读出电路。在基于电容式微加速度计结构的读出电路设计中考虑了寄生电容对整个系统的影响。用MATLAB SIMULINK对所设计的读出电路进行了建模仿真。在仿真过程中分析了噪声、圆片级封装与普通封... 详细信息
来源: 评论
A comparative study of stress-based and fracture mechanics-based finite element simulation approaches for RDL based wafer level package
A comparative study of stress-based and fracture mechanics-b...
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Electronics Packaging Technology Conference (EPTC)
作者: Sasi Kumar Tippabhotla Lin Ji Tai Chong Chai Institute of Microelectronics A*STAR (Agency for Science Technology and Research) 2 Fusionopolis Way Innovis Tower A Singapore
Conventional stress analysis (CSA) and fracture mechanics using cohesive zone modelling (CZM) approaches are currently available in the finite element analysis framework for virtual design evaluation of microelectroni... 详细信息
来源: 评论
基于SysML&SystemC的GPU任务调度单元事务级建模
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无线电工程 2021年 第2期51卷 161-167页
作者: 张少锋 田泽 吴晓成 张骏 陈佳 航空工业西安航空计算技术研究所 陕西西安710068 西安翔腾微电子科技有限公司 陕西西安710068 集成电路与微系统设计航空科技重点实验室 陕西西安710068
传统的“瀑布”式芯片设计验证方法缺乏高效的协同设计验证手段,已不能满足当前架构复杂和规模宏大的GPU芯片的设计开发要求,采用基于事务级建模(Transaction-Level modeling,TLM)模型的设计验证方法应运而生。作为GPU图形顶点和像素染... 详细信息
来源: 评论
Experimental and simulation research on the difference in motion technology levels based on nonlinear characteristics
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NONLINEAR ENGINEERING - modeling AND APPLICATION 2022年 第1期11卷 629-636页
作者: Liang, Guiping Fu, Haiming Ganapathy, Sekar Bhola, Jyoti Doddawad, Vidya G. G. Athawale, Shashikant V. V. Bhatia, Komal Kumar Model Inst Engn & Technol Dept Elect & Commun Engn Jammu J&K India Guangzhou Huaxia Vocat Coll Guangzhou 510935 Guangdong Peoples R China Sri Ramakrishna Inst Technol Dept Elect & Commun Engn Coimbatore Tamil Nadu India JSS Dent Coll & Hosp JSSAHER Mysore India Model Inst Engn & Technol Dept Elect & Commun Engn Pune India Savitribai Phule Pune Univ AISSMS COE Dept Comp Engn Pune Maharastra India Ertwhile YMCA Univ Sci & Technol Fac Informat & Comp JC Bose Univ Sci &Technol Dept Comp Engn Faridabad 121004 Haryana India
Wearable and movable lodged health monitoring gadgets, micro-sensors, human system locating gadgets, and other gadgets started to appear as low-power communication mechanisms and microelectronics mechanisms grew in po... 详细信息
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Optical micro-machined ultrasound sensors with a silicon photonic resonator in a buckled acoustical membrane  20
Optical micro-machined ultrasound sensors with a silicon pho...
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20th International Conference on Thermal, Mechanical and Multi-Physics simulation and Experiments in microelectronics and Microsystems (EuroSimE)
作者: Westerveld, W. J. Leinders, S. M. van Neer, P. L. M. J. Urbach, H. P. de Jong, N. Verweij, M. D. Rottenberg, X. Rochus, V. IMEC Kapeldreef 75 B-3001 Leuven Belgium Delft Univ Technol Dept ImPhys Lorentzweg 1 NL-2628 CJ Delft Netherlands TNO Oude Waalsdorperweg 63 NL-2597 AK The Hague Netherlands
Future applications of ultrasonography in (bio-)medical imaging require ultrasound sensor matrices with small sensitive elements. Promising are opto-mechanical ultrasound sensors (OMUS) based on a silicon photonic rin... 详细信息
来源: 评论
Mechanical modeling study for fan-out wafer level package parameters to enhance BGA TCoB life
Mechanical modeling study for fan-out wafer level package pa...
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Electronics Packaging Technology Conference (EPTC)
作者: Rathin Mandal Chai Tai Chong Institute of Microelectronics 2 Fusionopolis Way #08-02 Innovis Singapore
Fan-Out Wafer Level Package (FOWLP) is experiencing a significant growth due to its thinner thickness, higher I/Os in smaller chip area, better thermal and electrical performance. Due to the shorter, finer and simpler... 详细信息
来源: 评论
simulation of Ternary CMOS Schemes for Many-Valued Logic Systems  31
Simulation of Ternary CMOS Schemes for Many-Valued Logic Sys...
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IEEE 31st International Conference on microelectronics (MIEL)
作者: Krasnyuk, A. A. Prozorova, A. G. Russian Acad Sci Sci Res Inst Syst Anal Nakhimovsky Pr 36-1 Moscow 117218 Russia Natl Res Nucl Univ MEPhI Moscow Engn Phys Inst Kaslurskoe Sh 31 Moscow 115409 Russia
Of interest is the possibility of implementing many-valued logic systems using traditional CMOS tecluiologies. We considered an example of the implementation of three-valued logic elements based on symmetric 3vL, logi... 详细信息
来源: 评论