Computational modeling continues to play an increasingly significant role in the design of more effective vehicle crash safety systems. Models configured with sophisticated computer analyses permit researchers to perf...
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An adaptive antenna impedance matching system for mobile communication terminals is proposed. The system adaptively controls two varactors of the pi-network matching circuit detecting the change in the refection coeff...
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The paper describes a design of a microcode-controlled state machine and its software implementation in the Atmel AVR microcontrollers. In particular, the microcontrollers ATmegal03 and ATmegal28 are used. This design...
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The paper describes a design of a microcode-controlled state machine and its software implementation in the Atmel AVR microcontrollers. In particular, the microcontrollers ATmegal03 and ATmegal28 are used. This design is closely related to a software implementation of a simulator in AVR microcontrollers. This simulator communicates with the designed state machine and presents a complete design environment for microcode development and debugging. Both of these devices can be interconnected by a flat cable and linked to a computer through a serial or USB interface. Both devices share the control software that allows us to create and edit microprograms and to control the whole state machine. It is possible to start, cancel or step through the execution of microprograms. The operator can observe the current state of the state machine, too. The second part of the control software enables the operator to create and compile simulating programs. The control software communicates with both devices using commands. All the results of this communication are well arranged in dialog boxes and windows.
Energy-efficient and low-power designs issues are becoming more important in modern processors. In this paper we propose an energy-efficient adaptive multiple-issue architecture for portable systems. The architecture ...
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Energy-efficient and low-power designs issues are becoming more important in modern processors. In this paper we propose an energy-efficient adaptive multiple-issue architecture for portable systems. The architecture utilizes a hardware-software cooperation approach to minimize hardware overhead while providing control flexibilities to programs and operating systems. Optimizations are made based on the program execution profile. Simulation results show that the adaptive architecture improves the performance by an average 20% with a maximum 8% reduction in energy consumption compared with the baseline model. The increase in power dissipation is restricted to less than 6%.
Wireless sensor networks have attracted much research effort in the past five years. With TinyOS, there exists a widely used, microthreaded operating system targeted for single processor sensor nodes. It requires only...
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Wireless sensor networks have attracted much research effort in the past five years. With TinyOS, there exists a widely used, microthreaded operating system targeted for single processor sensor nodes. It requires only minimal processing and memory resources. Many research activities in the wireless sensor area focus on the design of efficient protocols in the MAC and network layer. SDL - a high-abstraction level formal description language - has long been used for modeling, simulation, and verification of communication protocols. In this paper, we present a mapping approach and optimizations to derive efficient component-based event-driven TinyOS applications from SDL models. We show, how the basic SDL concepts are reflected in the TinyOS component architecture.
design correctness has become a bottleneck in the modern digital system design cycle. In an effort to improve current ad hoc simulation processes, This work presents a method for the automated generation of simulation...
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design correctness has become a bottleneck in the modern digital system design cycle. In an effort to improve current ad hoc simulation processes, This work presents a method for the automated generation of simulation vectors using symbolic FSM traversal techniques. Generated vectors are classified into three categories, forward inter-frontier, reverse inter-frontier, and intra-frontier vectors; a classification based on a vector's ability to generate forward-, reverse-, and inter-frontier transitions in an FSM's state transition graph. Additionally, a state-element transition relation (S-ETR) is introduced. This technique involves the construction of a transition relation (TR) for each state holding element and defining a smaller, incomplete, over-approximation of the TR. Combining the information present in the S-ETRs coupled with simulation is used to perform image computations.
In this paper we propose an efficient implementation of CABAC's binary arithmetic coder and context management system. CABAC is the context adaptive binary arithmetic coder used in new H.264/AVC video standard. Ar...
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In this paper we propose an efficient implementation of CABAC's binary arithmetic coder and context management system. CABAC is the context adaptive binary arithmetic coder used in new H.264/AVC video standard. Arithmetic coding allows a significant enhancement in compression. However, implementation complexity is a drawback due to hardware cost and slowness. In this paper we show the need for a hardware implementation of arithmetic coding in current video compression systems. We propose a fast and efficient implementation of the encoding algorithm. We prove that memory accesses constitute a bottleneck and propose solutions that apply to the encoding algorithm and context management system. As a result, a fast architecture is presented, able to process one symbol per cycle.
The availability of synthetic realistic data enables design optimization, algorithm evaluation and verification of any digital system where a significant amount of digital signal processing is performed. The evolution...
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The availability of synthetic realistic data enables design optimization, algorithm evaluation and verification of any digital system where a significant amount of digital signal processing is performed. The evolution of positron emission tomography cameras towards continuous sampling of individual position-sensitive photomultiplier anodes with processing algorithms implemented on digital programmable logic devices creates a new framework where new approaches to the gamma-event detection are possible. We have developed a system model of the acquisition chain, including multi-layer phoswich, photomultiplier, front-end analog electronics, data acquisition and data processing. This processing includes estimation algorithms for the most relevant event parameters: energy, layer-of-interaction, time picking-off and event location. The selected simulation platform couples gently to digital hardware simulation tools, in such a way that implemented models may generate real-like stimuli for the digital system under development. The modeling of the whole front-end electronics enables deeper understanding and tuning of different system trade-offs and provides a rapid and soft transition between specification and hardware development
Educational digital libraries can benefit from theoretical and methodological approaches that enable lessons learned from design and evaluation projects performed in one particular setting to be applied to other setti...
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Educational digital libraries can benefit from theoretical and methodological approaches that enable lessons learned from design and evaluation projects performed in one particular setting to be applied to other settings within the library network. Three promising advances in design theory are reviewed - reference tasks, design experiments, and design genres. Each approach advocates the creation of 'intermediate' constructs as vehicles for knowledge building and knowledge sharing across design and research projects. One purpose of an intermediate construct is to formulate finer-grained models that describe and explain the relationship between key design features and the cognitive and social dimensions of the context of use. Three models are proposed and used as thought experiments to analyze the utility of these approaches to educational digital library design and evaluation: digital libraries as cognitive tools, component repositories, and knowledge networks.
This paper presents an efficient additive normalization method for exponential computation. Same as a previous additive normalization method, this new method can allow the values of the normalization factors in the no...
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This paper presents an efficient additive normalization method for exponential computation. Same as a previous additive normalization method, this new method can allow the values of the normalization factors in the normalization method be obtained directly from the remaining terms without any computation. Furthermore, the convergence rate of this method is also exponential. Instead of generating a group of logarithmic terms in each normalization stage, only one logarithmic term with large radix is generated and used as the normalization factor. This technique facilitates the computation of the partial result term in each normalization stage. The computation can then be implemented efficiently as a simple multiplication-and-add operation. Thorough simulations on the 24-bit exponential unit have verified that our proposed method is correct. From the synthesis results, the hardware cost and the delay of the proposed 53-bit exponential unit are only one-fourth and two-thirds of those of the 53-bit exponential unit in the previous design, respectively. We conclude that our proposed additive normalization method can significantly improve the performance of the exponential computation.
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