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CoHOST- Computer Simulation Models to Investigate human Performance Task and Workload Conditions in a U.S. Army Heavy Maneuver Battalion Tactical Operations Center

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Proceedings of the human Factors and Ergonomics Society Annual Meeting 1999年第3期43卷 242 - 246页

作者： Sam E. Middlebrooks Beverly G. Knapp B. Diane Barnette Cheryl Bird Joyce Johnson Pat Kilduff Salvatore P. Schipani Jennifer Swoboda Jody Wojciechowski Barry Tillman Annette R. Ensing Sue Archer Rick Archer Beth Plott U.S. Army Research LaboratoryHuman Research And Engineering DirectorateAberdeen Proving GroundMaryland. HF Engineering Inc. MITRE Corp. Micro Analysis and Design Inc.

A multi-year effort was conducted to investigate the impact on human cognitive and physical performance capabilities, which the introduction of a new Army command and control vehicle with modernized digital communications systems would have. This was a joint effort by the human Research and engineering Directorate of the U.S. Army Research Laboratory in partnership with the Directorate of Force Developments at the U.S. Armor Center and School at Fort Knox, Kentucky, and the U.S. Army Operational Test and Evaluation Command at Alexandria, Virginia. Literature searches and background investigations were conducted, and a model architecture based on a taxonomy of human performance was developed. A computer simulation design and methodology was implemented with these taxonomic-based descriptors of human performance in the military command and control domain, using a commercially available simulation programming language. A series of computer models called Computer modeling of human Operator System Tasks (CoHOST) was written and results were developed that suggest that automation alone does not necessarily improve human performance.

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Validity of comfort assessment in RAMSIS

Validity of comfort assessment in RAMSIS

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digital human modeling for design and engineering - International Conference and Exposition

作者： Nilsson, Gunnar Saab Automobile AB A1-3 TVHB S-461 80 Trollhättan Sweden

This paper describes the validation of the Comfort Assessment function of RAMSIS performed at Saab Automobile AB. The purpose was to find out if the effects of a change in design on comfort can be predicted by RAMSIS. An interior mock-up of a car was used, in which seat, steering wheel, accelerator pedal, brake pedal and clutch pedal could be adjusted independently. In this mock-up 21 test subjects (10 men, 11 women) were told to adjust the steering wheel and the seat in the way that they obtained a good driving position. Pedals were fixed at a pre-defined position. The test subjects were told to judge the discomfort of the driving position on a scale from 1 to 10 with 1 meaning "not at all comfortable" and 10 meaning "very comfortable". Then the test subjects were told to adjust the pedals and seat to improve the driving position, and asked to judge the discomfort of the new driving position. The seat, steering wheel and pedal positions were recorded for the two driving positions. Also, some anthropometric key dimensions were measured. A CAD model of the interior mock-up was created and transferred to RAMSIS. The anthropometric measures of the 21 test subjects were used to create RAMSIS manikins corresponding to each test subject. The manikins were positioned in the previously recorded seating position with the pre-defined pedal position. A task defining which points on the manikin should touch which surfaces in the model was created so that the manikin was positioned in a driving position. RAMSIS was used to calculate the comfort values. The pedals were repositioned according to the individual pedal arrangement for each manikin and the manikin was repositioned to the second driving position. The same task was used to calculate a new driving position, and the comfort values were calculated. For three manikins RAMSIS determined a worse comfort rating in the second driving position while the test subject specified a better comfort rating. In ten cases RAMSIS predicte

关键词： Computer aided design

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Advanced model-based image coding scheme

Advanced model-based image coding scheme

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International symposium on Signal Processing and Its Applications (ISSPA)

作者： Min Chul Park T. Naemura I. Kaneko H. Harashima Department of Information and Communication Engineering University of Tokyo Bunkyo Tokyo Japan

Studies on 3-D model-based image coding have concentrated on facial image sequences to implement low-bit rate communication and other applications. In this paper, this scheme is extended by including human-computer interfaces through the recognition of facial gestures and interactive control of a face object on an Internet browser, and by digital watermarking. human faces or faces of anthropomorphic agents are synthesized with the real and/or recognized facial motion on an Internet browser using virtual reality modeling language(VRML). digital watermarking is employed to prevent real face images from unwanted use and copyright infringement. By extending previous model-based image coding schemes for facial image sequences, an interactive, effective, safe and low-bit rate communication can be carried out. Experimental results show the usefulness and effectiveness of the proposed scheme.

关键词： Image coding Watermarking Face recognition Motion analysis Image sequences Bit rate Internet Layout Facial animation Image analysis

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Fault modeling and fault sampling for isolating faults in analog and mixed-signal circuits

Fault modeling and fault sampling for isolating faults in an...

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IEEE International symposium on Circuits and Systems (ISCAS)

作者： S. Chakrabarti A. Chatterjee Georgia Institute of Technology School of Electrical and Computer Engineering Atlanta GA USA

Expensive specification testing of analog and mixed-signal circuits is currently being replaced by fault-oriented test techniques, similar to the ones used for digital circuits. However, the large number of possible failure modes in analog and mixed-signal circuits presents a major bottleneck in terms of fault simulation complexity and size of fault dictionary. For a given set of possible faults, it has been shown that only a small fraction of the total number of faults contribute to diagnostic accuracy. In this paper, we present a fault sampling methodology that identifies those faults by simulating only a minimal fraction of the entire set of possible faults. The proposed sampling algorithm is based on statistical fault simulation and leads to major reductions in fault simulation complexity for hierarchical analog and mixed-signal circuits.

关键词： Circuit faults Sampling methods Circuit testing Circuit simulation Dictionaries Fault diagnosis design automation System testing Isolation technology digital circuits

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Instruction level power model of microcontrollers

Instruction level power model of microcontrollers

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IEEE International symposium on Circuits and Systems (ISCAS)

作者： C. Chakrabarti D. Gaitonde Department of Electrical Engineering Arizona State University Tempe AZ USA Monterey Design Systems Sunnyvale CA USA

In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the system, a good instruction-level energy model is essential. In this paper we present a methodology for instruction level modelling of microcontrollers using gate level power estimation tools. We use the microcontroller, M68HC11, to illustrate this method. We study two different implementations of the microcontroller and show that the energy consumption of each instruction is quite different. Our study reveals that data correlation does not significantly affect the energy consumption of most instructions. Finally, we show the correctness of this model by running some sample programs and showing that the predicted energy estimates are quite close to the actual estimates.

关键词： Microcontrollers Costs Power system modeling Energy consumption Current measurement Hardware Predictive models Power generation digital signal processing Switches

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human-experts rules modeling for linear planimetric features extraction in a remotely sensed images data fusion context

Human-experts rules modeling for linear planimetric features...

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IEEE International symposium on Geoscience and Remote Sensing (IGARSS)

作者： L. Pigeon B. Solaiman K.P.B. Thomson B. Moulin T. Toutin Dépt. I.T.I. École Nationale Supérieure des Télécommunications Brest France Centre de Recherche en Géomatique Pavillon Casault Université Laval QUE Canada Canada Centre for Remote Sensing Ottawa ONT Canada

This study deals with the use of knowledge engineering techniques applied to the design of linear planimetric features (LPF) extraction and classification tools. These features include the most important cartographic elements like roads, energy lines, railroads, etc. Since human knowledge can be classified into different categories such as declarative, procedural and meta-knowledge, the research work presented in this study is related to a part of the procedural knowledge known as rules. These rules presented in the case of the LPF detection are not only essential in the development of semi-automatic general cartographic systems but they also put highlights on inexact and fuzzy reasoning which are powerful tools used in intelligent systems development.

关键词： Feature extraction humans Production Remote sensing Knowledge engineering Roads Satellites Data mining Acceleration Context modeling

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A low voltage CMOS square law analog multiplier

A low voltage CMOS square law analog multiplier

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Southwest symposium on Mixed-Signal design (SSMSD)

作者： T.B. Tarun M. Ismail Istanbul Tech. Univ. Turkey Department of Electrical Engineering Ohio State Uinversity Columbus OH USA

A multiplier composed of a low voltage square-law CMOS cell is introduced in this paper. The analysis of the square-law cell is given. The multiplier operates in the saturation region with a fully balanced input signal. Initial simulations were done for 0.8 /spl mu/m n-well process using BSIM3 model parameters. The circuit has a trade-off between low voltage operation and low power dissipation. The circuit has a cutoff frequency of 99.4 MHz and P/sub dis/=1.5 mW for a bias current of 120 /spl mu/A. The THD is less then -51 dB and -49 dB for fixed input voltages V3 and V1, respectively, for a 1 MHz, 0.5 V peak-to-peak sinusoidal input.

关键词： Low voltage Threshold voltage Very large scale integration MOSFETs Circuit simulation digital signal processing Equations Instruments Semiconductor device modeling Power dissipation

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Symbolic computation in nonlinear control system modeling and analysis

Symbolic computation in nonlinear control system modeling an...

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IEEE International symposium on Computer Aided Control System design (CACSD)

作者： B. de Jager Eindhovan University of Technology Eindhoven Netherlands

The paper discusses the use of symbolic computation for model formulation, model integration, model checking, and model analysis. The zero dynamics plays an important role in the areas of modeling, analysis, and control of linear and nonlinear systems. The zero dynamics gives additional insight in the structure of the model employed and is an aid in modifying a model to satisfy some needs of the modeler. For nonlinear systems the analytical calculations to get the zero dynamics by paper and pencil may be quite involved. Symbolic computation has been used to overcome this difficulty. For a reasonable class of systems the computation can be performed without human aid or intervention, making the zero dynamics procedure a feasible and valuable addition to the toolbox of the modeler, analyst, or control system designer. For system models that are more than moderately complex symbolic computation cannot be fully enjoyed due to the complexity of parts of the algorithms that is (double) exponential in some measure of the problem size, or due to expression swell that cannot be easily eliminated. This implies that symbolic computation will not replace other tools, like those based on numerics, but will complement them.

关键词： Nonlinear control systems Control systems Nonlinear systems Control system analysis Packaging Size measurement Algorithm design and analysis Algebra Mechanical engineering humans

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VHDL-based modeling of a hard real-time task processor

VHDL-based modeling of a hard real-time task processor

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IEEE International symposium on Industrial Electronics (ISIE)

作者： V. Glavinic S. Gros M. Colnaric Faculty of Electrical Engineering and Computing University of Zagreb Zagreb Croatia Faculty of Electrical Engineering and Computer Science University of Maribor Maribor Slovenia

Hard real-time systems are increasingly used in various areas of human activities. They are often implemented by means of specialized solutions, mostly of a suitable hardware/software combination. A frequently adopted approach to the realization of the hardware part is based on ASIC, usually a "general purpose" processor which operates according to real-time constraints. This work describes the modeling of a processor for the hard real-time domain, which is structured as a collection of "task processors" being supervised by another one dedicated to the "kernel" functions. Specifically, the behavior of the task processors is modeled using VHDL and subsequently simulated and tested. The paper also addresses the modeling process by (i) evaluating available CAD tools, and (ii) determining the detailed requirements on the behavior of the task processor. The outcome of these steps influenced the modeling process as the tools used were of restricted functionality, and processor behavior enforced a particular decomposition, respectively. Because of a restricted VHDL subset available, it was necessary to model the task processor on the lowest level of behavioral abstraction. The task processor has been tested against selected test programs written in a corresponding assembly language specially developed for this purpose.

关键词： Process design Embedded system Real time systems Hardware Testing humans Application specific integrated circuits Application software Costs Assembly

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Guiding use case authoring: results of an empirical study

Guiding use case authoring: results of an empirical study

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IEEE International symposium on Requirements engineering

作者： C.B. Achour C. Rolland N.A.M. Maiden C. Souveyet Centre de Recherche en Inf. Paris I Univ. Paris France Centre de Recherche en Informatique Université Paris 1-Sorbonne Paris France Centre for HCI Design School of Informatics City University London UK

This paper presents results from the first of two empirical studies which examine the effectiveness of guidelines for use case authoring. The ESPRIT 21.903 CREWS long-term research project has developed style and content guidelines for authoring use cases for requirements acquisition and validation. The effectiveness of these guidelines has been evaluated under different conditions. Results indicate that: the authoring guidelines improve the overall quality of the use case prose; the different guidelines work differently and with different levels of efficiency; and use cases are never entirely correctly written; thus, they can be systematically corrected. The paper details a qualitative and quantitative comparison between guided and non-guided use case authoring. It outlines lessons learned and implications for the CREWS software tools design.

关键词： Computer aided software engineering Guidelines Electronic switching systems Natural languages Software tools Marine vehicles human computer interaction Read only memory Independent component analysis Unified modeling language

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