Five software design methodologies are compared with respect to suitability for the design and implementation of an object-oriented process control system for the pultrusion process. Methodologies compared include: st...
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Five software design methodologies are compared with respect to suitability for the design and implementation of an object-oriented process control system for the pultrusion process. Methodologies compared include: structured systems analysis and design (SSAD) with real time extensions, structured analysis and design technique (SADT), Jackson system development (JSD), object oriented design (OOD), and object modeling technique (OMT). The author attempt to ascertain which methodology is most productive for the design and implementation of the control system defined in their case study. The concepts that a "methods viewpoint will influence modeling", and of "diagramming as a language essential for clear thinking and human communication" are analyzed within the context of the same case study.< >
The design of a four degree-of-freedom, force-reflecting manipulandum for manual interaction with virtual environments is presented. The device emulates a handtool which the operator can use to explore and manipulator...
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The design of a four degree-of-freedom, force-reflecting manipulandum for manual interaction with virtual environments is presented. The device emulates a handtool which the operator can use to explore and manipulator virtual objects. The performance of the device (its including to generate a broad range of impedances) is determined by a variety of factors, including the inherent dynamics of the manipulator, the accuracy and resolution of sensors, and the speed of the digital controller.< >
Due to the increasing clock-rate and package-density, EMC-phenomena like reflections and crosstalk gain more and more importance and may even disturb the function of the digital gates on a printed-circuit board (PCB)....
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ISBN:
(纸本)9781509031955
Due to the increasing clock-rate and package-density, EMC-phenomena like reflections and crosstalk gain more and more importance and may even disturb the function of the digital gates on a printed-circuit board (PCB). In order to prevent these disturbances or limit their effects, phenomena of electromagnetic compatibility (EMC) must be considered during the layout design of printed-circuit boards. In this paper concepts for the development and specification of EMC-design models are presented. EMC-design models offer a robust framework to incorporate complex EMC-constraints and cost criteria into methods for automated layout design (placement and routing). In addition, some features of the EMC-constrained router HERO are presented, which can handle these models. Examples of the achieved results are reported.
The capabilities of the new DIII-D digital control system have motivated an effort to apply state-of-the-art multivariable techniques to control of the DIII-D tokamak. Tokamak plasma control is inherently multivariabl...
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The capabilities of the new DIII-D digital control system have motivated an effort to apply state-of-the-art multivariable techniques to control of the DIII-D tokamak. Tokamak plasma control is inherently multivariable in nature, since many closely coupled equilibrium parameters must be regulated simultaneously during a discharge. The present work describes the determination of dynamic models for plasma response and plasma interaction with conducting structures, necessary for calculation of accurate and robust multivariable control laws. Plasma response matrices and shape prediction matrices are calculated from analytic models and perturbed ideal MHD equilibria. Plasma resistive effects are described by a circuit equation which conserves poloidal flux on time scales shorter than the plasma L/R time. Shape estimation and plasma/conductor eigenmode spectrum results are presented along with experimental data and time-dependent simulations.
A dynamic mixed-mode approach for the simulation of physical faults in MOS VLSI circuits is described, with emphasis on bridging faults. Bridging faults in digital circuits could cause the affected gates or subcircuit...
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A dynamic mixed-mode approach for the simulation of physical faults in MOS VLSI circuits is described, with emphasis on bridging faults. Bridging faults in digital circuits could cause the affected gates or subcircuits, and possibly their immediate fanouts, to behave as analog subcircuits in a localized region within a design. Mixed digital gate-level and switch-level simulation with dynamic localized analog simulation, depending on the location of a fault, provides a robust and fast way to perform digital fault simulation accurately and fast enough for practical fault simulation.< >
A mixed digital analog approach is presented for VLSI implementation of an associative memory model using temporal relations. The proposed model is based on the biological model of the cortex. There are two motivation...
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A mixed digital analog approach is presented for VLSI implementation of an associative memory model using temporal relations. The proposed model is based on the biological model of the cortex. There are two motivations for this research. First, the analog and parallel nature of the neural network approach may provide an efficient technique to achieve the high speed requirement for real-time coding systems with less hardware than both digital techniques and adaptive neural techniques. Second, the model proposed, based on the biological neural network, may be useful as a model of the information processing in the human brain. The proposed circuit realizing such a theory is faster, smaller in area, and more efficient than current systems.< >
A design algorithm for multiplierless 2-layer feedforward neural networks suitable for discrete input-output mapping is proposed in this paper. By using this algorithm, the obtained network has continuous valued weigh...
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A design algorithm for multiplierless 2-layer feedforward neural networks suitable for discrete input-output mapping is proposed in this paper. By using this algorithm, the obtained network has continuous valued weights at the first layer and single-term powers-of-two valued weights at the second layer such that no multiplications are needed in the computation after training. On the other hand, step function is used at the output layer and a simplified version of sigmoid function is used at the hidden layer as activation functions which simplifies digital hardware implementation further. Simulation results showed that such networks can retain nearly identical recall performance of the corresponding networks using continuous weights, while having increased computational speed in applications and reduced cost in digital hardware implementation.< >
New algorithms for the derivation of the transfer function matrix of two-dimensional digital filters from their state-space representations are proposed. Two key steps in developing the new algorithms are reported. Fi...
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New algorithms for the derivation of the transfer function matrix of two-dimensional digital filters from their state-space representations are proposed. Two key steps in developing the new algorithms are reported. First, the transfer function is formulated in terms of the characteristic polynomials of the matrices involved. Second, an efficient algorithm for the identification of 1D polynomial coefficients is developed and is, in turn, used to determine the coefficient matrices of the 2D transfer function. As all the matrices of the 2D transfer function required in the first step can be obtained by inverting one complex matrix in conjunction with a few matrix multiplications and the second step leads to an unitary Vandermonde system, the proposed algorithms are computationally efficient and reliable. The efficiency of the algorithms is illustrated by an example.< >
A yield model for gallium arsenide acoustic charge transport transversal filters is presented. It differs from previous IC yield models in that it is not assumed that individual failures of the nondestructive sensing ...
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A yield model for gallium arsenide acoustic charge transport transversal filters is presented. It differs from previous IC yield models in that it is not assumed that individual failures of the nondestructive sensing taps necessarily cause a device failure. In this way, a redundancy in the number of taps included in the design is accounted for. Poisson statistics are used to describe the tap failures. A representative design example is presented, and the critical area for device failure is calculated. Yield is predicted for a range of defect densities, distribution functions, and redundancies. To verify the model, a Monte Carlo simulation is performed on an equivalent circuit model of the device. The results of the yield model are then compared to the Monte Carlo simulation. Better than 95% agreement is obtained for the Poisson model weighted by a triangular distribution function with one redundant circuit.< >
For part I see ibid., p.118-25. The time complexity of the fast algorithm for the disjunctive decomposition of m-valued functions, proposed in part I is studied. A probabilistic approach is used to estimate the time c...
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For part I see ibid., p.118-25. The time complexity of the fast algorithm for the disjunctive decomposition of m-valued functions, proposed in part I is studied. A probabilistic approach is used to estimate the time complexity for random m-valued functions, where several statistical properties of such functions are obtained and used in the analysis. It is shown that the time complexity for random functions is of the order of (nm)/sup 3/. In the case in which a random function has a single disjunctive decomposition, the time complexity becomes of the order n/sup 3/m/sup n/. The algorithm was simulated on a digital computer. The experimental results are in agreement with the theoretical predictions.< >
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