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检索条件"任意字段=Distributed Memory Computing Conference"

共 8902 条记录，以下是1-10 订阅

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Unveiling DRAM Failures across Different CPU Architectures in Large-Scale Datacenters 44

Unveiling DRAM Failures across Different CPU Architectures i...

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Yu, Qiao Cardoso, Jorge Kao, Odej Tech Univ Berlin Berlin Germany Huawei Munich Res Ctr Munich Germany Univ Coimbra CISUC Coimbra Portugal

ISBN: (纸本)9798350386066;9798350386059

memory failures frequently lead to server breakdowns in large-scale datacenters, with uncorrectable errors (UEs) serving as primary indicators of defects in Dual Inline memory Modules (DIMMs). Existing approaches mainly focus on predicting UEs using correctable errors (CEs), but often neglect the relationships of these errors across various CPU architectures, especially in the context of Error Correction Code (ECC). In this paper, we explore the correlation between CEs and UEs across different CPU Architectures, such as x86 and ARM. Our analysis reveals distinctive failure patterns in memory specific to each processor platform. Leveraging Machine Learning (ML) techniques on production datasets, we demonstrate that our approach substantially enhances prediction performance up to 15% in F1-score compared to the existing algorithm.

关键词： AIOps Failure prediction Machine learning memory Reliability Uncorrectable error

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Portus: Efficient DNN Checkpointing to Persistent memory with Zero-Copy 44

Portus: Efficient DNN Checkpointing to Persistent Memory wit...

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Li, Yuanhao Wu, Tianyuan Li, Guancheng Song, Yanjie Yin, Shu Shanghaitech Univ Shanghai Peoples R China Shanghai Engn Res Ctr Intelligent Vis & Imaging Shanghai Peoples R China

ISBN: (纸本)9798350386066;9798350386059

We introduce Portus, an efficient checkpointing system for DNN models. The core of Portus is a three-level index structure and a direct RDMA datapath that enables fast checkpoints between GPUs and persistent memory in a serialization-free way. Portus offers a zero-copy approach between GPU and persistent memory without involving main memory and kernel crossings to underlying file systems. Portus also applies an asynchronous mechanism to hide the checkpointing overhead in the model training procedures. We integrated a Portus prototype into a high-performance AI cluster with NVIDIA (R) V100 and A40 GPUs and Intel (R) OptaneTpersistent memory, then evaluated its performance in both single-GPU and multi-GPU large model training scenarios. Experiment results show that compared to a state-of-the-art checkpointing system, Portus achieves up to 9.23x and 7.0x speedup in checkpointing and restoring, respectively. Portus achieves up to 2.6x higher throughput and 8x faster checkpointing operation on a large language model, GPT-22B.

关键词： Checkpointing Persistence memory RDMA Systems for AI

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MEGA: More Efficient Graph Attention for GNNs 44

MEGA: More Efficient Graph Attention for GNNs

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Deng, Weishu Rao, Jia Univ Texas Arlington Dept Comp Sci & Engn Arlington TX 76019 USA

ISBN: (纸本)9798350386066;9798350386059

Graph neural networks (GNNs) have demonstrated effectiveness across diverse application domains by leveraging graph information to uncover intrinsic correlations alongside feature representation. This enables GNNs to explore richer information compared to conventional neural networks, resulting in enhanced predictive performance. However, the integration of graph-structured data into the learning process poses two challenges. First, the sparsity and irregularity of the graph representation result in inefficient and expensive memory accesses on throughput-oriented accelerators, such as GPUs. Second, as GNN training involves interleaved graph operations to extract topological information and neural operations to update node or edge embeddings, the joint optimization of these two operations on accelerators is challenging due to their distinct resource requirements. Among GNN graph operations, graph attention which helps focus GNN training on highly correlated nodes is critical to training performance and model accuracy. However, our profiling of representative GNNs reveals that irregular memory access during graph attention accounts for the dominating overhead in GNN training. To address this issue, this paper proposes a more efficient graph attention method MEGA to accelerate GNN training. MEGA converts the original graph representation into one that regularizes memory access patterns for graph attention. Specifically, during preprocessing, MEGA traverses a graph to derive a schedule for graph attention and uses the schedule to reorganize the graph representation for optimized memory access. MEGA explores several techniques to balance memory access efficiency and preserve the original graph properties to avoid the loss of model accuracy. Experimental results with representative GNNs and graph data sets show that MEGA consistently outperforms conventional graph attention methods with up to 3x speedup.

关键词： Graph Neural Networks GPU computing memory Access patterns Data transaction

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Type-Theory of Algorithms with Chain-Free memory 21st

Type-Theory of Algorithms with Chain-Free Memory

引用

21st International Symposium on distributed computing and Artificial Intelligence

作者： Loukanova, Roussanka Bulgarian Acad Sci Inst Math & Informat Sofia Bulgaria

ISBN: (纸本)9783031820724;9783031820731

The results of the stepwise computations are saved in memory slots, for possible reuse. The extended calculus reduces unnecessary iterations of assignments, which are chains of unnecessary assignments, by copying values of terms from one memory slot to another, without any essential algorithmic changes. The primary applications of the chain-free type theory of recursion are for computational semantics of formal and natural languages, including programming languages and compilers.

关键词： formal language algorithms lambda recursion reduction calculus computing in memory memorisation chain-free computation

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distributed Large memory and Message Passing Interface in Cloud Environment using OpenStack Cloud Platform 15

Distributed Large Memory and Message Passing Interface in Cl...

引用

15th International conference on Advances in computing, Control, and Telecommunication Technologies, ACT 2024

作者： Deshmukh, Pranjali P. Prof. Ram Meghe Institute of Technology & Research Badnera Amravati India

ISBN: (纸本)9798331300579

distributed large memory offers the use of large virtual memory by using remote memory distributed over nodes in a cluster. The message passing interface (MPI) plays important role in DLM. MPI-based DLM manages the large virtual memory over the cluster using MPI batch queuing system. In distributed memory system message MPI is important parallel programming. As the number of virtual machines increases MPI and shared memory parallel programming combined to perform efficient communication in virtual machines [1,2]. Various tasks communicate with each other by sharing memory on the different disk through shared memory distributed computing. If various tasks are trying to access same the same memory location for reading and writing purpose, sometimes it may cause deadlock. In this case synchronization mechanism should handle such situation to keep the integrity of the data [2]. MapReduce and Hadoop are having inbuilt functions to handle distributed shared memory mechanism. The distributed computing with MPI can process thousands of parallel processes in cloud environment. © Grenze Scientific Society, 2024.

关键词： Cloud platforms

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DNN Partitioning and Assignment for distributed Inference in SGX Empowered Edge Cloud 44

DNN Partitioning and Assignment for Distributed Inference in...

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Li, Yuepeng Zeng, Deze Gu, Lin Guo, Song Zomaya, Albert Y. China Univ Geosci Sch Comp Sci Wuhan Peoples R China Huazhong Univ Sci & Technol Sch Comp Sci & Technol Wuhan Peoples R China Hong Kong Polytech Univ Dept Comp Hong Kong Peoples R China Univ Sydney Sch Comp Sci Sydney NSW Australia Minist Educ Engn Res Ctr Nat Resource Informat Management & D Wuhan 430074 Peoples R China

ISBN: (纸本)9798350386066;9798350386059

distributed Deep Neural Network (DNN) inference is a promising technology to explore the distributed resources in edge cloud to realize edge intelligence. Meanwhile the inherent resource sharing nature of edge cloud infrastructure also raises serious concerns on security and privacy. Software Guard Extensions (SGX) emerges as a potential hardware-level solution but its limited secure memory (i.e., enclave page cache) imposes new challenges, especially in contrast to memory-hungry DNN models. A task's performance will be severely affected when its memory footprint is beyond the enclave page cache size, due to expensive secure page swapping. In this case, how to appropriately partition a DNN model and assign the partitions to distributed edge servers to efficiently utilize edge resources for fast secure inference becomes a challenging problem. In this paper, we first show that this problem is NP-hard. We further propose a memory-aware distributed Inference Acceleration (MEDIA) algorithm, whose guaranteed approximation ratio is also formally analyzed. We have implemented a prototype system and applied some well-known representative DNN models to evaluate MEDIA's performance. Through extensive experiments, we verify the efficiency of MEDIA by the fact that it reduces the inference time by 19.5%-38.1% in comparison with state-of-the-art approaches.

关键词： DNN SGX distributed inference

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Efficient Pretraining and Finetuning of Quantized LLMs with Low-rank Structure 44

Efficient Pretraining and Finetuning of Quantized LLMs with ...

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Liu, Xiao-Yang Zhang, Jie Wang, Guoxuan Tong, Weiqin Walid, Anwar Rensselaer Polytech Inst Dept Comp Sci Troy NY 12180 USA Columbia Univ Dept Elect Engn New York NY 10027 USA Shanghai Univ Sch Comp Engn & Sci Shanghai Peoples R China Johns Hopkins Univ Dept Comp Sci Whiting Sch Engn Baltimore MD 21218 USA

ISBN: (纸本)9798350386066;9798350386059

Large language models (LLMs) are computationally intensive. The computation workload and the memory footprint grow quadratically with the dimension (layer width). Most of LLMs' parameters come from the linear layers of the transformer structure and are highly redundant. These linear layers contribute more than 80% of the computation workload and 99% of the model size. To pretrain and finetune LLMs efficiently, there are three major challenges to address: 1) reducing redundancy of the linear layers;2) reducing GPU memory footprint;3) improving GPU utilization when using distributed training. Prior methods, such as LoRA and QLoRA, utilized low-rank structure and quantization to reduce the number of trainable parameters and model size, respectively. However, the resulting model still consumes a large amount of GPU memory. In this paper, we present high-performance GPU-based methods for both pretraining and finetuning quantized LLMs with low-rank structures. We replace a single linear layer in the transformer structure with two narrower linear layers, significantly reducing the number of parameters by several orders of magnitude. By quantizing the pretrained parameters into low precision (8-bit and 4-bit), the memory consumption of the resulting model is further reduced. Compared with existing LLMs, our methods achieve a speedup of 1.3x and a model compression ratio of 2.64x for pretraining without accuracy drop. For finetuning, our methods achieve an average accuracy score increase of 6.3 and 24.0 in general tasks and financial tasks, respectively, and GPU memory consumption is reduced by 6.3x. The sizes of our models are smaller than 0.59 GB, allowing inference on a smartphone.

关键词： LLMs pretraining finetuning low-rank high-performance computing

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vBoost: A Lock-free distributed Index based on vEB Tree for Disaggregated memory

vBoost: A Lock-free Distributed Index based on vEB Tree for ...

引用

2024 International conference on Cluster computing

作者： Li, Yuting Xu, Yun Wang, Pengcheng Xu, Yonghui Wang, Weiguang Univ Sci & Technol China Hefei Peoples R China Huawei Nanjing Peoples R China

ISBN: (纸本)9798350383461;9798350383454

The disaggregated memory (DM) architecture separates CPU and memory resources into two components: computing servers and memory servers, connecting them via high-speed remote direct memory access (RDMA) networks for low-latency data access. Current tree indexes for DM rely on expensive lockbased concurrency control mechanisms, highlighting the need for a lock-free solution. This paper proposes vBoost, a lock-free distributed index based on the van Emde Boas (vEB) tree, which efficiently handles all operations using only one-sided RDMA verbs, without involving CPU resources on the memory server. Additinaly, vBoost redesigns the index structure, inheriting the vEB tree's feature of no node splitting or merging, and utilizes RDMA atomic verbs to ensure consistency and correctness of concurrent access. Experimental results demonstrate that vBoost outperforms state-of-the-art tree indexes, achieving up to 77.0% higher throughput and better scalability with its lock-free algorithm.

关键词： distributed indexes lock-free concurrency control RDMA

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Poster: Load Balancing for In-memory Key-Value Data Stores 44

Poster: Load Balancing for In-Memory Key-Value Data Stores

引用

44th IEEE International conference on distributed computing Systems (ICDCS)

作者： Azqueta-Alzuaz, Ainhoa Pahno-Martinez, Marta Univ Politecn Madrid Madrid Spain

ISBN: (纸本)9798350386066;9798350386059

Key-value data stores have become more and more popular and are widely used nowadays either on premises or managed in the cloud. This type of data stores distribute data in order to scale. Data is sharded among the different nodes using a hash function. This partitioning of the data does not change over time in some data stores, for instance in Redis. Depending on the access pattern to the data, this partitioning may lead to overloaded nodes while others are idle. This poster presents a non-intrusive protocol for data migration to balance the load in in-memory key-value data stores. The load balancer migrates data from one overloaded node to a least loaded node without stopping processing. The goal is to distribute the data so that the performance of the whole data store improves. The protocol is implemented in KeyDB, a multi-threaded version of Redis, and its performance is evaluated using the Memtier benchmark. Results show an improvement in throughput of up to 30 % and 3x latency decrease.

关键词： Key-value data stores data distribution load balancing

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A dataflow architecture with distributed control for DNN acceleration 13

A dataflow architecture with distributed control for DNN acc...

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13th Mediterranean conference on Embedded computing (MECO)

作者： Krichene, Hana Prasad, Rohit Univ Paris Saclay CEA List F-91120 Palaiseau France

ISBN: (纸本)9798350387568;9798350387575

The increasing demand for edge computing requires effective Deep Neural Network (DNN) accelerators that are suitable for resource-limited environments. This paper presents a new method that uses distributed control methodology for DNN acceleration on edge devices. Our architecture offers significant improvements over a similar architecture without such feature, including a remarkable reduction in memory requirements by up to 7x, along with notable speedups of up to 7.42x in DNN processing. Additionally, our design reaches energy efficiency of a maximum of 4300 MOPS/W, demonstrating its potential to address resource constraints while improving DNN performance on edge platforms.

关键词： distributed control DNN dataflow architecture

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