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检索条件"任意字段=Distributed Memory Computing Conference"

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Adaptive Gradient Data Partition and Route Selection for distributed DNN Training 20th

Adaptive Gradient Data Partition and Route Selection for D...

引用

20th IFIP WG 10.3 International conference on Network and Parallel computing, NPC 2024

作者： Chai, Bo Tan, Xiaobin Yuan, Shenzhi Jia, Guangge Meng, Qiushi Wang, Weifeng Zhu, Shiyin University of Science and Technology of China Hefei China Institute of Artificial Intelligence Hefei Comprehensive National Science Center Hefei China H3C Technologies Co. Limited Beijing China

ISBN: (纸本)9789819628636

As the scale of distributed training for Deep Neural Network (DNN) increases, communication has become a critical performance bottleneck in data center networks. In-Network Aggregation (INA) can accelerate aggregating gradients process, the critical communication bottleneck in distributed DNN training. Due to the limited processing capacity of network switch, existing aggregation approaches have turned to a combination of INA and Parameter Server (PS) methods. However, these approaches employ a fixed partitioning of the gradient data, leading to suboptimal performance. This paper proposes GPRS, an adaptive gradient aggregation framework for distributed DNN training, which adaptively combines the line-rate processing of INA and large memory capacity of PS. We present an adaptive gradient data partition scheme, which divides the gradient data into INA and PS aggregation. We propose a heuristic algorithm that determines the aggregation route selection by assigning priority to the available network paths. To validate our approach, we build a real-world experimental testbed and implement the proposed framework. Experimental results show that it can overcome the limitations of traditional INA-only methods and reduce communication time by 15% ∼ 52% for DNN training of varying scales. © IFIP International Federation for Information Processing 2025.

关键词： Data aggregation

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615414

The proceedings contain 131 papers. The special focus in this conference is on Algorithms and Architectures for Parallel Processing. The topics include: MARO: Enabling Full MPI Automatic Refactoring in DSL-Based Programming Framework;SSC: An SRAM-Based Silence computing Design for On-chip memory;TP-BFT: A Faster Asynchronous BFT Consensus with Parallel Structure;LTP: A Lightweight On-Chip Temporary Prefetcher for Data-Dependent memory Accesses;A Neural Network-Based PUF Protection Method Against Machine Learning Attack;Compression Format and Systolic Array Structure Co-design for Accelerating Sparse Matrix Multiplication in DNNs;multidimensional Intrinsic Identity Construction and Dynamic Seamless Authentication Schemes in IoT Environments;invisible Backdoor Attack with Image Contours Triggers;finestra: Multi-aggregator Swarm Learning for Gradient Leakage Defense;DIsFU: Protecting Innocent Clients in Federated Unlearning;multiple-Round Aggregation of Abstract Semantics for Secure Heterogeneous Federated Learning;dynamic Privacy Protection with Large Language Model in Social Networks;a Dynamic Symmetric Searchable Encryption Scheme for Rapid Conjunctive Queries;a Data Watermark Scheme Base on Data Converted Bitmap for Data Trading;distributed Incentive Algorithm for Fine-Grained Offloading in Vehicular Ad Hoc Networks;mitigating Over-Unlearning in Machine Unlearning with Synthetic Data Augmentation;AW-YOLOv9: Adverse Weather Conditions Adaptation for UAV Detection;efficient and Privacy-Preserving Ranking-Based Federated Learning;on-Chain Dynamic Policy Evaluation for Decentralized Access Control;DPG-FairFL: A Dual-Phase GAN-Based Defense Framework Against Image-Based Fairness Data Poisoning Attacks in Federated Learning.

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615278

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615476

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615506

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615247

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

24th International Conference on Algorithms and Architecture...

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24th International conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2024

ISBN: (纸本)9789819615445

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Parallel Execution Strategies for Cellular Automata on Shared memory Architectures 33

Parallel Execution Strategies for Cellular Automata on Share...

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33rd Euromicro International conference on Parallel, distributed, and Network-Based Processing, PDP 2025

作者： Giordano, Andrea De Rango, Alessio Mendicino, Giuseppe D'ambrosio, Donato Macri, Davide Rizzo, Luigi Rongo, Rocco Spataro, William ICAR-CNR Rende Italy University of Calabria Department of Environmental Engineering Italy University of Calabria Department of Mathematics and Computer Science Italy

ISBN: (纸本)9798331524937

Cellular Automata (CA) are extensively utilized for modeling and simulating complex systems due to their simplicity, flexibility, and ability to represent diverse phenomena. However, the computational intensity of CA models, particularly in large-scale applications, demands the development of efficient parallel execution techniques. This is especially critical when targeting shared memory architectures, where resource management and thread coordination play pivotal roles in achieving optimal performance. In this study, we examine a range of parallel execution strategies specifically designed to enhance the efficiency and scalability of CA models. The experimental evaluation highlights good scalability in execution time and resource utilization, making these strategies highly suitable for extensive simulations across various domains. Additionally, the results emphasize that imbalance conditions - often arising during CA computations - can considerably influence the effectiveness of choosing a given strategy. © 2025 IEEE.

关键词： memory management

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StressViT: Splitting and Compressing Vision Transformer Through Edge-Cloud Collaboration 27th

StressViT: Splitting and Compressing Vision Transformer Thr...

引用

27th International conference on Pattern Recognition, ICPR 2024

作者： Lin, Changyao Liu, Yi Li, Xiangyu Li, Chengxiang Zhang, Hao Jin, Jing Liu, Jie Faculty of Computing Harbin Institute of Technology Harbin China School of Astronautics Harbin Institute of Technology Harbin China International Research Institute for Artificial Intelligence Harbin Institute of Technology Shenzhen China Nanjing Research Center Huawei Technologies Co. Ltd Nanjing China

ISBN: (纸本)9783031781681

The emergence of ViT demonstrates the viability of Transformer in the field of computer vision, rivaling or even surpassing the performance of some CNN-based models. However, ViT’s substantial computation and memory demands present deployment challenges on resource-constrained devices. While various lightweight ViT techniques have been developed, they do not combine collaboration between heterogeneous devices for model splitting. Especially for large Transformer-based models, single-device deployment is infeasible, necessitating model splitting across multiple, even heterogeneous devices for distributed inference, and the optimal split point becomes crucial. Therefore, for a typical heterogeneous scenario of edge-cloud, we propose StressViT to split and compressvisual Transformer through edge-cloud collaboration. StressViT considers the disparities in computility and memory between edge and cloud environments, striving to improve inference accuracy while satisfying memory and compression constraints. Evaluations on four heterogeneous devices and two datasets confirm the efficacy of StressViT, achieving nearly 50% reduction of end-to-end latency with almost no loss of accuracy. StressViT can also be applied to homogeneous devices for edge-edge or cloud-cloud splitting, and can be easily extended to split across more than two devices. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Cloud platforms

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Batch Updates of distributed Streaming Graphs using Linear Algebra 24

Batch Updates of Distributed Streaming Graphs using Linear A...

引用

Proceedings of the SC '24 Workshops of the International conference on High Performance computing, Network, Storage, and Analysis

作者： Elaheh Hassani Md Taufique Hussain Ariful Azad Dept. of Intelligent Systems Engineering Indiana University Bloomington IN USA

ISBN: (纸本)9798350355543

We develop a distributed-memory parallel algorithm for performing batch updates on streaming graphs, where vertices and edges are continuously added or removed. Our algorithm leverages distributed sparse matrices as the core data structures, utilizing equivalent sparse matrix operations to execute graph updates. By reducing unnecessary communication among processes and employing shared-memory parallelism, we accelerate updates of distributed graphs. Additionally, we maintain a balanced load in the output matrix by permuting the resultant matrix during the update process. We demonstrate that our streaming update algorithm is at least 25 times faster than alternative linear-algebraic methods and scales linearly up to 4,096 cores (32 nodes) on a Cray EX supercomputer.

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