Fused CPU-GPU architectures that utilize the powerful features of both processors are common nowadays. Using homogeneous interconnect for such heterogeneous processors can result in performance degradation and power i...
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ISBN:
(纸本)9781728165820
Fused CPU-GPU architectures that utilize the powerful features of both processors are common nowadays. Using homogeneous interconnect for such heterogeneous processors can result in performance degradation and power increase. This paper explores the optimization of heterogeneous NoC design to connect heterogeneous CPU-GPU architecture in terms of NoC performance and power. This involves solving four different NoC design sub -problems simultaneously;processing elements (PEs) mapping, buffer size and virtual channel assignments, and links' bandwidth determination. Heuristic-based optimization methods were proposed to obtain a near-optimal heterogeneous NoC design, and formal models were used to get a measure of the NoC performance and power of the evaluated design. The obtained optimal designs were validated using a full-system simulator.
Cloud Computing have highlighted the importance of container orchestration to manage distributed implication's life-cycle. With the advent of Edge Computing, DevOs expect to find die features of containers in the ...
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ISBN:
(纸本)9781665414555
Cloud Computing have highlighted the importance of container orchestration to manage distributed implication's life-cycle. With the advent of Edge Computing, DevOs expect to find die features of containers in the cloud, also at the edge. However, orchestration systems have MA been designed to deal with geo-distribution aspects such as latency, intermittent networks, etc. In other words, it is unclear whether they could he directly used on top of massively distributed edge infrastructures without revision. In this paper, we provide an evaluation of Kubernetes in a WANWide context. Precisely, we present and discuss results we obtained during an experimental campaign to analyze the impact of WAN links on its behaviour. While there exist initiatives investigating Kubernetes revisions to deal with distribution aspects, there is, to the best of our knowledge. no rigorous performance evaluations to disqualify the vanilla code.
In consequence of an increasing demand for high-performance system, multiprocessor architectures became trend and used in a variety of fields (e.g. PC, laptops, mobile devices and so on). Multi-core processor can get ...
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ISBN:
(纸本)9781467387767
In consequence of an increasing demand for high-performance system, multiprocessor architectures became trend and used in a variety of fields (e.g. PC, laptops, mobile devices and so on). Multi-core processor can get outstanding throughput with relatively lower operating frequency and power consumption. In order to obtain the maximum throughput in a multi-core structure, it is necessary to schedule assigning tasks to multiple cores. In this paper, we propose a hardware scheduler that is tailored for multicore block cipher and verify the feasibility of the scheduler using AES algorithm.
We present here a novel algorithm based on a MapReduce approach to facilitate the discovery of novel therapeutic targets. The proposed algorithm has been enabled to scan a set biological pathways in order to discover ...
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ISBN:
(纸本)9781728116440
We present here a novel algorithm based on a MapReduce approach to facilitate the discovery of novel therapeutic targets. The proposed algorithm has been enabled to scan a set biological pathways in order to discover non-trivial ( less common) routes. Such routes represent a chain of biochemical interactions among different biological actors. These actors can be represented by quite distant nodes along the devised pathway. Our approach detects nodes that are far from the initial target nodes, also showing the number of times that a given route has been found inside the selected set of biological pathways.
This paper proposes a reliability-aware mapping technique for multi applications in networks-on-chip. The proposed technique consists of three main steps: 1) Generating a new core graph enriched by spares, based on a ...
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ISBN:
(纸本)9780769549392;9781467353212
This paper proposes a reliability-aware mapping technique for multi applications in networks-on-chip. The proposed technique consists of three main steps: 1) Generating a new core graph enriched by spares, based on a given application core graph, 2) Finding smallest rectangular region to place the given application using a heuristic algorithm, and 3) Searching the specified region into whole NoC, and selecting a region which results minimum overall performance and communication energy. Spare cores are connected to all vertices of application core graph and their edges are weighted by failure probability of processing cores assigned to the application and will be updated during mapping process. Many application core graphs are used to evaluate the proposed technique. The results of 100,000 fault injection experiments show communication energy reduction and performance improvement compared to well-known related techniques in both faulty and fault-free modes.
We evaluate the applicability of many-core architectures for the simulation of networks on chips (NoC). Compared to the well established shared memory multi-core architectures, many-core architectures significantly di...
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ISBN:
(纸本)9781467387767
We evaluate the applicability of many-core architectures for the simulation of networks on chips (NoC). Compared to the well established shared memory multi-core architectures, many-core architectures significantly differ not only in the number of processing elements but also in the on-chip communication architecture, the memory subsystem, and the computational performance of an individual core. Proven multi-core simulation approaches do not consider such architectural aspects and thus suffer limited performance when being applied to many-core architectures. To enable high performance simulation, we identify conceptual drawbacks of state of the art parallel simulation approaches and consequently propose a novel globally asynchronous locally synchronous (GALS) simulation concept suited for many core architectures. Our results show that our GALS simulation approach yields a speedup of up to 2.3 over parallel discrete event simulation.
Ant algorithms are well-known metaheuristics which have been widely studied and used since two decades. Generally, an ant is a constructive heuristic able to build a solution from scratch. However, other types of ant ...
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ISBN:
(纸本)9781479927289
Ant algorithms are well-known metaheuristics which have been widely studied and used since two decades. Generally, an ant is a constructive heuristic able to build a solution from scratch. However, other types of ant algorithms have recently emerged: the discussion is thus not limited by the common framework of the constructive ant algorithms. The goal of this paper is on the one hand to classify and benchmark the ant algorithms, and on the other hand to put forward the successful elements of these methods. Moreover, the performance of the different types of ant algorithms is evaluated according to several criteria, and not only according to the quality of the obtained solutions.
Sensor-based infrastructures are important base technology for cooperative media spaces that support the natural interaction of users with their physical environment and with other users beyond the traditional keyboar...
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ISBN:
(纸本)9780769535449
Sensor-based infrastructures are important base technology for cooperative media spaces that support the natural interaction of users with their physical environment and with other users beyond the traditional keyboard and mouse. Sensor-based infrastructures basically capture data from sensors, store and process these data, and provide the data to clients. Several infrastructures have been developed;they all have their specific strengths in supporting either publish or subscribe, push or pull. In this paper we present a generic and advanced concept and implementation of a publish and subscribe mechanism for distributed sensor-based infrastructures that is sophisticated yet easy to configure and that is resource-saving through load balancing and provides push and pull. We exemplify this publish and subscribe mechanism in the CoLocScribe use case where we designed and developed advanced publish and subscribe for a cooperative media space.
In this paper we study the performance of constraint-based local search solvers on a GPU. The massively parallel architecture of the GPU makes it possible to explore parallelism at two different levels inside the loca...
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ISBN:
(纸本)9781479927289
In this paper we study the performance of constraint-based local search solvers on a GPU. The massively parallel architecture of the GPU makes it possible to explore parallelism at two different levels inside the local search algorithm. First, by executing multiple copies of the algorithm in a multiwalk manner and, second, by evaluating large neighborhoods in parallel in a single-walk manner. Experiments on three well-known problem benchmarks indicate that the current GPU implementation is up to 17 times faster than a well-tuned sequential algorithm implemented on a desktop computer.
In this paper, we present parallelo parallel Library (PPL), a novel Rust library for structured parallel programming. Rust's fearless concurrency concept makes it a promising language for parallel application deve...
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ISBN:
(纸本)9798350363074;9798350363081
In this paper, we present parallelo parallel Library (PPL), a novel Rust library for structured parallel programming. Rust's fearless concurrency concept makes it a promising language for parallel application development. We present the development progress of parallelo parallel Library (PPL) and report preliminary performance results, comparing it to existing popular Rust libraries. Our results show that PPL provides robust support for parallel programming through high-level abstractions, delivering performance that matches or exceeds current state-of-the-art in the Rust ecosystem.
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