based on the strong analogy between neural networks and distributed diagnosis models, diagnostic algorithms are presented which are similar to the learning algorithm used in neural networks. Diagnostic implications of...
based on the strong analogy between neural networks and distributed diagnosis models, diagnostic algorithms are presented which are similar to the learning algorithm used in neural networks. Diagnostic implications of convergence theorems proved by the Lyapunov function are also discussed. Regarding diagnosis process as a recalling process in the associative memory, a diagnostic method of associative diagnosis is also presented. A good guess of diagnosis is given as a key to recalling the correct diagnosis. The authors regard the distributed diagnosis as an immune network model, a novel PDP (paralleldistributedprocessing) model. This models the recognition capability emergent from cooperative recognition of interconnected units
Harmonic grammar (Legendre, et al., 1990) is a connectionist theory of linguistic well-formedness based on the assumption that the well-formedness of a sentence can be measured by the harmony (negative energy) of the ...
ISBN:
(纸本)9781558601840
Harmonic grammar (Legendre, et al., 1990) is a connectionist theory of linguistic well-formedness based on the assumption that the well-formedness of a sentence can be measured by the harmony (negative energy) of the corresponding connectionist state. Assuming a lower-level connectionist network that obeys a few general connectionist principles but is otherwise unspecified, we construct a higher-level network with an equivalent harmony function that captures the most linguistically relevant global aspects of the lower level network. In this paper, we extend the tensor product representation (Smolensky 1990) to fully recursive representations of recursively structured objects like sentences in the lower-level network. We show theoretically and with an example the power of the new technique for paralleldistributed structure processing.
A neural-network-based routing algorithm is presented which demonstrates the ability to take into account simultaneously the shortest path and the channel capacity in computer communication networks. A Hopfield-type o...
A neural-network-based routing algorithm is presented which demonstrates the ability to take into account simultaneously the shortest path and the channel capacity in computer communication networks. A Hopfield-type of neural-network architecture is proposed to provide the necessary connections and weights, and it is considered as a massively paralleldistributedprocessing system with the ability to reconfigure a route through dynamic learning. This provides an optimum transmission path from the source node to the destination node. The traffic conditions measured throughout the system have been investigated. No congestion occurs in this network because it adjusts to the changes in the status of weights and provides a dynamic response according to the input traffic load. Simulation of a ten-node communication network shows not only the efficiency but also the capability of generating a route if broken links occur or the channels are saturated
The focus of this work is on a particular class of unstable global states: the states with no in-transit message. A characterization of these states and their interest are given, along with the principles of their det...
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The focus of this work is on a particular class of unstable global states: the states with no in-transit message. A characterization of these states and their interest are given, along with the principles of their detection. As detecting these states requires a network traversal, choosing a particular implementation of this traversal gives one instance from a family of algorithms. The algorithm based on a virtual Hamiltonian cycle (a ring traversal) is presented and proved to be correct. The exposition of the principles and of the ring algorithm is done in an analytic way: algorithmic techniques are given separately (markers, message counting, network traversal) to lay down the snapshot definition properties.< >
The authors address the problem of data distribution and communication synthesis in generating parallel programs targeted for massively paralleldistributed-memory machines. The source programs can be sequential, func...
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The authors address the problem of data distribution and communication synthesis in generating parallel programs targeted for massively paralleldistributed-memory machines. The source programs can be sequential, functional, or parallel programs based on a shared-memory model. The approach is to analyze source program references and match syntactic reference patterns with appropriate aggregate communication routines which can be implemented efficiently on the target machine. An explicit communication metric is used to guide optimizations to reduce communication overhead. The target code with explicit communication is proven to be free from deadlock introduced by the compilation process. The techniques described are developed within the context of Crystal (functional language) though they can be applied to Fortran. The Crystal compiler generates C-code for an iPSC/2.< >
based on the principle of maximizing the likelihood of proper classification of training samples, an algorithm is proposed to train the artificial neural pattern density estimator (paralleldistributedprocessing (PDP...
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based on the principle of maximizing the likelihood of proper classification of training samples, an algorithm is proposed to train the artificial neural pattern density estimator (paralleldistributedprocessing (PDP) network) introduced by the authors earlier (1990). The previous restrictions on unit functions were relaxed such that each unit in the network represented a joint density of independent Gaussian variables with equal variances while variances across densities did not have to be the same. The algorithm was tested with samples derived from known mixtures of memoryless Gaussian sources as well as exponential and Gamma densities. Both one- and two-dimensional cases were explored. The success of the network in estimating the probability density functions depended on how well they were represented by the training samples, the number of hidden units employed and how thoroughly the network was trained. The results of comparing the network's recognition rates against those of a Bayes classifier are presented.< >
An approach to modeling a network of processes based on dataflow principles is presented. A dataflow graph, which represents a process, is defined in terms of input and output links, which represent the ports for exte...
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An approach to modeling a network of processes based on dataflow principles is presented. A dataflow graph, which represents a process, is defined in terms of input and output links, which represent the ports for external communication, and actors, which represent the functionality. The flow of data on links makes it possible to define markings which in turn provide an abstraction for the state of the graph/process. Events in the graph that define transitions of markings are partially ordered. A formal algebra and a first-order proof system for graph compositions using these markings is also presented. The dataflow graph model of computation facilitates the representation of concurrency at any level of abstraction.< >
This paper presents the architectural design and RISC based implementation of a prototype supercomputer, namely the Orthogonal MultiProcessor (OMP). The OMP system is constructed with 16 Intel 1860 RISC microprocessor...
ISBN:
(纸本)9780897913690
This paper presents the architectural design and RISC based implementation of a prototype supercomputer, namely the Orthogonal MultiProcessor (OMP). The OMP system is constructed with 16 Intel 1860 RISC microprocessors and 256 parallel memory modules, which are 2-D interleaved and orthogonally accessed using custom-designed spanning buses. The architectural design has been validated by a CSIM-based multiprocessor simulator. The design choices are based on worst-case delay analysis and simulation validation. The current OMP prototype chooses a 2-dimensional memory architecture, mainly for image processing, computer vision, and neural network simulation applications. The 16-processor OMP prototype is targeted to achieve a peak performance of 400 RISC integer MIPS or a maximum of 640 Mflops. This paper presents the architectural design of the OMP prototype at system and PC board levels. We are presently entering the fabrication stage of all the PC boards. The system is expected to become operational in late 1991 and benchmarking results will be available in 1992. Only hardware design features are reported here. Software and simulation results are reported elsewhere.
An architecture that uses a multistage interconnection network (MIN), a snooping bus, and a distributed and associative cache directory is studied. A snooping bus connecting all the processors monitors the memory acce...
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An architecture that uses a multistage interconnection network (MIN), a snooping bus, and a distributed and associative cache directory is studied. A snooping bus connecting all the processors monitors the memory accesses and supports to provide a distributed and dynamic cache coherence control. The cache directory is distributed across all the processors as a small associative list. An analytical model of the architecture based on the mean-value-analysis algorithm is developed. The results are verified by simulations. It is observed that there is a linear relationship between the system power and number of processors even up to 64 processors.
We propose a network architecture which includes an improved pre-processing system cell arrangement, recognition algorithm and learning rule. A speech recognition system using the SC paralleldistributedprocessing ne...
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We propose a network architecture which includes an improved pre-processing system cell arrangement, recognition algorithm and learning rule. A speech recognition system using the SC paralleldistributedprocessingnetwork has been proposed. network construction and tuning procedure have been reported. The tracking method of the local peak pattern has been described. Post-processing system to recognize the input speech without use of any external matching system has been proposed. Recognition results using computer simulation are presented.
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