The proceedings contain 25 papers. The topics discussed include: FlightVGM: efficient video generation model inference with online sparsification and hybrid precision on fpgas;TreeLUT: an efficient alternative to deep...
ISBN:
(纸本)9798400713965
The proceedings contain 25 papers. The topics discussed include: FlightVGM: efficient video generation model inference with online sparsification and hybrid precision on fpgas;TreeLUT: an efficient alternative to deep neural networks for inference acceleration using gradient boosted decision trees;greater than the sum of its LUTs: scaling up LUT-based neural networks with AmigoLUT;wa-hls4ml and lui-gnn: a benchmark and GNN based surrogate model for hls4ml resource and latency estimation;InTRRA: inter-task resource-repurposing accelerator for efficient transformer inference on fpgas;DPUV4E: high-throughput DPU architecture design for CNN on versal ACAP;and performance analysis of GEMM workloads on the AMD versal platform.
The proceedings contains 24 papers from the acm/sigdainternationalsymposium on fieldprogrammablegatearrays - fpga 2004. The topics discussed include: exploration of pipelined fpga interconnect structures;evaluati...
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The proceedings contains 24 papers from the acm/sigdainternationalsymposium on fieldprogrammablegatearrays - fpga 2004. The topics discussed include: exploration of pipelined fpga interconnect structures;evaluation of low leakage design techniques for fieldprogrammablegatearrays;reducing leakage energy in fpgas using region constrained placement;an embedded true random number generator for fpgas;a synthesis oriented omniscient manual editor;nanowire-based sublithographic programmable logic arrays;and highly pipelined asynchronous fpgas.
The proceedings contains 25 papers from the 1998 acm/sigdainternationalsymposium on fieldprogrammablegatearrays (fpga). Topics discussed include: new fpga architectures;technology mapping for fpgas;multi-fpga sys...
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The proceedings contains 25 papers from the 1998 acm/sigdainternationalsymposium on fieldprogrammablegatearrays (fpga). Topics discussed include: new fpga architectures;technology mapping for fpgas;multi-fpga systems & other reprogrammable architectures;partitioning and floor planning for fpgas;fault detection and fault tolerance for fpgas;fast computer aided design (CAD) tools for fpgas;time multiplexed fpgas;fpgas with embedded memory;and programmable architectures with special features.
The proceedings contain 64 papers from the acm/sigda Thirteenth acminternationalsymposium on fieldprogrammablegatearrays - fpga 2005. The topics discussed include: the Stratix II logic and routing architecture;sk...
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The proceedings contain 64 papers from the acm/sigda Thirteenth acminternationalsymposium on fieldprogrammablegatearrays - fpga 2005. The topics discussed include: the Stratix II logic and routing architecture;skew-programmable clock design for fpga and skew-aware placement;sparse matrix-vector multiplication on fpgas;power modeling and architecture evaluation for fpga with novel circuits for VDD programmability;architecture adaptive routability-driven placement for fpgas;energy-efficient fpga interconnect architecture design;3D-Softchip: A novel 3D vertically integrated adaptive computing system;dynamic reconfiguration in fpga-based SoC designs;and rapid prototyping of a test harness for forward error correcting codes.
The proceedings contain 22 papers. The topics discussed include: embedded floating-point units in fpgas;measuring the gap between fpgas and ASICs;optimality study of logic synthesis for LUT-based fpgas;improvements to...
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ISBN:
(纸本)1595932925
The proceedings contain 22 papers. The topics discussed include: embedded floating-point units in fpgas;measuring the gap between fpgas and ASICs;optimality study of logic synthesis for LUT-based fpgas;improvements to technology mapping for LUT-based fpgas;improving performance and robustness of domain-specific CPLDs;design, implementation, and verification of active cache emulator (ACE);modeling and data-dependent performance of pattern-matching architectures;yield enhancements of design-specific fpgas;FGPA clock network architecture: flexibility vs. area and power;a reconfigurable hardware based embedded scheduler for buffered crossbar switches;and combining module selection and resource sharing for efficient fpga pipeline synthesis.
The proceedings contain 26 papers. The topics discussed include: are we alone? searching for ET with fpgas;tensor slices to the rescue: supercharging ML acceleration on fpgas;global is the new local: fpga architecture...
ISBN:
(纸本)9781450382182
The proceedings contain 26 papers. The topics discussed include: are we alone? searching for ET with fpgas;tensor slices to the rescue: supercharging ML acceleration on fpgas;global is the new local: fpga architecture at 5nm and beyond;Stratix 10 NX architecture and applications;ThunderGP: HLS-based graph processing framework on fpgas;AutoBridge: coupling coarse-grained floorplanning and pipelining for high-frequency HLS design on multi-die fpgas;AutoSA: a polyhedral compiler for high-performance systolic arrays on fpga;demystifying the memory system of modern datacenter fpgas for software programmers through microbenchmarking;PRGA: an open-source fpga research and prototyping framework;and PRGA: An open-source fpga research and prototyping framework.
The proceedings contain 24 papers. The topics discussed include: designing with extreme parallelism;high-quality, deterministic parallel placement for fpgas on commodity hardware;enforcing long-path timing closure for...
ISBN:
(纸本)9781595939340
The proceedings contain 24 papers. The topics discussed include: designing with extreme parallelism;high-quality, deterministic parallel placement for fpgas on commodity hardware;enforcing long-path timing closure for fpga routing with path searches on clamped lexicographic spirals;mapping for better than worst-case delays in LUT-based fpga designs;a complexity-effective architecture for accelerating full-system multiprocessor simulations using fpgas;efficient ASIP design for configurable processors with fine-grained resource sharing;pattern-based behavior synthesis for fpga resource reduction;modeling routing demand for early-stage fpga architecture development;and trace-based framework for concurrent development of process and fpga architecture considering process variation and reliability.
The proceedings contain 18 papers. The topics discussed include: multi-input serial adders for fpga-like computational fabric;logic scaling options for the next 10 years: from FinFet to CFET, from dual damascene to se...
ISBN:
(纸本)9781450391498
The proceedings contain 18 papers. The topics discussed include: multi-input serial adders for fpga-like computational fabric;logic scaling options for the next 10 years: from FinFet to CFET, from dual damascene to semi damascene;a high throughput multi-bit-width 3D systolic accelerator for NAS optimized deep neural networks on fpga;automated accelerator optimization aided by graph neural networks;hardware acceleration of nonparametric belief propagation for efficient robot manipulation;HMT: a hardware-centric hybrid bonsai Merkle tree algorithm for high-performance authentication;synthesized garbage collection for fpga accelerators;and SEXTANS: a streaming accelerator for general-purpose sparse-matrix dense-matrix multiplication.
The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point fpgas;softwa...
ISBN:
(纸本)9781450333153
The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point fpgas;software-driven hardware development;InTime: a machine learning approach for efficient selection of fpga CAD tool parameters;enhancing hardware design flows with MyHDL;rapid prototyping of wireless physical layer modules using flexible software/hardware design flow;application of specific delay window routing for timing optimization in fpga designs;application of specific delay window routing for timing optimization in fpga designs;fine-grained interconnect synthesis;delay-bounded routing for shadow registers;EURECA: on-chip configuration generation for effective dynamic data access;energy-efficient discrete signal processing with fieldprogrammable analog arrays (FPAAs);expanding OpenFlow capabilities with virtualized reconfigurable hardware.
The proceedings contain 32 papers. The topics discussed include: hyperpipelining of high-speed interface logic;agile co-design for a reconfigurable datacenter;throughput-optimized OpenCL-based fpga accelerator for lar...
ISBN:
(纸本)9781450338561
The proceedings contain 32 papers. The topics discussed include: hyperpipelining of high-speed interface logic;agile co-design for a reconfigurable datacenter;throughput-optimized OpenCL-based fpga accelerator for large-scale convolutional neural networks;going deeper with embedded fpga platform for convolutional neural network;using stochastic computing to reduce the hardware requirements for a restricted Boltzmann machine classifier;a platform-oblivious approach for heterogeneous computing: a case study with Monte Carlo-based simulation for medical applications;physical design of 3D fpgas embedded with micro-channel-based fluidic cooling;Boolean satisfiability-based routing and its application to Xilinx ultrascale clock network;and pitfalls and tradeoffs in simultaneous, on-chip fpga delay measurement.
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