The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point fpgas;softwa...
ISBN:
(纸本)9781450333153
The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point fpgas;software-driven hardware development;InTime: a machine learning approach for efficient selection of fpga CAD tool parameters;enhancing hardware design flows with MyHDL;rapid prototyping of wireless physical layer modules using flexible software/hardware design flow;application of specific delay window routing for timing optimization in fpga designs;application of specific delay window routing for timing optimization in fpga designs;fine-grained interconnect synthesis;delay-bounded routing for shadow registers;EURECA: on-chip configuration generation for effective dynamic data access;energy-efficient discrete signal processing with fieldprogrammable analog arrays (FPAAs);expanding OpenFlow capabilities with virtualized reconfigurable hardware.
The proceedings contain 35 papers. The topics discussed include: visual system integrator;build your own domain-specific solutions with RapidWright;reconfigurable convolutional kernels for neural networks on fpgas;eff...
ISBN:
(纸本)9781450361378
The proceedings contain 35 papers. The topics discussed include: visual system integrator;build your own domain-specific solutions with RapidWright;reconfigurable convolutional kernels for neural networks on fpgas;efficient and effective sparse LSTM on fpga with bank-balanced sparsity;math doesn't have to be hard: logic block architectures to enhance low-precision multiply-accumulate on fpgas;on-chip fpga debug instrumentation for machine learning applications;scheduling data in neural network applications;fault testing a synthesizable embedded processor at gate level using ultrascale fpga emulation;a deep-reinforcement-learning-based scheduler for high-level synthesis;accelerating 3D CNN-based lung nodule segmentation on a multi-fpga system;SparseBNN: joint algorithm/hardware optimization to exploit structured sparsity in binary neural network;a deep learning inference accelerator based on model compression on fpga;and sparse winograd convolutional neural networks on small-scale systolic arrays.
The proceedings contain 36 papers. The topics discussed include: speedy fpga-based packet classifiers with low on-chip memory requirements;a real-time stereo vision system using a tree-structured dynamic programming o...
ISBN:
(纸本)9781450311557
The proceedings contain 36 papers. The topics discussed include: speedy fpga-based packet classifiers with low on-chip memory requirements;a real-time stereo vision system using a tree-structured dynamic programming on fpga;incremental clustering applied to radar deinterleaving: a parameterized fpga implementation;communication visualization for bottleneck detection of high-level synthesis applications;a mixed precision Monte Carlo methodology for reconfigurable accelerator systems;saturating the transceiver bandwidth: switch fabric design on fpgas;saturating the transceiver bandwidth: switch fabric design on fpgas;limit study of energy & delay benefits of component-specific routing;impact of fpga architecture on resource sharing in high-level synthesis;and securing netlist-level fpga design through exploiting process variation and degradation.
The proceedings contain 23 papers. The topics discussed include: eliminating excessive dynamism of dataflow circuits using model checking;straight to the queue: fast load-store queue allocation in dataflow circuits;OM...
ISBN:
(纸本)9781450394178
The proceedings contain 23 papers. The topics discussed include: eliminating excessive dynamism of dataflow circuits using model checking;straight to the queue: fast load-store queue allocation in dataflow circuits;OMT: a demand-adaptive, hardware-targeted Bonsai Merkle tree framework for embedded heterogeneous memory platform;fault detection on multi COTS fpga systems for physics experiments on the international space station;Nimblock: scheduling for fine-grained fpga sharing through virtualization;weave: abstraction for accelerator integration of generated modules;a novel fpga simulator accelerating reinforcement learning-based design of power converters;and power side-channel countermeasures for ARX ciphers using high-level synthesis.
The proceedings contain 34 papers. The topics discussed include: fpga prototyping of an AMBA-based Windows-compatible SoC;predicting the performance of application-specific NoCs implemented on fpgas;energy efficient s...
ISBN:
(纸本)9781605589114
The proceedings contain 34 papers. The topics discussed include: fpga prototyping of an AMBA-based Windows-compatible SoC;predicting the performance of application-specific NoCs implemented on fpgas;energy efficient sensor node implementations;high throughput and large capacity pipelined dynamic search tree on fpga;FPMR: MapReduce framework on fpga: a case study of RankBoost acceleration;Axel: a heterogeneous cluster with fpgas and GPUs;building a faster Boolean matcher using bloom filter;scalable network virtualization using fpgas;maximizing area-constrained partial fault tolerance in reconfigurable logic;fpga based chip emulation system for test development and verification of analog and mixed signal circuits;a semi-automatic Toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning;and a dependency graph based methodology for parallelizing HLL applications on fpga.
The proceedings contain 33 papers. The topics discussed include: flexible communication avoiding matrix multiplication on fpga with high-level synthesis;maximizing the serviceability of partially reconfigurable fpga s...
ISBN:
(纸本)9781450370998
The proceedings contain 33 papers. The topics discussed include: flexible communication avoiding matrix multiplication on fpga with high-level synthesis;maximizing the serviceability of partially reconfigurable fpga systems in multi-tenant environment;fingerprinting cloud fpga infrastructures;massively simulating adiabatic bifurcations with fpga to solve combinatorial optimization;high-performance fpga network switch architecture;using OPENCL to enable software-like development of an fpga-accelerated biophotonic cancer treatment simulator;energy-efficient 360-degree video rendering on fpga via algorithm-architecture co-design;real-time spatial 3D audio synthesis on fpgaS for blind sailing;when massive GPU parallelism ain't enough: a novel hardware architecture of 2D-LSTM neural network;and light-OPU: an fpga-based overlay processor for lightweight convolutional neural networks.
The proceedings contain 34 papers. The topics discussed include: emerging application domains - research challenges and opportunities for fpgas;towards automated ECOs in fpgas;clock power reduction for Virtex-5 fpgas;...
ISBN:
(纸本)9781605584102
The proceedings contain 34 papers. The topics discussed include: emerging application domains - research challenges and opportunities for fpgas;towards automated ECOs in fpgas;clock power reduction for Virtex-5 fpgas;choose-your-own-adventure routing: lightweight load-time defect avoidance;towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm fpgas;a comparison of via-programmablegate array logic cell circuits;a comparison of CPUs, GPUs, fpgas, and massively parallel processor arrays for random number generation;a high-performance fpga architecture for restricted Boltzmann machines;fpga-based front-end electronics for positron emission tomography;fpga-based face detection system using Haar classifiers;a 17ps time-to-digital converter implemented in 65nm fpga technology;and fpga technology mapping with encoded libraries and staged priority cuts.
The proceedings contain 32 papers. The topics discussed include: the role of fpgas in deep learning;accelerating binarized convolutional neural networks with software-programmablefpgas;improving the performance of Op...
ISBN:
(纸本)9781450343541
The proceedings contain 32 papers. The topics discussed include: the role of fpgas in deep learning;accelerating binarized convolutional neural networks with software-programmablefpgas;improving the performance of OpenCL-based fpga accelerator for convolutional neural network;frequency domain acceleration of convolutional neural networks on CPU-fpga shared memory system;FINN: a framework for fast, scalable binarized neural network inference;quality-time tradeoffs in component-specific mapping: how to train your dynamically reconfigurable array of gates with outrageous network-delays;synchronization constraints for interconnect synthesis;automatic construction of program-optimized fpga memory networks;a parallelized iterative improvement approach to area optimization for LUT-based technology mapping;a new approach to automatic memory banking using trace-based address mining;dynamic hazard resolution for pipelining irregular loops in high-level synthesis;and secure function evaluation using an fpga overlay architecture.
The proceedings contain 30 papers. The topics discussed include: fast and effective placement and routing directed high-level synthesis for fpgas;optimizing effective interconnect capacitance for fpga power reduction;...
ISBN:
(纸本)9781450326711
The proceedings contain 30 papers. The topics discussed include: fast and effective placement and routing directed high-level synthesis for fpgas;optimizing effective interconnect capacitance for fpga power reduction;towards interconnect-adaptive packing for fpgas;modular multi-ported SRAM-based memories;scalable multi-access flash store for big data analytics;cad and routing architecture for interposer-based multi-fpga systems;memory block based scan-BIST architecture for application-dependent fpga testing;fpga-based biophysically-meaningful modeling of olivocerebellar neurons;square-rich fixed point polynomial evaluation on fpgaS;a power side-channel-based digital to analog converter for Xilinx fpgas;MORP: MakeSpan optimization for processors with an embedded reconfigurable fabric;a scalable sparse matrix-vector multiplication kernel for energy-efficient sparse-BLAs on fpgas;and Wordwidth, instructions, looping, and virtualization: the role of sharing in absolute energy minimization.
The proceedings contain 23 papers. The topics discuss include: CompressedLUT: an open-source tool for lossless compression of lookup tables for function evaluation and beyond;MiCache: an MSHR-inclusive non-blocking ca...
ISBN:
(纸本)9798400704185
The proceedings contain 23 papers. The topics discuss include: CompressedLUT: an open-source tool for lossless compression of lookup tables for function evaluation and beyond;MiCache: an MSHR-inclusive non-blocking cache design for fpgas;Hardcaml MSM: a high-performance split CPU-fpga multi-scalar multiplication engine;DynaRapid: from C to fpga in a few seconds;design and implementation of a primary visual cortex pathway model based on opponent-process theory;Hardcaml: an OCaml hardware domain-specific language for efficient and robust design;XUNI: virtual machine abstraction for self-contained and multi-tenant cloud fpgas;ISO-TENANT: rethinking fpga power distribution network (PDN): a hardware based solution for remote power side channel attacks in fpga;and accelerating autonomous path planning on fpgas with sparsity-aware HW/SW co-optimizations.
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