Current synchronization engines are mainly designed to reconcile data repositories between multiple clients and a central server on a star-like topology. A different approach is needed to achieve synchronization on pe...
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ISBN:
(纸本)9780889866379
Current synchronization engines are mainly designed to reconcile data repositories between multiple clients and a central server on a star-like topology. A different approach is needed to achieve synchronization on peer-to-peer topologies where any node can be both client and server and updates may happen independently. Version vectors are one solution to the problem, ensuring global convergence of the datasets and providing straightforward conflict detection, while letting applications to control the conflict resolution semantics in their specific domain. In this paper an implementation of a synchronization engine for contact data in mobile devices using version vectors is presented. The engine is capable of optimistically synchronizing databases among many nodes in a peer-to-peer fashion.
Overlay multicast protocol constructs a virtual mesh spanning all member nodes of a multicast group and employs standard unicast routing to fulfill multicast functionality on application layer. The advantages of this ...
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ISBN:
(纸本)9780889866386
Overlay multicast protocol constructs a virtual mesh spanning all member nodes of a multicast group and employs standard unicast routing to fulfill multicast functionality on application layer. The advantages of this approach are simplicity and flexibility. However, efficiency and stability are the issues that must be addressed as the size of the multicast group grows in the mobile ad hoc networks (MANETs). In this paper, we propose an effective structure for overlay multicast to solve these problems in MANETs. Instead of using a spanning tree on the virtual mesh, we adopt a simple structure called MCore for multicast. An MCore is a path that minimizes the sum of the distances of all vertices to the path plus the length of the path. The MCore is more stable and easier to maintain than the spanning tree in MANETs. The simulation results show that our approach handles the flexibility and mobility issues in overlay multicast protocols effectively for large multicast group size.
The proceedings contains 85 papers from the Fifteenth iasted international conference on parallel and distributed computing and systems: Volume I. The topics discussed include: divisible load scheduling for grid compu...
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ISBN:
(纸本)088986392X
The proceedings contains 85 papers from the Fifteenth iasted international conference on parallel and distributed computing and systems: Volume I. The topics discussed include: divisible load scheduling for grid computing;comparison of centralized and decentralized service discovery in a grid environment;reliable multicast protocols for Java-based grid middleware platforms;self-correcting broadcast in distributed hash tables;adaptive file-grain distribution in a cluster file system;and a request-based self-stabilizing token passing.
In this paper, we consider flows requiring quantitative end-to-end QoS guarantees. We focus more particularly on the end-to-end response times of flows and their probability of meeting their end-to-end deadlines. We a...
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ISBN:
(纸本)9780889866379
In this paper, we consider flows requiring quantitative end-to-end QoS guarantees. We focus more particularly on the end-to-end response times of flows and their probability of meeting their end-to-end deadlines. We assume that packets are scheduled according to their fixed priority, reflecting the importance degree of the flow. If on a node two packets have the same fixed priority, the packet with the smallest relative deadline on the node considered is scheduled first. Therefore, this non-preemptive scheduling, called FP/DM, takes into account the deadline constraint. The deterministic approach, based on a worst case analysis, may lead to a bound on the flow end-to-end response times that can be reached infrequently. A network dimensioning based on this bound can be expensive in terms of resources. That is why we are interested in probabilistic QoS guarantees. We then evaluate the benefits brought by FP/DM with regard to FP/FIFO. With the deterministic approach, we compare the worst case response times and the laxities of the flows considered. With the probabilistic approach, we compare the probabilities of meeting the deadlines for the flows considered as well as the p-schedulabibility of the flow set.
In this paper, we present usages of XML-RPC and the effectiveness in a mobile agent framework named Maglog which is implemented in a Java environment. XML-RPC is used for the following two purposes in Maglog. First, i...
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ISBN:
(纸本)9780889866386
In this paper, we present usages of XML-RPC and the effectiveness in a mobile agent framework named Maglog which is implemented in a Java environment. XML-RPC is used for the following two purposes in Maglog. First, it is a transport mechanism that an agent migrates from one computer to another one. Second, it is an interface which is accessible from applications, written in any other language, which support for XML-RPC. In order to realize an agent migration mechanism, custom serialization mechanism is implemented to customize Java's built-in serialization mechanism. In custom serialization mechanism, objects which represent for an agent are encoded as an XML document. Encoded objects are transferred using XMLRPC. For deserialization, a dynamic class loader is implemented. If no custom serialization is used, an object cannot be deserialized on a remote host, because the class description of the object may not be in the host. As an example of an interface which is accessible from applications, we show a user interface program of a distributed e-Leaming system which we have developed.
We present an architecture using a dynamical deterministic unit ring decomposition to improve the balancing quality of an heterogeneous dynamic hashing scheme. This new approach, denoted by DhHHT, is capable to distri...
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ISBN:
(纸本)9780889868113
We present an architecture using a dynamical deterministic unit ring decomposition to improve the balancing quality of an heterogeneous dynamic hashing scheme. This new approach, denoted by DhHHT, is capable to distribute any subsetD' ⊆ D of uniformitems balanced among a dynamical node set V . Further, the capacity of a node, labeled as c(v)min v ∈ V , is allowed to change during runtime and causes no overhead. The challenge in this area is to assign to each v ∈ V approximately |D'| . c(v)/Σu∈V c(u) items, even if nodes are added or removed from V , where |D| denotes the cardinality of D. We will show that DhHHT reaches this without global knowledge about V nor by capacity normalization. Further, DhHHT has an improved model complexity of O(|V |), which is reduced by O(log n) compared to previous approaches. Its special design purpose is to manage limited resources with persistent allocation requests, where even slightly constant balancing iations are intolerable. We also present an uniform dynamical deterministic hash range decomposition, used to place nodes in the hash range, which provides a constant upper and lower iation of 1.118 = s = 1.809. The decomposition is embedded within the DhHHT architecture.
We consider the network design optimization for the Exascale class supercomputers by altering the widely analyzed and implemented torus networks. Our alteration scheme involves interlacing the torus networks with bypa...
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We consider the network design optimization for the Exascale class supercomputers by altering the widely analyzed and implemented torus networks. Our alteration scheme involves interlacing the torus networks with bypass links of lengths 6 hops, 9 hops, 12 hops, and mixed 6 and 12 hops. These bypass links are optimal resulting from exhaustive search of massive possibilities. Our case study is constructed by strategically coupling 288 racks of 6 × 6 × 36 nodes to a full system with 72 × 72 × 72 nodes. The peak performance of such a system is 0.56 Exa-flops when CPU-GPU complexes are adopted as a node module capable of 1.5 Tflops. Our design optimizes, simultaneously, the system performance, performancecost ratio, and power efficiency. The network diameter and the average node-to-node network distance, regarded as the performance metrics, got reduced, from the original 3D torus network, by 83.3% and 80.4%, respectively. Similarly, the performance-cost ratio and power efficiency are also increased 1.43 and 4.44 times, respectively.
In this paper, we use an object recognition application as a case study to illustrate our parallelization Methodology, for architecture, design and development. Our goal was to identify a methodology with a streamline...
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ISBN:
(纸本)9780889868786
In this paper, we use an object recognition application as a case study to illustrate our parallelization Methodology, for architecture, design and development. Our goal was to identify a methodology with a streamlined process for problem analysis, design and development, and use this design methodology in developing a high quality parallel object recognition application, with an efficient and scalable implementation. Our parallelization methodology consists of application design, concurrency analysis, implementation, debugging and testing, and performance tuning phases. In this paper, we focus on the application design, concurrency analysis and implementation phases of the parallelization methodology, to illustrate selection and use of parallel design patterns, during design and implementation phases. In the concurrency analysis phase, we identified key application computations, and performed application decomposition and dependency analysis. During application design, appropriate parallel design patterns were mapped to the problem for efficient parallelization of computations. We illustrate how parallel design patterns were used to guide algorithmic choices during application design, and how design patterns were used in exploring the design space for an efficient implementation, while satisfying the constraints and requirements of the object recognition problem. Applications in the area of object recognition tend to have similar computational flows with variations in input size. A design pattern based approach to parallel software architecture provided us with a common vocabulary for design and development, and helped in meeting the requirements and constraints of the original problem. We found that using our parallelization methodology resulted in a streamlined process for project planning and execution. In this paper, we step through the application design process using parallel design patterns. We review related work in the area of object recognition, and provi
Global predicate detection is a fundamental problem in distributedcomputing in the areas of distributed debugging and software fault-tolerance. It requires searching the global state lattice of a computation to deter...
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ISBN:
(纸本)088986392X
Global predicate detection is a fundamental problem in distributedcomputing in the areas of distributed debugging and software fault-tolerance. It requires searching the global state lattice of a computation to determine if any consistent global state satisfies the given predicate. We give an efficient algorithm that perform the lex traversal of the lattice. We also give a space efficient algorithm for the breadth-first-search (BFS) traversal.
An Explicit Data Organization (EDO-SIMD) instruction set architecture (ISA) is proposed in this paper to reduce the data organization overhead of SIMD (Single Instruction Multiple Data) for media processors. It explic...
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ISBN:
(纸本)9780889866379
An Explicit Data Organization (EDO-SIMD) instruction set architecture (ISA) is proposed in this paper to reduce the data organization overhead of SIMD (Single Instruction Multiple Data) for media processors. It explicitly describes the data organization information in instruction words and merges the data organization with computation and store operation. An implementation of EDO-SIMD ISA based on a baseline SIMD processor is described and cycle accurate simulator for evaluation is designed. Simulation results show that, relative to the baseline SIMD architecture, EDO-SIMD ISA can achieve 1.34 to 1.40 speedups for the benchmark of real time H.264/AVC decoder and reduce 17.7% of the code size with only 0.49% increase in hardware area.
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