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检索条件"任意字段=IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2010"

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MSOMS: A meta simulation Framework for Optimizing Multidomain Simulation

MSOMS: A meta simulation Framework for Optimizing Multidomai...

引用

18th iasted international conference on parallel and distributed computing and systems

作者： Khan, Moinul H. Georgia Inst Technol Austin TX 78739 USA

ISBN: (纸本)9780889866386

Complex system design and analysis requires simulations with different views or domains. Multi-domain simulation models typically are a collection of simulation model integrated through various means. These concurrent models may be implemented to be closely integrated or distributed as parallel-distributed simulation or mix of the two. Performance of a coupled simulation between multiple domain models depends on various factors. Some of them are, integration backplane architecture, messaging schemes, sharing scheme, level of coupling, fidelity of domain models etc. Framework for Optimizing Multidomain Simulation (MSOMS) is a framework which can be used to estimate performance and effectiveness of integration methods under various scenarios. The framework is referred as meta-simulation, since it is a "simulation of a simulation". This paper captures formulation and demonstration of MSOMS. We compared two possible implementations of a multi-domain model using MSOMS as a case study.

关键词： multidomain modeling HLA distributed simulation

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A distributed peer-to-peer grid scheduler

A distributed peer-to-peer grid scheduler

引用

18th iasted international conference on parallel and distributed computing and systems

作者： Liu, Cong Baskiyar, Sanjeev Wang, Chengjun Auburn Univ Auburn AL 36849 USA

ISBN: (纸本)9780889866386

In a grid computing environment, dynamicity, and geographically distributed sites, make task scheduling problems challenging to solve. It is hard for a local site to obtain precise real-time information about other sites given that specific information on a site such as load and computing resources may change rapidly. Moreover, in data grid environment, large scale data intensive applications make scheduling problems even more challenging since both computational and data storage resources must be taken into consideration. In this paper we propose an innovative peer-to-peer scheduler to solve these problems. This scheduler is distributed and scalable. We used simulation to evaluate the performance of the scheduler under different circumstances, such as different number of hops to search suitable sites and different number of incoming tasks. Results show that our scheduler can successfully schedule around 75% of incoming tasks within their deadlines in average. For computation-intensive tasks, it can successfully schedule more than 90% of incoming tasks.

关键词： data grid peer-to-peer scheduler distributed scheduling

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A programmable instruction decoder for heterogeneous multiprocessor architectures

A programmable instruction decoder for heterogeneous multipr...

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18th iasted international conference on parallel and distributed computing and systems

作者： Jung, Yong-Kyu Texas A&M Univ College Stn TX USA

ISBN: (纸本)9780889866386

A hardware/software co-reconfiguration technique is introduced to design a programmable instruction decoder for heterogeneous multiprocessor systems that do not employ programmable gate-array. This technique includes an off-chip static reconfiguration of heterogeneous multiple target instruction sets, followed by an on-chip dynamic reconfiguration of binary source instructions. This co-reconfiguration technique does not require modifying existing compilers to retarget their new processors, nor does the technique oblige redesign of the processors to add new and/or extended instructions. This technique allows software developers to swiftly and accurately retarget their heterogeneous multiprocessor systems. In order to present the reconfiguration procedures and performance evaluations of the technique, a smart instruction decoder for Texas Instruments' TMS320C55 digital signal processors and ARM's ARM11 embedded processors was implemented and optimized.

关键词： heterogeneous computing reconfigurable computing extensible processors digital signal processors smart instruction decoder

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RHT: Supporting range queries in DHT-based P2P systems

RHT: Supporting range queries in DHT-based P2P systems

引用

18th iasted international conference on parallel and distributed computing and systems

作者： Liu, Lintao Ryu, Kyung Dong Arizona State Univ Dept Comp Sci & Engn Tempe AZ 85287 USA IBM Corp TJ Watson Res Ctr Hawthorne NY 10532 USA

ISBN: (纸本)9780889866386

An efficient range query processing support is required for distributed Hash Table (DHT)-based P2P networks as consistent hashing destroys the inherent order of numeric keys. In this paper, we present a lightweight and efficient mechanism, called Range Hash Tree (RHT), to support range queries on DHTs. In RHT, key space is partitioned into small ranges such that data items within one range can be stored on one node. To quickly resolve a range query, we introduce a scalable encoding algorithm that can represent the key space partitioning status with a small RHT Signature. Compared to other approaches, RHT provides a bounded query delay, which is independent of the size of range query and the number of matching data items. Our experiments show that RHT works efficiently on both uniform and much skewed data distributions.

关键词： range queries distributed Hash Table signature Peer-to-Peer distributed computing

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Efficient support of fine-grained futures in Java

Efficient support of fine-grained futures in Java

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18th iasted international conference on parallel and distributed computing and systems

作者： Zhang, Lingli Krintz, Chandra Soman, Sunil Univ Calif Santa Barbara Dept Comp Sci Santa Barbara CA 93106 USA

ISBN: (纸本)9780889866386

A future is a parallel programming language construct that enables programmers to specify potentially asynchronous computations. We present and empirically evaluate a novel implementation of futures for Java. Our futures implementation is a JVM extension that couples estimates of future computational granularity with underlying resource availability to enable automatic and adaptive decisions of when to spawn futures in parallel or to execute them sequentially. Our system builds from, combines. and extends (i) lazy task creation and (ii) a JVM sampling infrastructure previously used solely for dynamic and adaptive compilation. We empirically evaluate our system using different benchmarks, triggers for automatic spawning of futures, processor availability, and JVM configurations. We show that our future implementation for Java is efficient and scalable for fine-grained Java futures without requiring programmer intervention.

关键词： Java futures fine-grained parallel programming task scheduling profile-guided

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parallelization of multimedia applications on the multi-level computing architecture

Parallelization of multimedia applications on the multi-leve...

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18th iasted international conference on parallel and distributed computing and systems

作者： Aydonat, Utku Abdelrahman, Tarek S. Univ Toronto Dept Elect & Comp Engn 100 Coll St Toronto ON Canada

ISBN: (纸本)9780889866386

The Multi-Level computing Architecture (MLCA) is a novel parallel System-on-a-Chip architecture targeted for multimedia applications. It features a top level controller that automatically extracts task level parallelism using techniques similar to how instruction level parallelism is extracted by superscalar processors. This allows the MLCA to support a simple programming model that is similar to sequential programming. In order to assist programmers to easily and efficiently port multimedia applications to the MLCA programming model, a compilation environment is designed. This compilation environment enhances parallelism in MLCA programs by applying three simple code transformations that are based on known compiler optimizations. In this paper, we describe the MLCA architecture, its programming model, its compilation environment and an evaluation of its performance. Our experimental evaluation with three real multimedia applications and an MLCA simulator shows that the MLCA is a viable architecture and scaling speedups can be obtained using the compilation environment with little programmer effort.

关键词： parallel-embedded systems compiler optimizations privatization parallelism enhancement

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FastPara: a high-level declarative data-parallel programming framework on clusters

FastPara: a high-level declarative data-parallel programming...

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18th iasted international conference on parallel and distributed computing and systems

作者： Mao, Yong Gu, Yunhong Chen, Jia Grossman, Robert L. Univ Illinois Lab Adv Comp 322 SEOM-C 249851S Morgan Chicago IL 60607 USA

ISBN: (纸本)9780889866386

This paper presents FastPara, a C++ programming framework and associated runtime support for writing and running data-parallel applications in computer cluster environments. With FastPara, the user writes a declaration of the data to be exchanged between processes for a certain data-parallel processing algorithm. FastPara will handle all the process communications without any users' efforts. Complex data structures and variable-length arrays are well supported so that users can easily apply this framework to their data-parallel applications. FastPara's runtime provides built-in support for process management and fault tolerance for the parallel processing. FastPara can greatly simplify the development cycle. Based on the performance tests we did, FastPara demonstrated good communication efficiency and little process coordination overhead. We believe that FastPara is a very useful framework in developing data-parallel applications.

关键词： parallel-programming framework data-parallel cluster

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Memory utilization analysis of Java middleware for distributed real-time and embedded systems

Memory utilization analysis of Java middleware for distribut...

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18th iasted international conference on parallel and distributed computing and systems

作者： Qu, Runtao Hirano, Satoshi Ohkawa, Takeshi AIST Natl Inst Adv Ind Sci & Technol Informat Technol Res Inst AIST Tsukuba Cent 2 Tsukuba Ibaraki 3058568 Japan

ISBN: (纸本)9780889866386

distributed object-oriented middleware technologies have been adopted for ubiquitous communicating real-time and embedded systems. Although Java plays an important role in building distributed object-oriented middleware because of its portability and productivity, it is not popularto real-time system developers because it is slow and hard to keep real-timeness due to garbage collection. This paper presents a novel memory classification and measurement approach for modem programming language such as Java to analyze the memory utilization of middleware technologies in order to improve them for embedded systems using limited computing resource. We classified Java memory into four categories such as static, quasi-static, quasi-dynamic and dynamic, and show how to measure the size of each memory. Intensive case studies using popular Java middleware technologies such as Web Services, CORBA, RMI and HORB revealed that reducing the use of dynamic memory has contributed far more to the efficiency and performance than reducing the use of quasi-static and quasi-dynamic memory.

关键词： memory analysis Java middleware distributed system

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Dynamic evolution in a survivable application infrastructure

Dynamic evolution in a survivable application infrastructure

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18th iasted international conference on parallel and distributed computing and systems

作者： Thorvaldsson, Haraldur D. Goldman, Kenneth J. Washington Univ Dept Comp Sci & Engn St Louis MO 63130 USA

ISBN: (纸本)9780889866386

We describe a highly scalable algorithm for secure system evolution in an infrastructure for widely distributed Byzantine fault-tolerant applications. To maintain high availability, the system and its applications evolve on-line, providing uninterrupted service during installation of upgrades. Installations are made to appear atomic with respect to other installations and application execution steps. Our algorithm guarantees safe installation despite Byzantine faulty replicas and replica groups. An initial phase prepares replica groups for an upgrade, while a second phase triggers the installation of the upgrade by gossip among groups. A simple but novel scheme using secret sharing and Byzantine quorums prevents faulty replicas and replica groups from disrupting or maliciously exploiting installations. Installation message complexity and computational complexity grow linearly with the number of replicas.

关键词： fault tolerant systems dynamic evolution configurable distributed systems Byzantine fault tolerance

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INTESER: An integrated solution to provide QoS, traffic engineering and fault tolerance in an MPLS network

INTESER: An integrated solution to provide QoS, traffic engi...

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18th iasted international conference on parallel and distributed computing and systems

作者： Che, Hao Gupta, Manoj Velayutham, Sundar Lagoa, Constantino Wang, Zhijun Univ Texas Arlington Comp Sci & Engn Arlington TX 76019 USA Penn State Univ Elect Engn State Coll PA USA Hong Kong Polytech Univ Comp Sci Hong Kong Hong Kong Peoples R China

ISBN: (纸本)9780889866386

In this paper, we put forward an integrated solution to provide service quality features in an MPLS network, called Integrated, QoS-based Traffic Engineering with Service Restoration (INTESER). INTESER employs a distributed multipath forwarding paradigm in an MPLS domain to enable optimal, QoS-aware traffic engineering and service restoration through static call admission control, and dynamic load balancing and rate adaptation at the domain edge. The core nodes can be QoS agnostic and use a single FIFO queue at each output port. Preliminary simulation results demonstrate the promising prospective of the proposed solution as a simpler and more scalable alternative to the existing solutions.

关键词： MPLS quality of service traffic engineering service restoration distributed control resource provisioning

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