the proceedings contain 656 papers. the topics discussed include: CMOSFET scaling through the end of the roadmap;critical technology issues for deca-nanometer MOSFETs;a review of the SOI four-gate transistor;planar an...
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ISBN:
(纸本)1424401615
the proceedings contain 656 papers. the topics discussed include: CMOSFET scaling through the end of the roadmap;critical technology issues for deca-nanometer MOSFETs;a review of the SOI four-gate transistor;planar and multiple-gate transistors with silicon-carbon source/drain;novel MOSFET devices for RF circuits;CMOS devices architectures for the end of the roadmap and beyond;manufacturing considerations of lithography independent nano-MOS-transistors in the sub-25 nm-region;temperature impact on the Lorentzian noise induced by electron valence band tunneling in partially depleted SOI nMOSFETs;an investigations of the effects of Si thickness-induced variation of the electrical characteristics in FDSOI with block oxide;impact of improved mobility and low flicker noise MOS transistors using accumulation mode fully depleted silicon-on-insulator devices;and characterization of the self-aligned pseudo-SOI devices structures.
the following topics are dealt with: advanced CMOS devices; mobility enhancement; Si devices and device physics; advanced interconnect technology; gate stack technology; process technology; integratedcircuit manufact...
the following topics are dealt with: advanced CMOS devices; mobility enhancement; Si devices and device physics; advanced interconnect technology; gate stack technology; process technology; integratedcircuit manufacturing; MEMS; memory; compound semiconductors; ferroelectric materials; semiconductor materials; quantum structures; nanoelectronics; device modeling; process modeling; CMOS integratedcircuits; HF/RF design; low power design; analog circuits; mixed-signal circuits; ultra-wideband transmitter; RF system integration; integratedcircuit design and verification; packaging and testing; characterization
this paper presents a CMOS UWB（Ultra Wide Band） pulse generator based on Binary Pulse Amplitude Modulation with Time-hopping（th-BPAM）.the basic structure of the circuit involves a Time-hopping circuit and a pulse ...
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ISBN:
(纸本)1424401607
this paper presents a CMOS UWB（Ultra Wide Band） pulse generator based on Binary Pulse Amplitude Modulation with Time-hopping（th-BPAM）.the basic structure of the circuit involves a Time-hopping circuit and a pulse *** 1 derivative of the Gaussian pulse is generated by the circuit in the th-BPAM mode, of which the width is 700ps and is *** circuit has been simulated by HSPICE with 0.18um CMOS process and the simulation results are presented in this paper.
In this study,a monolithic optoelectronic integratedcircuit(OEIC),in which a photodiode detector and a bipolar integratedcircuit for reception and amplification are integrated on the same silicon substrate,is descri...
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ISBN:
(纸本)1424401607
In this study,a monolithic optoelectronic integratedcircuit(OEIC),in which a photodiode detector and a bipolar integratedcircuit for reception and amplification are integrated on the same silicon substrate,is described. Withthe new process technology,the layout of optical and electronic devices is designed,and the processes of optical and electronic devices are *** a good way of developing high performance,high reliability,cost effective optoelectronic integratedcircuit has been found.
A novel method of synchronization for RFID digital receiver is presented in this *** receiver can adaptively demodulate the burst mode receiving date from 31.2kHz to 780.8kHz and achieve fast synchronization and decod...
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ISBN:
(纸本)1424401607
A novel method of synchronization for RFID digital receiver is presented in this *** receiver can adaptively demodulate the burst mode receiving date from 31.2kHz to 780.8kHz and achieve fast synchronization and decoding,which is robust to±2.5%frequency deviation within one *** the power spectrum density of the receiving code is calculated and *** implementation is verified on Altera StratixⅡEP2S60 and the testing results are given.
this paper discussed a 2-order 5-bit Sigma-Delta modulator cascaded 12-bit Pipeline ADC structure,analyzed its noise characteristic,provided main building block circuit structure,and presented behavioral and circuit s...
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ISBN:
(纸本)1424401607
this paper discussed a 2-order 5-bit Sigma-Delta modulator cascaded 12-bit Pipeline ADC structure,analyzed its noise characteristic,provided main building block circuit structure,and presented behavioral and circuit simulation result,circuit implementation and layout design.
A measurement circuit is proposed as an early-warning sentinel of an upcoming threshold voltage failure condition due to Negative-Bias Temperature Instability (NBTI) degradation mechanisms in this paper, which can be ...
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