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检索条件"任意字段=IEE Colloquium on Field Programmable Gate Arrays - Technology and Applications"
52 条 记 录,以下是41-50 订阅
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Design flow for the development of new FPGA architectures
Design flow for the development of new FPGA architectures
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iee colloquium on field programmable gate arrays - technology and applications
作者: S.C. Beavis Pilkington Micro-Electronics Limited Cheshire UK
Illustrates the design flow for a new generation of the dynamically programmable logic device (DPLD), but is also relevant to other technologies. The marketing and commercial phase involves evaluating and patent filin... 详细信息
来源: 评论
Using FPGAs to implement reconfigurable DSP architectures?
Using FPGAs to implement reconfigurable DSP architectures?
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iee colloquium on field programmable gate arrays - technology and applications
作者: S. Monaghan C. Cowen P.D. Noakes Department of Electronic Systems Engineering University of Essex UK
SRAM based FPGAs are commonly used for rapid prototyping and hardware emulation, as well as for the 'mopping up' of 'glue logic' and the customisation of mass produced hardware. A less common applicati... 详细信息
来源: 评论
Reconfigurable FPGAs in 80 MHz systems
Reconfigurable FPGAs in 80 MHz systems
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iee colloquium on field programmable gate arrays - technology and applications
作者: N. Sawyer
The new XC3100 family of static RAM based FPGAs from Xilinx provides the same advantages in terms of initial cost, time to market, reprogrammability and low risk design as Xilinx existing XC2000, XC3000 and XC4000/400... 详细信息
来源: 评论
Hardware compilation for FPGAs: imperative and declarative approaches for a robotics interface
Hardware compilation for FPGAs: imperative and declarative a...
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iee colloquium on field programmable gate arrays - technology and applications
作者: I. Page W. Luk H. Lau Comput. Lab. Oxford Univ. UK Rogramming Research Group Oxford University Computing Laboratory Oxford UK Roboltics Research Group Department of Engineering Science Oxford University Oxford UK
Illustrates the use of Occam and Ruby in developing a shaft encoder interface. In the joint of a robot arm, a shaft encoder measures the angle of each shaft by reading two output signals generated from photo-sensitive... 详细信息
来源: 评论
Comparing several implementations of a hardware hasher unit
Comparing several implementations of a hardware hasher unit
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iee colloquium on field programmable gate arrays - technology and applications
作者: M.J. Lear E. James S.H. Lavington B. Srisuchinwong T.A. York A.M. Somerville Department of Computer Science University of Essex Colchester UK Department of Electrical Eng. & Electronics University of Manchester Institute of Science and Technology Manchester UK
As part of the design of a knowledge-base server, there arose a requirement for a hardware sub-unit which could perform a general hashing function on variable length tuples. The knowledge-base server uses transputers ... 详细信息
来源: 评论
Hardware architectures for lattice decoders
Hardware architectures for lattice decoders
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iee colloquium on DSP applications in Communication Systems
作者: A.G. Burr J.A. Sheppard Communications Research Group University of York UK
Describes the implementation of decoders for a combined coding and modulation scheme, lattice coding, using a direct hardware structure. The trellis representation of lattice codes is described, and a hardware decoder... 详细信息
来源: 评论
Reconfigurable DSP systems
Reconfigurable DSP systems
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iee colloquium on applications Specific Integrated Circuits for Digital Signal Processing
作者: M.A. Wahab D.J. Puckey Department of Electronics and Information Technology University of Glamorgan Mid-Glamorgan UK Dept. of Electron. & Inf. Technol. Glamorgan Univ. Pontypridd UK
Presents a new approach to the implementation of DSP structures that combines many of the benefits of ASIC-based systems with those of DSP processors. It is part of the work that the authors are engaged in to design a... 详细信息
来源: 评论
field-programmable gate-arrays and semi-custom designs for sinusoidal and current-regulated PWM
Field-programmable gate-arrays and semi-custom designs for s...
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iee colloquium on ASIC technology for Power Electronics Equipment
作者: T.C. Green M. Mirkazemi-Moud J.K. Goodfellow B.W. Williams Department of Electrical and Electronic Engineering Heriot-Watt University Edinburgh UK Ling Dynamic Systems UK Limited Royston Hertfordshire UK
Reductions in the size of power electronic equipment brought about by improved devices and packaging technology can now be matched even at moderate sales volumes by smaller control circuits employing ASICs. A digital ... 详细信息
来源: 评论
Adaptive hardware becomes a reality using electrically reconfigurable arrays (ERAs)
Adaptive hardware becomes a reality using electrically recon...
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iee colloquium on User-Configurable Logic - technology and applications
作者: P. Dillien GEC Plessey Semicond. Swindon UK
Reconfigurable systems-which modify their operation to adapt to prevailing conditions-promise new and exciting design concepts for the 1990s. Adaption, to date, has primarily been the domain of software, but new hardw... 详细信息
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Electrically reconfigurable arrays-ERAs
Electrically reconfigurable arrays-ERAs
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iee colloquium on New Directions in VLSI Design
作者: P. Dillien
Plessey Semiconductors Ltd. have recently introduced a novel type of programmable Logic Device categorised as field programmable gate arrays (FPGAs). Offering exciting opportunities for FPGA applications, the devices ... 详细信息
来源: 评论