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iee colloquium on Transputers for image processing applications

作者： D.W. Downing I.B. Bennett Gwent College of Higher Education Newport Gwent UK

Describes the parallel implementation of an interactive image processing system based on a ternary tree configuration of transputers. The tree can be extended to utilise available processors. Approximately 100 image processing algorithms have been implemented, involving low level transformations, feature extraction, and preliminary scene interpretation. Dynamic load balancing techniques have been utilised extensively in order to distribute the workload and data around the processors for these operations.< >

关键词： image processing parallel algorithms parallel processing Microprocessors

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Transputer based super resolution of SAR images: two approaches to a parallel solution

Transputer based super resolution of SAR images: two approac...

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iee colloquium on Transputers for image processing applications

作者： G.C. Pryde L.M. Delves S.P. Luttrell Centre for Mathematical Software Research University of Liverpool UK RSRE Malvern Malvern UK

Considers the parallel implementation on a transputer array of an algorithm for the super-resolution of Synthetic Aperture Radar (SAR) images. The authors consider two different approaches, both of which involve serial code running on a single master transputer, communicating with parallel code running on an array of slave transputers, where parallel code is only developed for those parts of the algorithm where the computation time justifies this. Firstly they take the simplest form of the super-resolution algorithm and parallelize the very large computations involved. Secondly they port the existing fast serial code to a single transputer, and develop parallel versions of selected routines where needed.< >

关键词： image processing Radar Microprocessors

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parallel processing on transputer arrays for the recognition of objects in infra-red images

Parallel processing on transputer arrays for the recognition...

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iee colloquium on Transputers for image processing applications

作者： S.A. Baker J.G. Harp Royal Signals and Radar Establishment Malvern Worcestershire UK R. Signals & Radar Establ. Malvern UK

Previous work has shown that a simple measure of the shape of the autocorrelation function is a useful discriminant for target classification in infra-red images. It has been found that it is possible to recognise vehicles from texture information and, because object shape information is not used, it is well suited to thermal imagers which may not resolve shape or edge details. The algorithms in the paper have been adapted and developed for evaluation on arrays of transputers. Much experience has been gained in the design and development of algorithms and the approach required for efficient use of transputers.< >

关键词： Machine vision Infrared imaging parallel algorithms parallel processing Microprocessors

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parallel tomographic image reconstruction on transputer arrays

Parallel tomographic image reconstruction on transputer arra...

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iee colloquium on Transputers for image processing applications

作者： G. Kelieff T.S. Durrani Signal Precessing Division Department of Electronic and Electrical Engineering University of Strathclyde Glasgow UK

Tomographic image Reconstruction forms an important element of non-invasive medical diagnosis. Here, 2D cross-sectional information of a 3D object is reconstructed from equiangular X-Ray projection data. Several algorithms have been proposed to solve the inverse problem of image Reconstruction, however, the Fourier Backprojection (FBP) Algorithm is the most widely used method due to its speed and robustness, being a direct, non-iterative solution. Current technology is geared to the fastest possible implementation of FBP which includes the use of specialised hardware and array processors. It is the high cost and narrow specification of these machines that has promoted this investigation of the suitability of a transputer array implementation. In this paper, a parallel implementation of the FBP algorithm is proposed and an assessment of its viability is presented.< >

关键词： image processing Tomography Fourier transforms parallel processing

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A pyramidal architecture for knowledge-based sonar image interpretation

A pyramidal architecture for knowledge-based sonar image int...

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iee colloquium on Transputers for image processing applications

作者： D.M. Lane M.J. Chantler E.W.A. Robertson A.G. McFadzean Intelligent Automation Laboratory Department of Electrical And Electronic Engineering Heriot-Watt University UK

Describes a pyramidal architecture for Knowledge-Based sonar image interpretation. The architecture will finally use the Inmos T800 Transputer as its basic processing agent. A Knowledge-Based System (KBS), is one approach which attempts to encode the knowledge and expertise required to reason in a specific problem domain. This knowledge is coded as a series of rules and facts and forms the Knowledge-Base of the system. However, KBS systems are often computationally intensive and to date, real-time response characteristics have not been apparent. By utilising a pyramidal architecture which pulls on techniques developed in the parallel processing community, a system is being designed and implemented which will provide this real-time performance.< >

关键词： image processing Knowledge based systems parallel processing

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image processing transputer-based machine for mobile robot road-following

Image processing transputer-based machine for mobile robot r...

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iee colloquium on Transputers for image processing applications

作者： R.A. Lotufo A.D. Morgan E.L. Dagless D.J. Milford J.F. Morrissey B.T. Thomas Faculty of Engineering University of Bristol Bristol UK Fac. of Eng. Bristol Univ. UK

Reports recent work on the mobile robot project underway at the University of Bristol. The aim of the project is to explore mobile robot road-following algorithms and suitable hardware architectures to run these algorithms. The prototype hardware, designed and built at the University, is a real-time frame grabber system based on transputers. The system is capable of concurrently grabbing, processing and displaying 256*256 8-bit pixel images from a camera or video recorder. The authors describe algorithms which have been implemented on the transputer network to achieve near real-time execution on sequences of video data.< >

关键词： Vehicles Machine vision Mobile robots Road vehicles

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Mapping control algorithms onto transputer arrays

Mapping control algorithms onto transputer arrays

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iee colloquium on Transputer applications

作者： L.P. Maguire G.W. Irwin G. Lightbody Department of Electrical and Electronic Engineering Queen''s University Belfast Ireland

The Inmos transputer has stimulated significant interest in parallel processing for control. It offers real-time implementation of complex algorithms at a reasonable cost but if parallel architectures are to be fully exploited it is essential that systematic mapping procedures emerge from the application specific solutions presently under consideration. The paper proposes two different mapping procedures. One relies on a fine-grained systolic array description of computation and is applied to transputer realisation of discrete Kalman filters for state feedback control of a simple missile engagement. The other uses an analogue computer flow diagram to produce a real-time simulation of a bank-to-turn missile. In each case practical results have been obtained.< >

关键词： Algorithms Cellular logic arrays Simulation Feedback Flowcharts Kalman filtering Military equipment Missiles parallel algorithms Real time systems Tracking Microprocessors

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Computer vision for robotics using a transputer array

Computer vision for robotics using a transputer array

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iee colloquium on Computer Vision for Robotics

作者： F. Fallside A.C. Sonmez R.S. Stephens Engineering Department University of Cambridge Cambridge UK

Describes a transputer array system developed under the Alvey ParSiFal project and used for vision processing in a SERC/ACME project on automatic robotic assembly as well as for research into speech recognition. The transputer array of 't-rack' consists of 64 T800-20 transputers, each with 1 MB of memory and each with two links daisy-chained to the SUN host via a 'Tadpole Board' controller for program down-loading and data transfer. The other links of each transputer are taken to two cross bar switches for configuring the array. In some applications OCCAM is used but much of the work uses C and the system is networked under Unix. In the vision work data is acquired by a VME-based framestore unit (Seescan Imaging) at 8*512*512 resolution and transferred to the t-rack by a VME/DMA to transputer link card. This fans the input data stream out to 4 links and achieves a data rate of 6 frames per second. Two vision processing applications are presented.< >

关键词： Machine vision image processing Multiprocessing parallel processing Microprocessors

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HIGHLY parallel PROCESSORS IN MILITARY SYSTEMS

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iee PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1988年第4期135卷 202-207页

作者： ROBERTS, JBG MERRIFIELD, BC SIMPSON, P WARD, JS Royal Signals and Radar Establishment Malvern UK

parallelism has found its way into programmable processors as well as dedicated engines such as FFT and digital filters. However, choices of machine architecture are still open. We have evaluated two contrasting types to test their versatility and to compare their performance on algorithms related to military applications. Fine-grain SIMD, and coarse-grain MIMD machines (Mil-DAP and Transputer arrays) have been applied to a spectrum of problems including FFT, two-dimensional operators, associative processing, linear assignment, sorting, dynamic programming and ray tracing. These relate to military needs in spectrum analysis and image correlation, feature extraction from images, ESM, tracking with netted radars, speech recognition and terrain intervisibility. Possibilities for parallelism in combat simulators are also being examined. Each type of processor has been proved versatile and much more powerful than conventional sequential machines. DAP has the advantage on regular low precision algorithms, and on assignment and sorting operations where scatter, gather and shift operations are important. Transputer arrays will (when the T800 version is available) offer a better capability for floating point arithmetic and less regular tasks. The chief conclusion is that both architectures are extremely versatile and VLSIcompatible, and that choices between them will more often hinge on the cost of a minimal system, the quality of the development software and the portability of code, rather than on the fundamental properties of the machine topology.

关键词： Computer architecture associative processing floating point arithmetic military systems speech recognition MilDAP terrain intervisibility sorting Military administration tracking Multiprocessing systems FFT fine-grain SIMD dynamic programming image correlation Transputer arrays feature extraction two-dimensional operators linear assignment ray tracing military computing ESM spectrum analysis coarse-grain MIMD highly parallel processors parallel processing

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iee colloquium on 'Practical applications of parallel Signal processing' (Digest No.111)

IEE Colloquium on 'Practical Applications of Parallel Signal...

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iee colloquium on Practical applications of parallel Signal processing

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