The Parsys SN 1000 series of parallelprocessing computer systems is considered as a vehicle for the generation of complex scenes using techniques such as ray-tracing and radiosity. The use of high throughput data cap...
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The Parsys SN 1000 series of parallelprocessing computer systems is considered as a vehicle for the generation of complex scenes using techniques such as ray-tracing and radiosity. The use of high throughput data capture peripherals is also considered as a tool for the manipulation of images.< >
The transputer provides a powerful new capacity in parallel computing which can readily be optimised for specific applications. The authors compare three alternative decomposition techniques for a large problem on a n...
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The transputer provides a powerful new capacity in parallel computing which can readily be optimised for specific applications. The authors compare three alternative decomposition techniques for a large problem on a network of 21 transputers, from the standpoints of speed, hardware efficiency and ease of programming. They have programmed three highly parallel implementations of an algorithm which constitutes part to a real-time system to generate terrain relief maps from satellite stereo image pairs. The particular algorithm used is the stereo matching strategy due to Barnard and Thompson (1980). The algorithm attempts to identify corresponding points in two image frames, in this case raw (non-epipolar) SPOT images, in order to refine initial estimates for the relative orientation parameters of the sensor in the two cases.< >
There is an increasing demand for low cost, high throughput multiprocessors on which to implement real-time DSP applications. A general purpose solution can be offered using an MIMD architecture. MIMD architectures ca...
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There is an increasing demand for low cost, high throughput multiprocessors on which to implement real-time DSP applications. A general purpose solution can be offered using an MIMD architecture. MIMD architectures can come in a variety of different forms. Loosely-coupled, homogeneous architectures are examined, because they offer infinite expandability and a low cost:processing ratio. One potential disadvantage of loosely-coupled architectures arises at run-time, when program and data have to be dynamically scheduled onto processors. Run-time scheduling overheads tend to curtail performance. However, many real-time DSP applications have a deterministic structure. This allows scheduling to be performed at compile-time, in a static fashion, and so reduce run-time overheads. Static scheduling involves mapping the application (in the form of a task graph) onto the processor architecture (in the form of a processor graph).< >
An optimal algorithm could be defined as one that exploits the properties of the available technology to the full. That is, it takes account of the inadequacies in an implementation and exploits the merits. For exampl...
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An optimal algorithm could be defined as one that exploits the properties of the available technology to the full. That is, it takes account of the inadequacies in an implementation and exploits the merits. For example, when multiplication was a very slow operation, algorithms aimed to reduce the number of multiplications needed. The radix-2 fast Fourier transform is an example of this type of algorithm. Similarly, number-theoretic transforms sought to replace multiplications with shifts and additions: operations that could be performed much faster within the constraints of the then existing technology. The advent of VLSI technology has created a fundamental change in the meaning of algorithm optimisation. In VLSI systems, global communication is very difficult but multiplications and additions are fast. The structure of the computation is the most important factor determining throughput. A simple computational structure is demanded. Algorithms must exhibit recursiveness and replication and they must require only local communications for a good VLSI implementation.< >
Many artificial intelligence (AI) applications need high performance computers that allow them to execute algorithms at reasonable speed. In recent years, researchers at universities and industry have developed new ar...
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Many artificial intelligence (AI) applications need high performance computers that allow them to execute algorithms at reasonable speed. In recent years, researchers at universities and industry have developed new architectures in order to accomplish the performance required. A number of the AI algorithms require knowledge representation and manipulation which can be obtained by means of semantic networks. A WSI architecture dedicated to semantic network processing may have an impact on the AI field; since the parallelism in this application can be exploited by means WSI technology which offers a potential of higher reliability and speed. However, it is necessary to deal with some of the WSI problems, mainly defects on the silicon.< >
The Transputer provides a powerful new capability in parallel computing which can readily be optimised for specific applications. The authors compare two alternative organisations of a large problem on a network of 21...
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The Transputer provides a powerful new capability in parallel computing which can readily be optimised for specific applications. The authors compare two alternative organisations of a large problem on a network of 21 Transputers, from the standpoints of speed, hardware efficiency and ease of programming. The authors programmed two highly parallel implementations of an algorithm which constitutes part of a 'real-time' system to generate terrain relief maps from satellite stereo image pairs. The particular algorithm used is the stereo matching strategy due to Barnard & Thompson (1980). The algorithm attempts to identify corresponding points in two image frames, in this case raw SPOT images, in order to refine initial estimates for the relative orientation parameters of the sensor in the two cases. The initial estimates are extracted from satellite header information, and the refined estimates are used to provide approximate epipolar image data for use with subsequent edge-based matching techniques. The authors describe one stage of the sequence implemented on the Transputers: apply the Barnard and Thompson algorithm to rough epipolar SPOT stereo pair, to obtain a spare disparity map.< >
Many operations required for imageprocessing use transformations which are often derivatives of the discrete Fourier transform (DFT). The Fourier transform and its derivatives enable the two-dimensional transform to ...
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Many operations required for imageprocessing use transformations which are often derivatives of the discrete Fourier transform (DFT). The Fourier transform and its derivatives enable the two-dimensional transform to be separated into the double application of a one-dimensional transform and this simplifies the processing of images. This paper looks at a newly-produced VLSI device, the INMOS IMS A100, and investigates ways of reducing the memory input/output bandwidths and proposes an architecture which separates the control of data from the computational processes. The work is based upon the one-dimensional DFT because this has applications in many other areas of signal processing. Related transforms such as the discrete cosine transform and the Hartley transform can be mapped onto the same architecture. Since these related transforms are simpler than the DFT, they can result in a reduced hardware overhead.
image reconstruction by computer tomography provides a nonintrusive method of imaging the internal structure of objects. From measurements of radiation (e.g. X-rays or gamma rays) passed through an object, it is possi...
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image reconstruction by computer tomography provides a nonintrusive method of imaging the internal structure of objects. From measurements of radiation (e.g. X-rays or gamma rays) passed through an object, it is possible to reconstruct the internal structure. There is great interest in the potential of such methods in industrial applications but a number of problems need to be solved before these opportunities can be realised. The reconstruction process is computationally intensive and requires imaginative parallelprocessing algorithms to attain ‘real-time’performance. The work carried out has involved evaluating how these algorithms can be used in multiprocessor concurrent architectures to obtain rapid image reconstruction. A suitable computer architecture has been simulated in occam. This allows execution on a collection of transputers.
image reconstruction by computer tomography provides a nonintrusive method of imaging the internal structure of objects. From measurements of radiation (e.g. X-rays or gamma rays) passed through an object, it is possi...
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image reconstruction by computer tomography provides a nonintrusive method of imaging the internal structure of objects. From measurements of radiation (e.g. X-rays or gamma rays) passed through an object, it is possible to reconstruct the internal structure. There is great interest in the potential of such methods in industrial applications but a number of problems need to be solved before these opportunities can be realised. The reconstruction process is computationally intensive and requires imaginative parallelprocessing algorithms to attain ‘real-time’ performance. The work carried out has involved evaluating how these algorithms can be used in multiprocessor concurrent architectures to obtain rapid image reconstruction. A suitable computer architecture has been simulated in occam. This allows execution on a collection of transputers.
Computer tomography has been used in radiology and many other fields. Although several reconstruction algorithms have been used there are only two basic types: iterative and analytical. For industrial applications ite...
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ISBN:
(纸本)0852963325
Computer tomography has been used in radiology and many other fields. Although several reconstruction algorithms have been used there are only two basic types: iterative and analytical. For industrial applications iterative methods are more suitable since they are more flexible in dealing with different transducer configurations and missing data. However iterative methods are considerably slower than analytical ones. This disadvantage may be overcome by using parallel algorithms running on parallelarchitectures. When using such algorithms the communications between the individual processes must be considered carefully if deadlock is to be prevented. In this paper a parallel architecture suitable for directly executing parallel iterative algorithms has been described. Since occam has been used ideas can be investigated and may then be executed on an array of transputers. This architecture is easily understood and gives a reasonable speed-up. However it uses a large number of transputers.
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