imageprocessing, and especially real time imageprocessing, is naturally a very compute intensive task. These tasks can now be tackled very well with the Texas Instruments TMS320C40 DSP processor. This, as well as ha...
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imageprocessing, and especially real time imageprocessing, is naturally a very compute intensive task. These tasks can now be tackled very well with the Texas Instruments TMS320C40 DSP processor. This, as well as having a powerful processing architecture well suited to data intensive signal processing tasks such as imageprocessing, also has six high speed communication ports for transferring data between C40 processors in a network. Coupled with suitable modular C40 based hardware such as that from Loughborough Sound images, this can provide an extremely powerful and flexible imageprocessing system. This paper presents some results of using C40 processors in practical imageprocessing systems, both a single C40 and multiple C40s. It deals with the real processing speed achievable and techniques to achieve that speed, then the speed of transferring image data between C40s, for example partitioning a grabbed image across to several C40s. It then goes on to demonstrate how an application was developed making use of the above techniques, to give a real time imageprocessing system processing a full 512*512 image at 12.5 frames per second.< >
This paper describes a fully decentralized, transputer-based architecture for data fusion problems. This architecture takes the form of a network of sensor nodes, each with its own processing facility, which together ...
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This paper describes a fully decentralized, transputer-based architecture for data fusion problems. This architecture takes the form of a network of sensor nodes, each with its own processing facility, which together do not require any central processor or any central communication facility. In this architecture, computation is performed locally and communication occurs between any two nodes. Such an architecture has many desirable properties including robustness to sensors failure, and flexibility to the addition or loss of one or more sensors. We first describe the decentralized data fusion algorithm and some of its consequences. We then describe a number of implementations of this algorithm: on a vision-based surveillance network, on a large process control rig comprising some 150 sensors, and on a modular mobile robot.< >
The proceedings contain 10 papers. Among the topics discussed are: color imageprocessing and its industrial and biomedical applications;microprocessor chips;character recognition;pattern recognition;algorithms;parall...
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The proceedings contain 10 papers. Among the topics discussed are: color imageprocessing and its industrial and biomedical applications;microprocessor chips;character recognition;pattern recognition;algorithms;parallelprocessing systems;pipeline processing systems;optical signal processing;parallel volume rendering;and transputer networks.
An imageprocessing system based upon Texas Instruments TMS320C40 digital signal processors is described, which is currently in the final stages of development and will be applied to non-contact inspection of medical ...
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An imageprocessing system based upon Texas Instruments TMS320C40 digital signal processors is described, which is currently in the final stages of development and will be applied to non-contact inspection of medical and industrial applications. The system is capable of manipulating HDTV resolution images and is due to be operational during the second quarter of 1994.
The ASP System Testbed for Research and applications (ASTRA) is an associative processor-based parallelprocessing system developed for imageprocessingapplications. The machine implements a multilayer heterogeneous ...
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The ASP System Testbed for Research and applications (ASTRA) is an associative processor-based parallelprocessing system developed for imageprocessingapplications. The machine implements a multilayer heterogeneous architecture with an extendable linear array of simple associative processing elements at its base and more powerful processors at higher levels. A model has been developed to assist in performance evaluation studies of the system on imageprocessingapplications with the aid of vision-related benchmarks. The machine and an analysis of some of the results obtained on one such benchmark are discussed in this paper.
Optical signal processing (OSP) offers numerous advantages in real time imageprocessingapplications. OSP inherently offers parallelism in the processing of data at speeds much higher than those achievable using elec...
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Optical signal processing (OSP) offers numerous advantages in real time imageprocessingapplications. OSP inherently offers parallelism in the processing of data at speeds much higher than those achievable using electrical digital signal processing (DSP). In this contribution a review of the available OSP techniques for imageprocessing is given. Particular attention is given to image feature estimation in background noise while the necessary OSP implementations are demonstrated.
The paper describes a 32 physical node fine-grained computer for image pre-processingapplications. The computer, known as Zelig, uses field programmable gate arrays (FPGAs) to store the node data needed for creating ...
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The paper describes a 32 physical node fine-grained computer for image pre-processingapplications. The computer, known as Zelig, uses field programmable gate arrays (FPGAs) to store the node data needed for creating larger automata. It is also provided with a time multiplexing component for generating virtual axes and implementing higher dimension computations.
This paper present a practical solution to the problem of real-time robot control including the non-linear dynamic model of the manipulator by employing a parallelprocessing approach. The parallelism inherent in the ...
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This paper present a practical solution to the problem of real-time robot control including the non-linear dynamic model of the manipulator by employing a parallelprocessing approach. The parallelism inherent in the adaptive controllers is exploited to obtain an efficient implementation that reduces the overall computation time to within the limit acceptable for real time control. The distributed algorithm is implemented on a network of transputers for the six-joint PUMA 560 arm.
Several important parameters must be considered in the implementation and specification of high performance algorithms for pattern classification. These include the use of appropriate parallelprocessing computational...
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Several important parameters must be considered in the implementation and specification of high performance algorithms for pattern classification. These include the use of appropriate parallelprocessing computational infrastructure and techniques which allow effective pattern rejection and decision making during the early stages in the processing chain. Several techniques for such applications are presented in this paper.
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