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检索条件"任意字段=IEE Colloquium on Parallel Architectures for Image Processing Applications"

共 165 条记录，以下是71-80 订阅

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On applying parallel processing in advanced control of induction motor drives

On applying parallel processing in advanced control of induc...

引用

iee colloquium on High Performance applications of parallel architectures

作者： P.C.K. Luk M.G. Jayne R.R. Payne School of Electronic & ElecaiCal Engineering Robert Gordon University Aberdeen UK Department of Electronics and Information Technology University of Glamorgan Mid-Glamorgan UK

parallel processing offers realistic solutions to implement cost-effectively modern electrical drive systems comprising such advanced features as real-time control, online diagnostics and auto-tuning of system parameters. The implementation complexity of parallel processing by conventional multi-processor systems however has seldom been addressed and adequately documented. The proposed drive system serves to evaluate the impact of parallel processing on motor drive control applications, when effort can be turned away from low-level implementation as a result of emergence of some dedicated parallel processors. Some salient features of the drive system include real-time generation of pulse-width modulated (PWM) waveforms, programmable soft-starting, online user input for PWM parameters, dynamic braking and open loop vector control.< >

关键词： Digital control Motors parallel processing Pulse width modulation

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Animation using accelerated ray tracing on a hypercube

Animation using accelerated ray tracing on a hypercube

引用

iee colloquium on High Performance applications of parallel architectures

作者： L.J. Grimstead S. Hurley Department of Computing Mathematics College of Cardiff University of Wales Cardiff UK

Ray-tracing is an image synthesis method producing some of the most photorealistic images to date. The method is taken from classical optics, where rays of light are traced around a scene inside the computer and results are plotted into the resulting image. This simple technique enables refraction, reflection and shadowing to be created in the same algorithm. The drawback, however, is that the method is very computationally expensive, and hence requires accelerating to enable images to be produced in a reasonable time. Most of the time spent in any ray-tracing algorithm is spent in ray-object intersection tests, so techniques to accelerate the ray tracing process have concentrated on this problem. Two acceleration techniques are investigated, those of parallelism and temporal coherence.< >

关键词： Animation Hypercubes parallel programming Ray tracing

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A 1-Gflop triangular pseudo-systolic processor

A 1-Gflop triangular pseudo-systolic processor

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iee colloquium on High Performance applications of parallel architectures

作者： M. Johnson DRA Malvern Worcestershire UK

Modern signal processing often requires arithmetically intensive algorithms. The complexity of such algorithms and their development of 'batch processing' solutions does not, in general, provide the bandwidth or convenience required for processing signals in real-time at rates greater than a few hertz; a different approach is needed. J.G. McWhirter and T.J. Shepherd (1987) proposed a systolic architecture which provided the basis for an efficient 'flow-through' processing technique and much effort has since been devoted to the development of suitable algorithms. In particular, signal processing techniques which make use of a least-squares optimisation are often used in signal processing strategies. It was shown by McWhirter and Shepherd that the QR algorithm, used for least-squares optimisation, could be expressed in a form suited to a triangular systolic array. However, the number of systolic nodes and hence processors, in an array capable of optimising a problem with 81 unknowns, for example, would be 3321; such an array would be large and expensive. An intermediate and economically attractive alternative is to use substantially fewer processors emulating the same flow-through architecture whilst providing sufficient bandwidth; a 'pseudo-systolic' solution. Using this approach a group of nodes would share a processor.< >

关键词： Least squares methods Optimization methods parallel algorithms Signal processing Systolic arrays

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Techniques and trends in digital image processing and computer vision

Techniques and trends in digital image processing and comput...

引用

iee colloquium on Mathematical Modelling and Simulation of Industrial and Economic Processes

作者： F. Vajda Research Institute for Measurement and Computing Techniques Hungarian Academy of Sciences (ATOMKI) Budapest Hungary

Summary form only given. Digital image processing is a rapidly evolving field with growing applications in science and engineering. The presentation addresses the fundamentals of major topics of digital image processing and computer vision i.e. image processing and computer vision taxonomy, typical problems (including their models and descriptions), application areas, hierarchical levels of image processing, some sample image processing algorithms, control methods of processing (preprocessing, iconic and symbolic processing), basic methods of parallel processing (local neighborhood operations, subimage/segment parallel processing and algorithm/operational functional parallelism), application requirements in real-time systems. The typical problems in image processing and computer vision applications are also described.< >

关键词： Machine vision image processing

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Feature selection in automatic signature verification

Feature selection in automatic signature verification

引用

iee colloquium on image processing for Biometric Measurement

作者： P. Brittan M.C. Fairhurst Electronic Engineering Laboratories University of Kent UK

Automatic handwritten signature verification (ASV) is potentially the most powerful and publicly acceptable means of personal authentication available, and has a long history with applications to be found in cheque authorisation, document image analysis, and access control. In the past such effort has been expended in attempting to find an universal set of features suitable for verifying all classes of signatures. However, part of an ongoing research program at the University of Kent has established an approach to the verification process based on selecting a unique set of features for each individual signer to minimise error rate performance. The motivation for automatically selecting features is not only fuelled by minimising error rates, and this paper sets out to describe and analyse the parallel implementation of this new approach to ASV and describes improvements achieved in throughput performance.< >

关键词： Access control Optical character recognition parallel processing

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Developments in 'smart' custom image sensors at the University of Brighton

Developments in 'smart' custom image sensors at the Universi...

引用

iee colloquium on Integrated Imaging Sensors and processing

作者： G.J. Awcock M.T. Rigby Applied Image Proccessing Research Unit University of Brighton UK

Any image processing that can be performed within the sensor itself has the potential to dramatically reduce the communication and processing workload of the host controller. Thus onchip processing has an important role to play in the viability of visual servoing applications. When coupled with the increasing accessibility of custom VLSI design this makes the development of 'smart' image sensing architectures attractive. Investigations into a proprietary optic DRAM image sensor suggested a sensing mechanism based upon selective sensitisation of photosites that would allow edge-detection of binary images to be performed in the focal plane of the sensor. This mechanism was chosen as the vehicle for development of a prototype 'smart' custom VLSI image sensor. A 32x32 array featuring this unique unit cell architecture was implemented in a 2 micron ES2 CMOS process. Each unit cell was 80.5 microns square and featured a diode photosite which occupied 24% of the total area, the remainder being concerned with buffering, binarisation and edge-extraction hardware. The requirement for support circuitry was met by a rack containing three Eurocards with a microprocessor.< >

关键词： DRAM chips image edge analysis image sensors Intelligent sensors Very-large-scale integration

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iee colloquium on 'parallel architectures for image processing applications' (Digest No.086)

IEE Colloquium on 'Parallel Architectures for Image Processi...

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iee colloquium on parallel architectures for image processing applications

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A new systolic architecture for 2-D FIR digital filters

A new systolic architecture for 2-D FIR digital filters

引用

iee colloquium on General-Purpose Signal-processing Devices

作者： Zhijian Hu G. King Information Systems Division Southampton Institute Southampton Hampshire UK

Two dimensional FIR digital filters are important in two dimensional image and signal processing. Systolic architectures have the benefit of gaining most from VLSI in time cost effective terms and much work has been done in creating reconfigurable array structures so as to produce flexible but specialised systems for tasks such as: image enhancement; image restoration; and image coding. The authors describe a novel variant architecture devised while considering the above. The proposed architecture arranges the input coefficient stream and the input data stream in a manner which removes the need to clear processing element latches before the beginning of every row scan. The 'speed up' obtained is enhanced by fully pipelining each pathway. The improved features in the design provide high throughput appropriate to real time applications and was, derived directly from the filter transfer function.< >

关键词： Digital filters image processing parallel architectures Systolic arrays

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Driveable region segmentation using a Pearl Bayes network

Driveable region segmentation using a Pearl Bayes network

引用

iee colloquium on image processing for Transport applications

作者： P.G. Ducksbury Defence Research Agency Malvern Worcestershire UK

Describes a parallel implementation of a texture segmentation algorithm. The algorithm uses a Pearl Bayes network (PBN) to combine evidence for the location of driveable regions in autonomous land vehicle imagery. A multilevel PBN approach is introduced and followed by an example which is used to illustrate the derivation of the propagation and fusion equations. A parallel implementation is then described with results demonstrating its effectiveness.< >

关键词： Bayes procedures image segmentation image texture analysis Mobile robots parallel algorithms Road vehicles

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A moving corner detector for dynamic vehicular images

A moving corner detector for dynamic vehicular images

引用

iee colloquium on image processing for Transport applications

作者： X. Zhang Centre for Transport Studies University College London London UK

Introduces a moving corner detector for analysis of traffic movements. image grey level corners are very important features in image analysis. In motion analysis, since the aperture problem does not exist at these points, the velocities at these places can be uniquely determined locally in theory. In a traffic scene, there are usually many moving corners, which can provide important clues for motion estimation. In this paper we introduce a moving corner detector that is composed of a corner detector and a moving edge detector. Since a corner point is also an edge point, the combination of these detectors provides information on moving corners. The corner detector is derived from Harris and Stephens' (1988) combined corner and edge detector. The moving edge detector is realized through several frames. It combines both temporal and spatial information and is able to suppress noise, particularly the noise generated around strong background edge points. This moving corner detector can be computed locally and, therefore, can be implemented quite easily in parallel computing hardware.< >

关键词： image edge analysis Feature extraction image sequence analysis Motion analysis parallel processing Vehicles

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