The proceedings contains 10 papers from the ieeE colloquium on partitioning in hardware-softwarecodesigns, organized by the Professional groups C2 (hardware and systems engineering) and C6 (Systems engineering for au...
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The proceedings contains 10 papers from the ieeE colloquium on partitioning in hardware-softwarecodesigns, organized by the Professional groups C2 (hardware and systems engineering) and C6 (Systems engineering for automation) and E10 (Circuits and systems), held at the Savoy Place on February 13, 1995. Topics discussed include systems design;computer architecture;computer hardware;computer software;real time systems;computer simulation;and ASICs.
Many high-performance embedded real-time systems are today implemented heterogeneously, with some parts of the functionality in hardware and others in software. In this paper, we discuss how hardware/software codesign...
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Many high-performance embedded real-time systems are today implemented heterogeneously, with some parts of the functionality in hardware and others in software. In this paper, we discuss how hardware/software codesign techniques can be used to improve the design of such systems, and we focus on hardware/softwarepartitioning and its relation to other important design activities, such as system behavioural description and hardware architecture selection.
An integrated development environment for the cosynthesis of hardware/software systems has been designed and implemented. The software-only applications have been partitioned into ones containing both software and har...
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An integrated development environment for the cosynthesis of hardware/software systems has been designed and implemented. The software-only applications have been partitioned into ones containing both software and hardware components. A new system architecture, based on a microcontroller, FPGA, and a single global memory shared by both the processor and the FPGA, is being tested. Initial performance measurements indicate that software-hardware speed-ups in excess of three can now be achieved.
DisCo is a language and a method intended for the specification of reactive systems. The formal basis of this approach is in temporal logic of actions. A fundamental idea in DisCo is that all specifications are closed...
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DisCo is a language and a method intended for the specification of reactive systems. The formal basis of this approach is in temporal logic of actions. A fundamental idea in DisCo is that all specifications are closed in the sense that a specification contains both the system that is to be specified and its environment. It is possible to partition a DisCo specification in a way that separates the two parts. In this paper, requirements for this partitioning are discussed.
The potential market for information appliances will require a new set of hardware-software codesign tools aimed at fast time-to-market and utilizing macrofunction libraries. These tools differ from system tools, and ...
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The potential market for information appliances will require a new set of hardware-software codesign tools aimed at fast time-to-market and utilizing macrofunction libraries. These tools differ from system tools, and resemble the present behavioural compilers. Appliance developers would like to witness the automation of the system engineering. They are also willing to accept the inefficiencies associated with macrofunctions.
The Statemate range of tools from i-Logix is presented as an alternative approach to hardware/software codesign. Statemate provides automatic code generation that can speed up both the hardware and software aspects of...
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The Statemate range of tools from i-Logix is presented as an alternative approach to hardware/software codesign. Statemate provides automatic code generation that can speed up both the hardware and software aspects of the design. It also allows the quick modeling and verification of function algorithms, continuation of parallel hardware and software development, and the condensation of a huge amount of information into easy to use panel display space.
hardware/software codesign is an approach to system design which allows hardware and software design aspects of a system to be considered concurrently. The decision to allocate functionality to hardware or software ca...
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hardware/software codesign is an approach to system design which allows hardware and software design aspects of a system to be considered concurrently. The decision to allocate functionality to hardware or software can then be made in such a way that it may have benefits in terms of improved overall systems performance, improved reliability and lower cost. In the case of fingerprint recognition systems, exploring the cost and performance trade-offs between different implementations is the critical leading factor for their use in commercial/industrial environments. The hardware/software trade-offs possible in designing a fingerprint recognition system are examined.
The main objective of the INSYDE project is to define, implement, and demonstrate a comprehensive methodology for the design of hybrid hardware/software systems. Stages in the INSYDE methodology are analysis, system d...
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The main objective of the INSYDE project is to define, implement, and demonstrate a comprehensive methodology for the design of hybrid hardware/software systems. Stages in the INSYDE methodology are analysis, system design, detailed design, and validation. The functional requirements analysis results, after some iterations, in a conceptual model in OMT. The system design, which iterates over the OMT structure classification and the transition from OMT to OMT*, produces an OMT* system design model. This system design model is transformed into SDL/VDL automatically as far as possible, and partially by the user. Additional information for the further specification development can be taken from the OMT* system design model.
hardware-software codesign is particularly well suited for real-time embedded systems. It is therefore imperative that the design implements the specification correctly. In this paper the method of validation or verif...
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hardware-software codesign is particularly well suited for real-time embedded systems. It is therefore imperative that the design implements the specification correctly. In this paper the method of validation or verifying designs is discussed, and tools are presented that can be used to provide a framework for verifying codesigned systems. Also discussed is how these tools can be integrated for such a framework.
This paper is an overview of top-down design with Mentor and Altera CAD tools. It outlines the entire process of designing hardware from writing VHDL to mapping the design to an FPGA. Intermediate steps including synt...
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This paper is an overview of top-down design with Mentor and Altera CAD tools. It outlines the entire process of designing hardware from writing VHDL to mapping the design to an FPGA. Intermediate steps including synthesis, optimisation, functional simulation, layout and partitioning are also discussed. The conclusion derives from our experiences.
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