PLE (Programmed Learning Environment) is a computer based learning environment that was originally designed to support the delivery of courses that comprise traditional lecture material supplemented with intensive lab...
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PLE (Programmed Learning Environment) is a computer based learning environment that was originally designed to support the delivery of courses that comprise traditional lecture material supplemented with intensive laboratory based sessions. PLE is currently being piloted in the software development and softwareengineering modules run at the University of Leeds. This paper demonstrate the flexibility of the PLE approach, both from the authoring and delivery viewpoint, and also presents some preliminary results on how the monitoring data may interpreted.
The character-based user interfaces of four standard network element management applications of an Ericsson Hewlett-Packard Telecommunications (EHPT) project were improved to become consistent and task-oriented. A dir...
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The character-based user interfaces of four standard network element management applications of an Ericsson Hewlett-Packard Telecommunications (EHPT) project were improved to become consistent and task-oriented. A direct relationship between EHPT's human factors experts and a customer's human factors team was established. The joint/parallel work of the two teams was a flexible solution to the time and resource limitations for usability engineering in the project. Initial feedback from end-users have indicated that improvements in usability have been achieved. The lessons learned during the project are presented as pragmatic suggestions for usability survival in the time-pressured environment common to telecom software development projects.
The Electronic Design Education Consortium (EDEC) is dedicated to the production of computer-based teaching and learning material to support the education of electronic engineers and computer scientists. Eight univers...
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The Electronic Design Education Consortium (EDEC) is dedicated to the production of computer-based teaching and learning material to support the education of electronic engineers and computer scientists. Eight universities are collaborating in the production of the courseware which has been grouped into four major theme areas, namely, Electronic Circuit Design, Digital Design, System and High Level Design and Testing and Design for Test. The Institution of Electrical Engineers is also a member of the Consortium. Over the three year duration of the project it is hoped to develop 160 hours of courseware which will be, where ever possible, closely integrated with the industry-standard electronic CAD software available under the ECAD and EUROCHIP initiatives.
This paper addresses the role of re-engineering, restructuring and reverseengineering techniques in addressing the dual issues of intellectual ownership and technology obsolescence. As in any reverseengineering acti...
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This paper addresses the role of re-engineering, restructuring and reverseengineering techniques in addressing the dual issues of intellectual ownership and technology obsolescence. As in any reverseengineering activity, the major obstacles are the maintenance budget and timescales. We suggest that allocating a budget for such appraisal and preventive measures, and empowering the maintenance team to spend their allocation as and when they choose, will lead to reduced maintenance costs. Also, we must address the apparent incompatibility between the natural desire of software engineers to seek new challenges and the need to optimize the evolution of long-lived software through staff continuity.
The paper discusses would be limitations that computer software rather than hardware can impose on sophisticated microprocessor basedcontrol of cars and the efforts being done to develop tools to support car software...
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The paper discusses would be limitations that computer software rather than hardware can impose on sophisticated microprocessor basedcontrol of cars and the efforts being done to develop tools to support car software development. CASE workbench tools are described with their limitations. softwareengineering environments including their requirements and benefits are considered. Real time software development tools and route planning software are also described.
The paper describes the implementation of algorithms which attempt to provide optimization techniques for logic circuits and field programmable gate arrays (FPGAs). These genetic algorithms are used to select, breed a...
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The paper describes the implementation of algorithms which attempt to provide optimization techniques for logic circuits and field programmable gate arrays (FPGAs). These genetic algorithms are used to select, breed and test potential solutions to these networks and recommend the nearest optimal solution. In practice, recommended solutions causes considerable savings on circuit implementations as experimental results show and demonstrate.
This paper describes a prototype of an automatic behavioural synthesis system targetted at FPGA-based reconfigurable digital systems. Experiment with the system, especially for synthesising random number generators, s...
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This paper describes a prototype of an automatic behavioural synthesis system targetted at FPGA-based reconfigurable digital systems. Experiment with the system, especially for synthesising random number generators, shows that register-transfer level hardware costs do not reflect hardware costs in terms of FPGA resource (e.g. Xilinx CLBs). This shows that extensive efforts that have been spent in the past for optimizing RTL-hardware costs need be reconsidered. For this particular example, a simple register allocation (i.e. no register allocation at all) is much better than register allocation based on the left-edge algorithm. Experiments in synthesising random number generators involving both FPGAs and RAMs also shows that behaviourally-equivalent circuits with the same number and types of RTL-hardware units require different number of CLBs.
There exist a number of CASE tools to support software re-engineering in several different languages. These tools automatically or semi-automatically analyse a system's structure and re-structure that system into ...
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There exist a number of CASE tools to support software re-engineering in several different languages. These tools automatically or semi-automatically analyse a system's structure and re-structure that system into a more coherent form. However, the recovered structure is a control structure at a fine-level of detail. It is not possible to recover a more abstract architectural structure by source code processing. By architectural structure, we mean a more abstract model showing the principal sub-systems and modules making up the system, their interfaces, their composition relationships and other relevant inter-module relationships such as data flows. We argue that the discovery of this architectural structure is a critical part of the re-engineering process. We have developed a language, called PCL (Proteus Configuration Language), which is specifically intended for the architectural modelling of systems at an abstract level. The language allows the construction of hardware, software and documentation models and provides relationship definition facilities which can link these models. The systems described may be centralised or distributed, homogeneous or heterogeneous. PCL addresses the problem of architectural variability so that the architectural descriptions of different system versions may be combined into a single model.< >
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