检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

879 篇 会议
11 篇 期刊文献

馆藏范围

890 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

630 篇 工学
- 549 篇 计算机科学与技术...
- 434 篇 软件工程
- 261 篇 电气工程
- 261 篇 电子科学与技术（可...
- 78 篇 机械工程
- 48 篇 控制科学与工程
- 35 篇 信息与通信工程
- 31 篇 动力工程及工程热...
- 15 篇 材料科学与工程（可...
- 14 篇 冶金工程
- 14 篇 生物工程
- 11 篇 生物医学工程（可授...
- 10 篇 仪器科学与技术
- 10 篇 化学工程与技术
- 8 篇 建筑学
- 6 篇 光学工程
- 5 篇 力学（可授工学、理...
- 5 篇 土木工程
283 篇 理学
- 240 篇 数学
- 47 篇 物理学
- 38 篇 统计学（可授理学、...
- 16 篇 系统科学
- 14 篇 化学
- 14 篇 生物学
46 篇 管理学
- 42 篇 管理科学与工程(可...
- 17 篇 工商管理
- 4 篇 图书情报与档案管...
11 篇 法学
- 9 篇 社会学
6 篇 经济学
- 6 篇 应用经济学
3 篇 农学
2 篇 教育学
2 篇 艺术学
1 篇 医学

主题

126 篇 computer aided d...
82 篇 computer aided l...
78 篇 computer science
52 篇 computer archite...
49 篇 timing
41 篇 delay
39 篇 permission
37 篇 routing
35 篇 very large scale...
31 篇 circuit simulati...
31 篇 integrated circu...
30 篇 circuit testing
30 篇 clocks
30 篇 hardware
27 篇 computational mo...
27 篇 circuits
26 篇 circuit faults
25 篇 circuit synthesi...
25 篇 energy consumpti...
25 篇 algorithm design...

机构

16 篇 computer science...
8 篇 computer systems...
8 篇 univ calif los a...
7 篇 department of el...
6 篇 department of el...
5 篇 department of el...
5 篇 school of comput...
5 篇 beijing advanced...
5 篇 stanford univ ca...
5 篇 department of co...
5 篇 department of co...
5 篇 school of integr...
5 篇 computer science...
5 篇 department of co...
4 篇 ucla united stat...
4 篇 univ of californ...
4 篇 electrical and c...
4 篇 department of el...
4 篇 department of el...
4 篇 synopsys inc. mo...

作者

16 篇 cong jason
14 篇 m. potkonjak
9 篇 wong d.f.
9 篇 m. sarrafzadeh
8 篇 j. cong
8 篇 d.f. wong
7 篇 koh cheng-kok
7 篇 c.l. liu
7 篇 cheng chung-kuan
7 篇 lim sung kyu
6 篇 kahng andrew b.
6 篇 anon
6 篇 wong martin d.f.
6 篇 sarrafzadeh maji...
6 篇 d. kirovski
5 篇 li peng
5 篇 gang qu
5 篇 gajski daniel d.
5 篇 liu c.l.
5 篇 potkonjak miodra...

语言

845 篇 英文
41 篇 其他
4 篇 中文

检索条件"任意字段=IEEE/ACM International Conference on Computer Aide Digest"

共 890 条记录，以下是11-20 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Invited Paper: Enhancing Privacy-Preserving Computing with Optimized CKKS Encryption: A Hardware Acceleration Approach 24

Invited Paper: Enhancing Privacy-Preserving Computing with O...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Bao, Tianyou He, Pengzhou Xie, Jiafeng Department of Electrical and Computer Engineering Villanova University VillanovaPA19085 United States

ISBN: (纸本)9798400710773

The widespread adoption of the FHE (Fully Homomorphic Encryption) CKKS (Cheon-Kim-Kim-Song) encryption algorithm is stunted by its slow software implementation, driving the need for efficient hardware acceleration solutions. This paper presents a novel approach to address the challenge by optimizing a segment of the CKKS encryption and decryption process. Using the Residue Number System (RNS), the inputs are encoded into 32-bit representations and processed through the number theoretic transform (NTT). This innovative strategy reduces the utilities of the hardware resources and also accelerates calculations. This unified calculation methodology is designed to adapt inputs of diverse bit widths, seamlessly decoding them back into their original format after the CRT calculation, thereby significantly enhancing the throughput of calculations. We hope this work advances privacy-preserving computing in resource-constrained environments. © 2024 Copyright is held by the owner/author(s).

关键词： Number theory

来源：评论

学校读者我要写书评

暂无评论

Co-Designing NVM-based Systems for Machine Learning and In-memory Search Applications 24

Co-Designing NVM-based Systems for Machine Learning and In-m...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Henkel, Jörg Siddhu, Lokesh Nassar, Hassan Bauer, Lars Chen, Jian-Jia Hakert, Christian Seidl, Tristan Chen, Kuan Hsun Hu, Xiaobo Sharon Li, Mengyuan Yang, Chia-Lin Wei, Ming-Liang Karlsruhe Institute of Technology Germany TU Dortmund Germany University of Twente Netherlands University of Notre Dame IN United States National Taiwan University Taiwan

ISBN: (纸本)9798400710773

With the rapid development of the Internet of Things, machine learning applications on edge devices with limited resources face challenges due to large data scales and irregular memory access patterns. Non-volatile memory (NVM) technologies provide promising solutions by offering larger capacity, low leakage power, and data persistence. In this paper, we discuss the potential of NVM technology in enhancing machine learning applications by improving energy efficiency and reducing latency through in-memory computation and different NVM write modes. The insights from this analysis provide valuable guidance to device researchers and system architects working to develop high-performance systems for machine learning and accelerators in large-scale search applications using NVMs. © 2024 Copyright is held by the owner/author(s).

关键词： computer aided instruction

来源：评论

学校读者我要写书评

暂无评论

ConSmax: Hardware-Friendly Alternative Softmax with Learnable Parameters 24

ConSmax: Hardware-Friendly Alternative Softmax with Learnabl...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Liu, Shiwei Tao, Guanchen Zou, Yifei Chow, Derek Fan, Zichen Lei, Kauna Pan, Bangfei Sylvester, Dennis Kielian, Gregory Saligane, Mehdi Google Research United States Department of Electrical Engineering and Computer Sciences University of Michigan United States

ISBN: (纸本)9798400710773

The self-attention mechanism distinguishes transformer-based large language models (LLMs) apart from convolutional and recurrent neural networks. Despite the performance improvement, achieving real-time LLM inference on silicon remains challenging due to the extensive use of Softmax in self-attention. In addition to the non-linearity, the low arithmetic intensity significantly limits processing parallelism, especially when working with longer contexts. To address this challenge, we propose Constant Softmax (ConSmax), a software-hardware co-design that serves as an efficient alternative to Softmax. ConSmax utilizes differentiable normalization parameters to eliminate the need for maximum searching and denominator summation in Softmax. This approach enables extensive parallelization while still executing the essential functions of Softmax. Moreover, a scalable ConSmax hardware design with a bitwidth-split look-up table (LUT) can achieve lossless non-linear operations and support mixed-precision computing. Experimental results show that ConSmax achieves a minuscule power consumption of 0.2mW and an area of 0.0008mm2 at 1250MHz working frequency in 16nm FinFET technology. For open-source contribution, we further implement our design with the OpenROAD toolchain under SkyWater’s 130nm CMOS technology. The corresponding power is 2.69mW and the area is 0.007mm2. ConSmax achieves 3.35× power savings and 2.75× area savings in 16nm technology, and 3.15× power savings and 4.14× area savings with the open-source EDA toolchain. In the meantime, it also maintains comparable accuracy on the GPT-2 model and the WikiText103 dataset. The project is available at https://***/ReaLLMASIC/ConSmax. © 2024 Copyright is held by the owner/author(s).

关键词： Table lookup

来源：评论

学校读者我要写书评

暂无评论

FSMM: An Efficient Matrix Multiplication Accelerator Supporting Flexible Sparsity 24

FSMM: An Efficient Matrix Multiplication Accelerator Support...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Qiao, Yuxuan Yang, Fan Zhang, Yecheng Xiong, Xiankui Yao, Xiao Yao, Haidong State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai China School of Microelectronics Fudan University Shanghai China State Key Laboratory of Mobile Network and Mobile Multimedia Technology ZTE Corporation Shenzhen China

ISBN: (纸本)9798400710773

Sparse matrix multiplication is a critical operation in deep learning. However, matrix sparsity leads to irregular data flow, which would degrade the efficiency of matrix multiplication. Traditional accelerators, equipped with additional hardware units to address this issue, often experience the issue of low hardware utilization. Furthermore, N : M structured sparsity and corresponding hardware architectures face challenges such as accuracy degradation, limited flexibility, and restricted applicability. In this paper, we propose a Flexible Sparse Matrix Multiplication Accelerator (FSMM), which can improve the efficiency of sparse matrix multiplication through both algorithmic-level and hardware-level optimizations. At the algorithmic level, we propose the matrix-matrix multiplication with block-level outer production and fine-grained matrix reordering algorithm. The algorithm balances the sparsity of each column of a matrix block, which improves matrix compression, balances the load, and speeds up computation. This algorithm reduces storage by 8.2% ~ 85.9%. At the hardware-level, we introduce a flexible architecture for matrix multiplication. It selects the most suitable data path to complete matrix multiplication based on the sparsity of the reordered matrix. FSMM achieves a speedup of 1.90× ~ 16.18× over Systolic Array and 1.70× ~ 2.87× over the existing TSTC approach. © 2024 Copyright is held by the owner/author(s).

关键词： Fast response computer systems

来源：评论

学校读者我要写书评

暂无评论

BPINN-EM: Fast Stochastic Analysis of Electromigration Damage using Bayesian Physics-Informed Neural Networks 24

BPINN-EM: Fast Stochastic Analysis of Electromigration Damag...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Lamichhane, Subed Kavousi, Mohamadamir Tan, Sheldon X.-D. Department of Electrical and Computer Engineering University of California RiversideCA92521 United States

ISBN: (纸本)9798400710773

Electromigration (EM) induced aging and degradation in interconnect wires is inherently a stochastic process, with lifetime typically measured in terms of mean time to failure at both wire and circuit levels. However, existing approaches still incur high computing costs, as computing both means and variances is generally expensive. In this work, we propose a novel fast variational analysis framework to tackle the challenges of stochastic estimation of EM stress evolution in multi-segment interconnect wires. We utilize Bayesian networks in conjunction with the recently introduced hierarchical (two-step) physics-informed neural networks (PINN). The resulting method, termed BPINN-EM, enables rapid variational stress analysis of metal wires by leveraging the robust uncertainty quantification capability of Bayesian networks with expedited training over small dataset. Moreover, we devise BPINN-EM to incorporate Bayesian networks only in the first stage of the hierarchical PINN, thereby circumventing the need for sampling across the entire PINN level during training and significantly reducing training costs. Our results on several general multi-segment interconnect structure demonstrate that the proposed BPINN-EM approach is much more efficient than conventional baselines and state-of-the-art algorithms. Compared to a Monte Carlo simulator implemented in COMSOL, BPINN-EM offers a 240× speedup. Moreover, compared to the recently proposed EMSpice simulated by the Monte Carlo method, the new method provides more than an 85× speedup with almost no loss of accuracy. © 2024 Copyright is held by the owner/author(s).

关键词： Monte Carlo methods

来源：评论

学校读者我要写书评

暂无评论

ALISA: An Adaptive Learned Index Structure for Spatial Data on Solid-State Drives 24

ALISA: An Adaptive Learned Index Structure for Spatial Data ...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Lin, Che-Wei Wu, Chun-Feng Department of Computer Science National Yang Ming Chiao Tung University Taiwan

ISBN: (纸本)9798400710773

Spatial learned index is becoming popular as a solution to relieve the intense storage demands and high I/O costs of spatial databases. LISA, the original and most prominent spatial learned index structure, is tailored for HDD-resident spatial data and comes with strict data arrangement requirements. Given that direct SSD migration may drastically impair SSD durability especially when page utilization is low, this work aims to adapt this innovative index structure to SSDs to leverage the faster performance and expand application possibilities. We propose an Adaptive Learned Index structure for Spatial dAta on SSDs (ALISA), with mechanisms to persistently monitor updated data distribution and adaptively restructure to align with SSD access characteristics. The evaluation results show that ALISA can significantly extend SSD lifespan and improve low page utilization, thereby enhancing query performance. © 2024 Copyright is held by the owner/author(s).

关键词： Dynamic random access storage

来源：评论

学校读者我要写书评

暂无评论

Hardware-Aware Quantization for Accurate Memristor-Based Neural Networks 24

Hardware-Aware Quantization for Accurate Memristor-Based Neu...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Diware, Sumit Yaldagard, Mohammad Amin Bishnoi, Rajendra Computer Engineering Lab Delft University of Technology Delft Netherlands

ISBN: (纸本)9798400710773

Memristor-based Computation-In-Memory (CIM) has emerged as a compelling paradigm for designing energy-efficient neural network hardware. However, memristors suffer from conductance variation issue, which introduces computational errors in CIM hardware and leads to a degraded inference accuracy. In this paper, we present a hardware-aware quantization to mitigate the impact of conductance variation on CIM-based neural networks. We achieve this using the inherent characteristics of fixed-point arithmetic in CIM hardware. By tuning the bit-precision of weights, we align the conductance variation-induced errors with lower-order output bits. This reduces their numerical impact on the fixed-point output. We further decrease the residual errors by selectively discarding bits with low information and high error. This leads to error-free computations and a high inference accuracy. Our proposed methodology achieves 5.6× correct operations per unit energy compared to the conventional approach, while incurring very low hardware overheads. © 2024 Copyright is held by the owner/author(s).

关键词： Fixed point arithmetic

来源：评论

学校读者我要写书评

暂无评论

Joint Placement Optimization for Hierarchical Analog/Mixed-Signal Circuits 24

Joint Placement Optimization for Hierarchical Analog/Mixed-S...

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Gao, Xiaohan Zhang, Haoyi Liu, Bingyang Lin, Yibo Wang, Runsheng Huang, Ru School of Computer Science Peking University China School of Integrated Circuits Peking University China Institute of EDA Peking University China School of EECS Peking University China Beijing Advanced Innovation Center for Integrated Circuits China

ISBN: (纸本)9798400710773

The performance of Analog/Mixed Signal (AMS) circuits is highly dependent on the meticulous layout implementation. To meet performance and area requirements, real-world AMS layout design is thoroughly optimized to consider circuit hierarchy and a multitude of factors, such as system signal flow and regularity. Circuit hierarchy and these factors impose complicated constraints, which challenge layout design flow. In this paper, we propose a systematic AMS placement framework to address the challenges through joint optimization. We implement our framework in a unified and highly extensible workflow and validate our framework with broad types of real-world AMS circuits. Experiments show that our framework achieves promising results in both efficiency and quality. © 2024 Copyright is held by the owner/author(s).

关键词： Timing circuits

来源：评论

学校读者我要写书评

暂无评论

Spiking Transformer Hardware Accelerators in 3D Integration 24

Spiking Transformer Hardware Accelerators in 3D Integration

引用

43rd international conference on computer-aided Design, ICCAD 2024

作者： Xu, Boxun Hwang, Junyoung Vanna-Iampikul, Pruek Lim, Sung Kyu Li, Peng Department of Electrical and Computer Engineering University of California Santa BarbaraCA United States Department of Electrical and Computer Engineering Georgia Institute of Technology GA United States Department of Electrical Engineering Burapha University Chonburi Thailand

ISBN: (纸本)9798400710773

Spiking neural networks (SNNs) are powerful models of spatiotemporal computation and are well suited for deployment on resource-constrained edge devices and neuromorphic hardware due to their low power consumption. Leveraging attention mechanisms similar to those found in their artificial neural network counterparts, recently emerged spiking transformers have showcased promising performance and efficiency by capitalizing on the binary nature of spiking operations. Recognizing the current lack of dedicated hardware support for spiking transformers, this paper presents the first work on 3D spiking transformer hardware architecture and design methodology. We present an architecture and physical design co-optimization approach tailored specifically for spiking transformers. Through memory-on-logic and logic-on-logic stacking enabled by 3D integration, we demonstrate significant energy and delay improvements compared to conventional 2D CMOS integration. © 2024 Copyright is held by the owner/author(s).

关键词： CMOS integrated circuits

来源：评论

学校读者我要写书评

暂无评论

Invited Paper: Learned In-Sensor Visual Computing: From Compression to Eventification 42

Invited Paper: Learned In-Sensor Visual Computing: From Comp...

引用

42nd ieee/acm international conference on computer-aided Design, ICCAD 2023

作者： Feng, Yu Ma, Tianrui Boloor, Adith Zhu, Yuhao Zhang, Xuan University of Rochester Department of Computer Science United States Washington University Department of Electrical and Systems Engineering St. Louis United States

ISBN: (纸本)9798350315592

Visual computing is vital for numerous applications. In conventional visual computing systems, CMOS image sensors (CIS) act as pure imaging devices for capturing images, however, recent CIS designs increasingly integrate processing capabilities such as Deep Neural Networks (DNN), which give rise to a notion of in-sensor computing. In this paper, we propose a new concept, learned in-sensor visual computing, which exploits end-to-end optimization of in-sensor processing and downstream vision tasks to achieve better overall algorithm accuracy and adopts hardware/algorithm co-design to achieve ultra-low sensor energy consumption. Two examples of the learned in-sensor visual computing, Leca and EDGAzE, are demonstrated. © 2023 ieee.

关键词： Deep neural networks

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共89页 << < 1 2 3 4 5 6 7 8 9 10 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：