The proceedings contain 135 papers from the ICCAD - 2004 - ieee/acminternationalconference on computer-aided Design, digest of Technical Papers. The topics discussed include: statistical design and optimization of S...
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The proceedings contain 135 papers from the ICCAD - 2004 - ieee/acminternationalconference on computer-aided Design, digest of Technical Papers. The topics discussed include: statistical design and optimization of SRAM cell for yield enhancement;DAG-aware circuit compression for formal verification;dynamic transition relation simplification for bounded property checking;fast simulation of VLSI interconnects;a soft error rate analysis (SERA) methodology;the care and feeding of your statistical static timer;a robust cell-level crosstalk delay change analysis;delay noise pessimism reduction by logic correlations;debugging sequential circuits using Boolean satisfiability;and towards formal verification of analog designs.
The proceedings contain 133 papers. The topics discussed include: latest advancements to the industry-leading EPDA design flow for silicon photonics;enabling secure in-memory neural network computing by sparse fast gr...
ISBN:
(纸本)9781728123509
The proceedings contain 133 papers. The topics discussed include: latest advancements to the industry-leading EPDA design flow for silicon photonics;enabling secure in-memory neural network computing by sparse fast gradient encryption;clock gating synthesis of netlist with cyclic logic paths;clock gating synthesis of netlist with cyclic logic paths;design technology for scalable and robust photonic integrated circuits;and PABO: pseudo agent-based multi-objective Bayesian hyperparameter optimization for efficient neural accelerator design.
The proceedings contains 99 papers from the internationalconference on computeraided Design. Topics discussed include: static scheduling of multi-domain memories for functional verification;verification of shared me...
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The proceedings contains 99 papers from the internationalconference on computeraided Design. Topics discussed include: static scheduling of multi-domain memories for functional verification;verification of shared memory;predicting the performance of synchronous discrete event simulation systems;system-level exploration and design;analysis of substrate thermal gradient effects on optimal buffer insertion;bus encoding to prevent crosstalk delay;behavioral modeling of analog circuits by wavelet collacation method;simulation-based automatic generation of signomial;and compiler techniques in system level design.
The proceedings contain 93 papers. The topics discussed include: physical planning with retiming;corner block list: an effective and efficient topological representation of non-slicing floorplan;modeling non-slicing f...
ISBN:
(纸本)0780364457
The proceedings contain 93 papers. The topics discussed include: physical planning with retiming;corner block list: an effective and efficient topological representation of non-slicing floorplan;modeling non-slicing floorplans with binary trees;event driven simulation without loops or conditionals;observability analysis of embedded software for coverage-directed validation;a methodology for verifying memory access protocols in behavioral synthesis;symbolic debugging scheme for optimized hardware and software;automated data dependency size estimation with a partially fixed execution ordering;effects of global interconnect optimizations on performance estimation of deep submicron design;impact of systematic spatial intra-chip gate length variability on performance of high-speed digital circuits;and miller factor for gate-level coupling delay calculation.
The proceedings contain 134 papers. The topics discussed include: a fast thermal-aware fixed-outline floorplanning methodology based on analytical models;analytical solution of Poisson's equation and its applicati...
ISBN:
(纸本)9781450359504
The proceedings contain 134 papers. The topics discussed include: a fast thermal-aware fixed-outline floorplanning methodology based on analytical models;analytical solution of Poisson's equation and its application to VLSI global placement;novel proximal group ADMM for placement considering fogging and proximity effects;towards provably-secure analog and mixed-signal locking against overproduction;efficient hardware acceleration of CNNs using logarithmic data representation with arbitrary log-base;scalable-effort ConvNets for multilevel classification;emerging reconfigurable nanotechnologies: can they support future electronics?;emerging reconfigurable nanotechnologies: can they support future electronics?;macro-aware row-style power delivery network design for better routability;assured deep learning: practical defense against adversarial attacks;and Tetris: re-architecting convolutional neural network computation for machine learning accelerators.
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