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high voltage silicon carbide Junction Barrier Schottky rectifiers

High voltage silicon carbide Junction Barrier Schottky recti...

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Zetterling, Carl-Mikael Dahlquist, Fanny Lundberg, Nils Ostling, Mikael Rottner, Kurt Ramberg, Lennart Royal Inst of Technology Stockholm Sweden

The Junction Barrier Schottky (JBS) diode has the advantage of a low forward voltage drop comparable to that of Schottky diodes, as well as a high blocking voltage and low reverse leakage current of a pn diode. This device, originally demonstrated in silicon technology, is especially attractive for wide bandgap materials such as silicon carbide (SiC) in which pn diodes have a large forward voltage drop. Two different JBS designs in 6H SiC have been fabricated, and the electrical characteristics have been compared to Schottky and pn diodes on the same wafer. Although the ion implanted pn diodes had remaining implant damage, the JBS diodes worked well. The JBS diodes were capable of blocking up to 1100 V with a leakage current density of 0.15 A/cm2, limited by the leakage when the drift region was fully depleted, or breakdown of the SiC material itself. The forward conduction was limited by an on-resistance of 20 mΩcm2.

关键词： Solid state rectifiers

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high speed double heterojunction InP based HBT's

High speed double heterojunction InP based HBT's

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ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Burm, J Malik, RJ Kopf, RF Hamm, RA Ryan, RW Tate, A Tsai, HS Chen, YK AT&T Bell Labs Lucent Technol Murray Hill NJ 07974 USA

ISBN: (纸本)0780339703

InP based HBT's for circuit applications were fabricated on MOMBE grown HBT layers. The layer structure included an InP emitter, InGaAs base, and InP collector. A C-doped base was employed for excellent device stability. The emitter-base and base-collector heterojunctions were both graded with InGaAsP layers for better electrical characteristics. An emitter-base self-aligned process was employed with dry etch and wet chemical etch mesa isolations. For base contacts, Pd/Zn/Pt/Au ohmic contacts were placed on top of the InGaAsP graded layer between the emitter and base, and made to diffuse into the base layer using rapid thermal annealing. This method produces an emitter-base junction buried under the InGaAsP graded layer and helps increase device reliability and life time. The device showed about 3 % degradation in DC characteristics when stressed at a collector current density (J(c)) of 100 kA/cm(2) and collector bias of 2 V at room temperature for 360 hours. Typical common emitter current gain was 40. f(t) of 78 GHz and f(max) of 129 GHz were achieved for 3x5 mu m(2) emitter size devices. Maximum f(t) was achieved at 70 kA/cm(2) collector current density and 2.25 V collector bias. f(t) decreased to 70 GHz at 130 kA/cm(2) collector current density. f(max) decreased for longer emitter size devices (3x10 and 3x15 mu m(2)) while f(t) maintained comparable values.

关键词： InGaAsP emitters Indium phosphide collector current Dry etching direct current characteristics BASE COURSE Current gain Heterojunctions ACTIVE LIFE Lamellar structures

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Massively parallel reverse modeling approach for semiconductor devices and circuits

Massively parallel reverse modeling approach for semiconduct...

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Wu, Shuichi Vai, Mankuan Northeastern Univ Boston United States

We have developed a bi-directional neural network as a massively parallel computing architecture for the design of semiconductor devices and circuits. We call this operation reverse modeling since the neural network trained to model a circuit is used in a reverse direction. A feedforward neural network can be used to model the behavior of a system. It can quickly predict the system response of given input parameters. We have extended the applications of neural networks beyond their traditional roles of black box models. Our approach begins with a neural network trained to model the response of the circuit to design parameters. The reverse modeling is then carried out by applying a modified backpropagation learning rule to the trained network. This changes the multi-layer, feedforward neural network from a uni-directional model into a bi-directional model. In the forward direction, the neural network model predicts the circuit property from given design parameters. In the reverse direction, design parameters are synthesized from desired circuit properties. We have demonstrated this reverse modeling approach by designing an RF amplifier. A neural network was trained to model the relations between the matching circuit elements of the amplifier and its output characteristics (output power and power gain). The result model has an average error of 1.7%. The trained model was then used to synthesize matching circuits for 10 sets of desired output characteristics. The neural network synthesized circuits were simulated using LIBRA to verify their performance. The simulated circuit performance was, in average, within 2.6% of the desired characteristics.

关键词： semiconductor device models

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Electrochemical study of electroless Co-W-P alloy deposition

Electrochemical study of electroless Co-W-P alloy deposition

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Kim, Y.S. Lopatin, S. Shacham-Diamand, Y. Cornell Univ Ithaca NY United States

The electrochemical mechanism of electroless Co-W-P deposition, in a chloride based solution, with hypophosphite as reducing agent using polarization measurements was studied. The overall mechanism and transfer coefficient of Co-W-P electroless plating was determined by the technique based on the application of the mixed potential theory to rotating disk electrode. The partial anodic polarization and partial cathodic polarization curves at various pH and various compositions of metal ions and reducing agent show that the Co-W-P electroless deposition reaction still follows the mixed potential theory even in a 3-component system. This electrochemical experiment also describes that the reaction rate determining step is the oxidation reaction of hypophosphite under normal operating condition. The conclusion of this experiment is that the electroless Co-W-P deposition can be explained by the mixed potential theory as a combination of oxidation of hypophosphite and the reduction of Co W and P complex ions. The deposition rate is higher at higher pH and higher concentration of hypophosphite. Results of this study were used for a high quality Co-W-P thin film deposition for barrier formation in 0.25 μm ULSI technology.

关键词： Cobalt alloys

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Proposed TeraHertz transistor using a Compliant Universal substrate

Proposed TeraHertz transistor using a Compliant Universal su...

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Martin, Glenn H. Pereiaslavets, Boris Foutz, Brian Eastman, Lester F. Cornell Univ Ithaca NY United States

A TeraHertz transistor becomes feasible by using a twist-bonded Compliant Universal (CU) substrate with stress compensation in a modulation doped field effect transistor. A GaAs twist-bonded CU-substrate with an effective lattice constant of 5.95 angstroms, allows a 100 angstroms compressively strained InAs quantum well to be epitaxial grown between two tensilely strained layers of Al0.55In0.45As without exceeding the overall critical layer thickness. By confining the two dimensional electron gas to the pseudomorphic InAs quantum well with proper design techniques the alloy scattering will be eliminated and the carriers will be limited to only n = 1 states with room temperature low field mobilities of >25,000 cm2/V-sec. By using a simple analytical model for a double-doped double-strained modulation doped field effect transistor two dimensional electron gas densities of >3.5×1012 cm-2 are predicted. These values will ensue a channel resistance of 4×107 cm/sec and with a sub-0.1 μm gate a frequency response greater than a TeraHertz.

关键词： Field effect transistors

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Negative photoconduction in fully fabricated InP based HEMTs

Negative photoconduction in fully fabricated InP based HEMTs

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Schuermeyer, Fritz Hur, Katerina Y. Shur, Michael Wright Lab Wright Patterson AFB OH United States

We studied the photocurrents in InP-based HEMTs as a function of bias voltages and photon energy. The devices had excellent electrical characteristics. In the deep subthreshold regime the drain current stems from the gate current. In this region, the photo-drain-current also is caused by the photo-gate current, as evidenced by its magnitude and spectral characteristics. In the subthreshold regime, the photocurrent rises rapidly at a photoenergy of approximately 0.7 eV (which corresponds to the energy gap of the InGaAs channel). Spectral analysis indicates that the response stems from a multitude of transitions. In this regime, transitions to the first electron subband are dominating. When the device is strongly turned on, this dominance disappears. At small drain voltages (i.e. in the linear region) the photoconduction behavior is similar to that observed in GaAs based HEMTs. The transistor amplifies the photogenerated charge due to hole storage in the channel. In the saturation regime we observe a drastically different behavior: The photocurrent is negative. In this case, the drain current becomes smaller when the device is illuminated. We also observe a pronounced change in spectral response in this region. We explain this effect by storage of electrons rather than of holes.

关键词： high electron mobility transistors

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Design, fabrication and evaluation of deep submicron FET's

Design, fabrication and evaluation of deep submicron FET's

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ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Abbott-Morse, T Brock, T East, J Haddad, G Univ Michigan Ctr High Frequency Microelect Solid State Elect Lab Ann Arbor MI 48109 USA

ISBN: (纸本)0780339703

GaAs FET's with gatelengths on a nanometer scale have been designed, fabricated and evaluated in order to investigate the limits of conventional GaAs scaling rules.(1) An optimum layer structure for deep submicron GaAs MESFET's was designed, and a fabrication process that minimizes the effects of extrinsic parasitics was developed. The fabricated FET's were measured and evaluated at DC and at RF frequencies. 0.1 mu m and 50 nm gatelength GaAs MESFET's with 2x45 mu m wide 'T'-shaped gates were fabricated so that a wide range of saturation current was achieved. For the 0.1 mu m gatelength FET's, peak g(m,ext) varies from 611 mS/mm to 795 mS/mm with an average value of 717 mS/mm, peak f(t) varies from 90 GHz to 103 GHz with an average value of 96 GHz, and peak f(max) varies from 147 GHz to 172 GHz with an average value of 161 GHz. In comparison, the peak g(m,ext) of the 50 nm gatelength FET's is reduced by almost 20%, the peak f(t) is increased by 30%, and the peak f(max) is about the same as for the 0.1 mu m gatelength FET's. The f(t) of the 50 nm gatelength FET's is higher than the f(t) of the 0.1 mu m gatelength FET's because of the reduced gate-source capacitance (C-gs). The peak f(max) does not show a similar improvement because of the onset of short channel effects.

关键词： Field effect transistors mean value Channel Effect Fabrication process nanoscale Chrysanthemum morifolium radiofrequency gallium arsenides GaAs FET MESFETs

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On the intrinsic spacer layer in Si/SiGe heterojunction bipolar transistor grown by ultra high vacuum chemical vapor deposition

On the intrinsic spacer layer in Si/SiGe heterojunction bipo...

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Proceedings of the 1997 ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Zhang, Jinshu Jin, Xlaojun Chen, Peiyi Tsien, Pei-Hsin Lo, Tai-Chin Tsinghua Univ Beijing China

In this paper, we report the study on the intrinsic SiGe spacer layer in Si/SiGe HBT and a novel phenomenon in Si/SiGe HBT layer structure grown by ultra high vacuum chemical vapor deposition (UHVCVD) using Si2H6 and GeH4. When intrinsic SiGe spacer layer width decreases from 100 A to 75 A, the BC junction turn-on voltage decreases from approximately 0.6 V to approximately 0.2 V, while the BE junction turn-on voltage remains approximately 0.6 V. As a result, the offset voltage of the HBT operated at common emitter configuration increases from nearly zero to approximately 0.4 V. Therefore, 100 A is used as the intrinsic SiGe spacer layer width. Furthermore, the Si/SiGe HBT layer structures with different SiGe spacer layer widths grown by UHVCVD were investigated by cross-sectional transmission electron microscopy (XTEM). It is shown that a Ge-rich very thin layer exists in the strained SiGe layer grown on Si, which is in parallel with the interface of SiGe and Si. When the SiGe spacer layer width decreases from 100 A to 75 A, the Ge-rich thin layer moves closer to the interface of SiGe base and Si collector, and makes the BC junction turn-on voltage decrease, the offset voltage of HBT, therefore, increases.

关键词： Heterojunction bipolar transistors

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high frequency SiGe heterostructure devices

High frequency SiGe heterostructure devices

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ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Konig Gruhle Daimler Benz Aerospace Ulm Germany

Only in recent years have SiGe/Si heterodevices entered the semiconductor world. In particular, the SiGe heterojunction bipolar transistor (SiGe HBT) has demonstrated a record f/sub max/ value of 160 GHz. The SiGe heterojunction field effect transistor (SiGe HFET) is presently catching up in performance with a reported speed of 92 GHz. This paper reviews device and circuit results focusing on cut-off frequencies, delays, noise and power. An important issue is the compatibility to the dominating silicon technology which opens perspectives for new generations of high volume and low cost microelectronic components.

关键词： Germanium alloys

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high speed diamond DUV-detector

High speed diamond DUV-detector

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ieee/cornell conference on advanced concepts in high speed semiconductor devices and circuits

作者： Gluche Kohn Binder Adamschik Ebert Vescan Rohrer Nebel Department of Electron Devices and Circuits University of Ulm (EBS) Ulm Germany Walter Schottky Institute Technology University of Munich Garching Germany

Two material systems compete for detector applications in the DUV range, namely GaN and diamond. Whereas GaN with a direct bandgap is intensively studied for light emitting structures, diamond with an indirect bandgap has a long background as particle and X-ray detector. In this study, a diamond DUV-detector based on a MSM structure has been fabricated and characterized. Efficiency, speed and blindness to visible light have been investigated. A charge collection efficiency of approx. 100% at high electric field strength and an ultra fast response (FWHM <4 ns) could be demonstrated.

关键词： Diamond

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