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检索条件"任意字段=IEEE 27th International Symposium on Computer Architecture and High Performance Computing"

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Orchestration and Monitoring in Fog computing for Personal Edge Cloud Service Support 24

Orchestration and Monitoring in Fog Computing for Personal E...

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24th ieee international symposium on Local and Metropolitan Area Networks (ieee LANMAN)

作者： Wamser, Florian Lombardo, Chiara Vassilakis, Constantinos Dinh-Xuan, Lam Lago, Paolo Bruschi, Roberto Tran-Gia, Phuoc Univ Wurzburg Inst Comp Sci Wurzburg Germany CNIT Genoa Res Unit Genoa Italy Ubitech Ltd Res Dept Athens Greece

ISBN: (纸本)9781538645338

To effectively support new cloud services and smart device accessibility, current Internet design must move away from its typical TCP/IP-based architecture and evolve towards new paradigms characterized by high degrees of freedom. In particular, Network Functions Virtualization and Software-Defined Networking have proven to be appropriate approaches to introducing edge-programmability. In this article we give an overview over the fog computing-architecture approach INPUT (In-Network Programmability for the next generation of Personal CloUd Service SupporT) with its implementation OpenVolcano, which uses the above approaches to promote future personal Internet cloud services at the network edge. Specifically, it enables computing and storage capabilities for edge network devices, provides a simple, private, programmable SDN-based Ethernet domain for end users and edge cloud services, IaaS and PaaS support with tight delay and performance constraints through templates. the focus of this work is on multi-service orchestration and monitoring, which is an essential core of any edge computing architecture.

关键词： Monitoring Cloud computing Servers computer architecture Resource management Quality of experience Task analysis

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Dynamic Checkpoint architecture for Reliability Improvement on Distributed Frameworks 37

Dynamic Checkpoint Architecture for Reliability Improvement ...

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37th ieee international symposium on Reliable Distributed Systems (SRDS)

作者： Cardoso, Paulo Vinicius Barcelos, Patricia Pitthan Univ Fed Santa Maria Post Grad Program Comp Sci Santa Maria RS Brazil Univ Fed Santa Maria Comp Syst Lab Santa Maria RS Brazil

ISBN: (纸本)9781538683019

Fault tolerant mechanisms are essential to provide reliable feature for distributed systems. Checkpoint and Recovery is a widely used technique that consists on saving data states for a fast recovery in case of failure. On Apache Hadoop and Apache Spark - distributed high performance frameworks -, checkpoint aims to help on recovery steps after failures. However, wrong configuration of checkpoint attributes can degrade system performance and reliability, thus losing checkpoint purpose. this work proposes a dynamic architecture for checkpoint based on system monitoring and alerts. In order to avoid checkpoint problems on Hadoop and Spark, one implementation of dynamic mechanism is defined for each framework.

关键词： Sparks Monitoring Cluster computing computer architecture Fault tolerance Fault tolerant systems

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high performance Dynamic Communication on Reconfigurable Clusters (extended abstract) 26

High Performance Dynamic Communication on Reconfigurable Clu...

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26th ieee Annual international symposium on Field-Programmable Custom computing Machines (FCCM)

作者： Sheng, Jiayi Yang, Chen Wang, Tianqi Herbordt, Martin C. Boston Univ Dept Elect & Comp Engn Boston MA 02215 USA Univ Sci & Technol China Dept Phys Hefei Anhui Peoples R China

ISBN: (纸本)9781538655221

FPGA clusters with the FPGAs directly linked through their Multi-Gigabit Transceiver (MGT) ports have a proven advantage over other commodity architectures for communication-bound applications. We find that the standard wormhole routers need some modification to be appropriate for clusters with tightly coupled FPGAs, and create such a router. We generalize this router so that it is parameterized by several parameters including routing algorithm, arbitration policy, virtual channels, and buffers. We have evaluated these designs with respect to a number standard communication patterns and packet sizes. these results enable selection of the appropriate router for any resource budget. Finally, We find that the optimality of the router design varies significantly with workload. We observe that for a 512 FPGA cluster, connected in an 8(3) torus, compared with the router configuration with the best average performance, application-aware router configurations reduce average batch latency by 3%, improve the throughput by 6% on average, and improve area consumption by 50%.

关键词： Field programmable gate arrays Switches Standards Routing computer architecture three-dimensional displays Physics"

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Lazy Persistency: a high-Performing and Write-Efficient Software Persistency Technique 18

Lazy Persistency: a High-Performing and Write-Efficient Soft...

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45th ACM/ieee Annual international symposium on computer architecture (ISCA)

作者： Alshboul, Mohammad Tuck, James Solihin, Yan North Carolina State Univ Dept Elect & Comp Engn Raleigh NC 27695 USA

ISBN: (纸本)9781538659847

Emerging Non-Volatile Memories (NVMs) are expected to be included in future main memory, providing the opportunity to host important data persistently in main memory. However, achieving persistency requires that programs be written with failure-safety in mind. Many persistency models and techniques have been proposed to help the programmer reason about failure-safety. they require that the programmer eagerly flush data out of caches to make it persistent. Eager persistency comes with a large overhead because it adds many instructions to the program for flushing cache lines and incurs costly stalls at barriers to wait for data to become durable. To reduce these overheads, we propose Lazy Persistency (LP), a software persistency technique that allows caches to slowly send dirty blocks to the NVMM through natural evictions. With LP, there are no additional writes to NVMM, no decrease in write endurance, and no performance degradation from cache line flushes and barriers. Persistency failures are discovered using software error detection (checksum), and the system recovers from them by recomputing inconsistent results. We describe the properties and design of LP and demonstrate how it can be applied to loop-based kernels popularly used in scientific computing. We evaluate LP and compare it to the state-of-the-art Eager Persistency technique from prior work. Compared to it, LP reduces the execution time and write amplification overheads from 9% and 21% to only 1% and 3%, respectively.

关键词： Emerging Memory Technology Memory Systems Multi-core and Parallel architectures

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Blocking Optimization Techniques for Sparse Tensor Computation 32

Blocking Optimization Techniques for Sparse Tensor Computati...

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27th international Heterogeneity in computing Workshop in conjunction with 32nd ieee international Parallel and Distributed Processing symposium (IPDPS)

作者： Choi, Jee W. Liu, Xing Smith, Shaden Simon, Tyler IBM TJ Watson Res Ctr Yorktown Hts NY 10598 USA Intel Corp Parallel Comp Lab Santa Clara CA USA Univ Minnesota Minneapolis MN USA Univ Maryland Baltimore MD 21201 USA

ISBN: (纸本)9781538643686

We present a detailed analysis of the sparse matricized tensor times Khatri-Rao product (MTTKRP) kernel that is the key bottleneck in various sparse tensor computations. By using the well-known roofline model and carefully instrumenting the state-of-the-art MTTKRP code with the pressure point analysis technique, we show that the performance of MTTKRP is highly sensitive to data traffic like other sparse computations. We also identify key performance bottlenecks that diverge from our prior knowledge of sparse MTTKRP on modern processors. We propose to use blocking optimization techniques to address the bottlenecks identified within the MTTKRP computation. By using a combination of two blocking techniques, we achieve more than 3.5x and 2.0x speedup over the state-of-the-art MTTKRP implementation in the SPLATT library on four real-world data sets and two synthetically generated data sets, respectively. We also employ a new data partitioning technique for the distributed MTTKRP implementation, which provides an additional dimension of scalability. As a result, our implementation exhibits good strong scaling and a 1.6x speedup on 64 nodes for two real-world data sets, when compared to the SPLATT library.

关键词： tensor decomposition canonical polyadic MPI distributed high-performance computing MTTKRP

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Interference-aware virtual machine placement in cloud computing system approach based on fuzzy formal concepts analysis 27

Interference-aware virtual machine placement in cloud comput...

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27th ieee international Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, WETICE 2018

作者： Ben Slama, Wafa Brahmi, Zaki Gammoudi, Mohamed Mohsen Higher Institute of Computer and Communication Techniques ISITCOM Hammam Sousse Tunisia Mahdia Tunisia Taibah University Ksa Saudi Arabia RIADI-GD Laboratory Higher Institute of Arts and Multimedia ISAMM Manouba University Manouba Tunisia

ISBN: (纸本)9781538669167

Cloud computing is a model that allows users to rent the services they want, in real time, and pay as they go. thanks to virtualization, Cloud infrastructure exploitation will be easier and smoother because it offers many benefits to data center administrators and end users. the main goal of virtualization is to share the infrastructure between users with high isolation level, and to take advantages of their physical resources as much as possible. Fault of isolation, Cloud hypervisor doesn't have a great vision on the sharing and management of resources between virtual machines, hence a contention on shared resources will take place, it identifies by performance interference. In this paper, we study the effects of performance interference between Co-located VMs, we try to grasp the VMs that does not produce a lot of performance degradation based on the fuzzy formal concepts analysis(FFCA), with the aim of proposing a new virtual machine placement approach that first minimizes performance interference and communication costs, second maximizes and balances the use of cloud resources. © 2018 ieee.

关键词： Virtualization

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FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud 18

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simul...

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45th ACM/ieee Annual international symposium on computer architecture (ISCA)

作者： Karandikar, Sagar Mao, Howard Kim, Donggyu Biancolin, David Amid, Alon Lee, Dayeol Pemberton, Nathan Amaro, Emmanuel Schmidt, Colin Chopra, Aditya Huang, Qijing Kovacs, Kyle Nikolic, Borivoje Katz, Randy Bachrach, Jonathan Asanovic, Krste Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA

ISBN: (纸本)9781538659847

We present FireSim, an open-source simulation platform that enables cycle-exact microarchitectural simulation of large scale-out clusters by combining FPGA-accelerated simulation of silicon-proven RTL designs with a scalable, distributed network simulation. Unlike prior FPGA-accelerated simulation tools, FireSim runs on Amazon EC2 Fl, a public cloud FPGA platform, which greatly improves usability, provides elasticity, and lowers the cost of large-scale FPGA-based experiments. We describe the design and implementation of FireSim and show how it can provide sufficient performance to run modern applications at scale, to enable true hardware-software co-design. As an example, we demonstrate automatically generating and deploying a target cluster of 1,024 3.2 GHz quad-core server nodes, each with 16 GB of DRAM, interconnected by a 200 Gbit/s network with 2 microsecond latency, which simulates at a 3.4 MHz processor clock rate (less than 1,000x slowdown over real-time). In aggregate, this FireSim instantiation simulates 4,096 cores and 16 TB of memory, runs-14 billion instructions per second, and harnesses 12.8 million dollars worth of FPGAs at a total cost of only 1100 per simulation hour to the user. We present several examples to show how FireSim can be used to explore various research directions in warehouse-scale machine design, including modeling networks with high-bandwidth and low-latency, integrating arbitrary RTL designs for a variety of commodity and specialized datacenter nodes, and modeling a variety of datacenter organizations, as well as reusing the scale-out FireSim infrastructure to enable fast, massively parallel cycle-exact single-node microarchitectural experimentation.

关键词： Data centers computer simulation Field programmable gate arrays computer networks Distributed computing performance analysis Scalability computer architecture

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RoboX: An End-to-End Solution to Accelerate Autonomous Control in Robotics 18

<i>RoboX</i>: An End-to-End Solution to Accelerate Autonomou...

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45th ACM/ieee Annual international symposium on computer architecture (ISCA)

作者： Sacks, Jacob Mahajan, Divya Lawson, Richard C. Esmaeilzadeh, Hadi Georgia Inst Technol Alternat Comp Technol ACT Lab Atlanta GA 30332 USA Univ Calif San Diego Alternat Comp Technol ACT Lab La Jolla CA 92093 USA

ISBN: (纸本)9781538659847

Novel algorithmic advances have paved the way for robotics to transform the dynamics of many social and enterprise applications. To achieve true autonomy, robots need to continuously process and interact with their environment through computationally-intensive motion planning and control algorithms under a low power budget. Specialized architectures offer a potent choice to provide low-power, high-performance accelerators for these algorithms. Instead of taking a traditional route which profiles and maps hot code regions to accelerators, this paper delves into the algorithmic characteristics of the application domain. We observe that many motion planning and control algorithms are formulated as a constrained optimization problems solved online through Model Predictive Control (MPC). While models and objective functions differ between robotic systems and tasks, the structure of the optimization problem and solver remain fixed. Using this theoretical insight, we create RoboX, an end-to-end solution which exposes a high-level domain-specific language to roboticists. this interface allows roboticists to express the physics of the robot and its task in a form close to its concise mathematical expressions. the RoboX backend then automatically maps this high-level specification to a novel programmable architecture, which harbors a programmable memory access engine and compute-enabled interconnects. Hops in the interconnect are augmented with simple functional units that either operate on in-fight data or are bypassed according a micro-program. Evaluations with six different robotic systems and tasks show that RoboX provides a 29.4x (73 x) speedup and 22.1 x (79.4 x) performance-per-watt improvement over an ARM Cortex A57 (Intel Xeon E3). Compared to GPUs, RoboX attains 7.8 x, 65.5 x, and 71.8x higher performance-per Watt to Tegra X2, GTX 650 Ti, and Tesla K40 with a power envelope of only 3.4 Watts at 45 mn.

关键词： Accelerators domain-specific languages DSL in-network computing model predictive control MPC robotics

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Toward Scalable and Asynchronous Object-centric Data Management for HPC 18

Toward Scalable and Asynchronous Object-centric Data Managem...

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18th ieee/ACM international symposium on Cluster, Cloud and Grid computing (CCGrid)

作者： Tang, Houjun Byna, Suren Tessier, Francois Wang, Teng Dong, Bin Mu, Jingqing Koziol, Quincey Soumagne, Jerome Vishwanath, Venkatram Liu, Jialin Warren, Richard Lawrence Berkeley Natl Lab Berkeley CA 94720 USA Argonne Natl Lab Argonne IL 60439 USA HDF Grp Champaign IL USA

ISBN: (纸本)9781538658154

Emerging high performance computing (HPC) systems are expected to be deployed with an unprecedented level of complexity due to a deep system memory and storage hierarchy. Efficient and scalable methods of data management and movement through this hierarchy is critical for scientific applications using exascale systems. Moving toward new paradigms for scalable I/O in the extreme-scale era, we introduce novel object-centric data abstractions and storage mechanisms that take advantage of the deep storage hierarchy, named Proactive Data Containers (PDC). In this paper, we formulate object-centric PDCs and their mappings in different levels of the storage hierarchy. PDC adopts a client-server architecture with a set of servers managing data movement across storage layers. To demonstrate the effectiveness of the proposed PDC system, we have measured performance of benchmarks and I/O kernels from scientific simulation and analysis applications using PDC programming interface, and compared the results with existing highly tuned I/O libraries. Using asynchronous I/O along with data and metadata optimizations, PDC demonstrates up to 23x speedup over HDF5 and PLFS in writing and reading data from a plasma physics simulation. PDC achieves comparable performance with HDF5 and PLFS in reading and writing data of a single timestep at small scale, and outperforms them at a scale of larger than ten thousand cores. In contrast to existing storage systems, PDC offers user-space data management with the flexibility to allocate the number of PDC servers depending on the workload.

关键词： Metadata Servers Containers Handheld computers computer architecture Programming Optimization

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Cataloging the Visible Universe through Bayesian Inference at Petascale 32

Cataloging the Visible Universe through Bayesian Inference a...

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27th international Heterogeneity in computing Workshop in conjunction with 32nd ieee international Parallel and Distributed Processing symposium (IPDPS)

作者： Regier, Jeffrey Pamnany, Kiran Fischer, Keno Noack, Andreas Lam, Maximilian Revels, Jarrett Howard, Steve Giordano, Ryan Schlegel, David McAuliffe, Jon thomas, Rollin Prabhat Univ Calif Berkeley Dept Elect Engn & Comp Sci Berkeley CA 94720 USA Intel Corp Parallel Comp Lab Santa Clara CA 95051 USA Julia Comp Cambridge MA USA MIT Comp Sci & AI Labs Cambridge MA 02139 USA Univ Calif Berkeley Dept Stat Berkeley CA 94720 USA Lawrence Berkeley Natl Lab Berkeley CA USA

ISBN: (纸本)9781538643686

Astronomical catalogs derived from wide-field imaging surveys are an important tool for understanding the Universe. We construct an astronomical catalog from 55 TB of imaging data using Celeste, a Bayesian variational inference code written entirely in the high-productivity programming language Julia. Using over 1.3 million threads on 650,000 Intel Xeon Phi cores of the Cori Phase II supercomputer, Celeste achieves a peak rate of 1.54 DP PFLOP/s. Celeste is able to jointly optimize parameters for 188M stars and galaxies, loading and processing 178 TB across 8192 nodes in 14.6 minutes. To achieve this, Celeste exploits parallelism at multiple levels (cluster, node, and thread) and accelerates I/O through Cori's Burst Buffer. Julia's native performance enables Celeste to employ high-level constructs without resorting to handwritten or generated low-level code (C/C++/Fortran), and yet achieve petascale performance.

关键词： astronomy Bayesian variational inference Julia high performance computing

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