Modern Field Programmable Gate Arrays (FPGAs) offer a solution to several issues related to real-time on-board systems, such as guaranteed execution time. They are currently considered as target platforms for space ap...
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ISBN:
(纸本)9798350384529;9798350384512
Modern Field Programmable Gate Arrays (FPGAs) offer a solution to several issues related to real-time on-board systems, such as guaranteed execution time. They are currently considered as target platforms for space applications. However, the complexity of producing circuits on these components poses a challenge to their widespread adoption. To address this issue, high-level synthesis tools provide another layer of abstraction above the logic circuit design process, for example compiling C code into Hardware Description Languages such as VHDL or Verilog. However, high-level synthesis results are poorly predictable and do not guarantee the efficient use of recent FPGA capabilities provided by new primitives like digital signal processor or random-access memory. In this paper we propose a compilation chain dedicated to reactive systems, ie. controllers, providing a more predictable synthesis process for critical embedded control applications. The implemented solution demonstrates timing performance equivalent to the traditional synthesis process with a more predictable result.
In this paper, a new type of production line inspection system is constructed by combining cloud computing platform with electromechanical automation control software. The system can realize remote data acquisition, r...
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For orbiters aiming at the outer planets of our solar system, most of the.V cost is associated with the final insertion at the targeted planet. An efficient way of reducing this cost is using flybys of the moons of th...
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ISBN:
(纸本)9798350304626
For orbiters aiming at the outer planets of our solar system, most of the.V cost is associated with the final insertion at the targeted planet. An efficient way of reducing this cost is using flybys of the moons of the planet to reduce the energy of the orbit at arrival, called satellite-aided capture. designing a full transfer from the Earth to an outer planet, including multiple gravity assists and satellite-aided capture raises important issues that must be addressed. One of them is the multiple control parameters that are required to compute such a trajectory. These parameters must be varied over a large array of values to guarantee that all possibilities are covered with enough precision, ensuring that the final trajectory is the best possible. Current approaches on satellite-aided capture mainly focus on designing trajectories inside the sphere of influence of the targeted planet, with no or minimal focus on linking it to the interplanetary trajectory. However, it remains to create a full pipeline to compute a transfer trajectory from the Earth to an outer planet of the solar system using multiple gravity assists and satellite-aided capture. This paper will focus on creating such a pipeline for orbiters targeting Jupiter, Saturn, Uranus, and Neptune. First, different multiple gravity assists sequences are computed, allowing to make a choice based on transfer time and.V cost. This is obtained with a multi-objective dynamic programming exploration, allowing to capture optimal Pareto fronts of.V and time of flight in limited computational effort. This transfer sets initial conditions of the satellite-aided capture. Multiple capture sequences are computed around these initial conditions allowing to choose the one minimizing the insertion.V. Finally, the last branch of the interplanetary transfer is modified to meet the updated initial conditions of the interplanetary transfer. To compute the satellite-aided capture, the branches between the moons of the sequences
The rapid popularization of cloud computing has put forward higher requirements for network security, and the traditional network architecture is difficult to cope with the complex security requirements in the cloud c...
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The virtual DC motor (VDCM) control strategy can simulate the dynamic response of DC motors, enhance system stability and controllability, and has received widespread attention. However, a key challenge in the efficie...
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Jointly sponsored by ACM and ieee, the International conference on computer-aideddesign (ICCAD) is a premier forum to explore new challenges, present leading-edge innovative solutions, and identify emerging technolog...
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Micro-controller units (MCUs) implement the de facto interface between the physical and digital worlds. As a consequence, they appear in a variety of sensing/actuation applications from smart personal spaces to comple...
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Micro-controller units (MCUs) implement the de facto interface between the physical and digital worlds. As a consequence, they appear in a variety of sensing/actuation applications from smart personal spaces to complex industrial controlsystems and safety-critical medical equipment. While many of these devices perform safety- and time-critical tasks, they often lack support for security features compatible with their importance to overall system functions. This lack of architectural support leaves them vulnerable to run-time attacks that can remotely alter their intended behavior, with potentially catastrophic consequences. In particular, we note that, MCU software often includes untrusted third-party libraries (some of them closed-source) that are blindly used within MCU programs, without proper isolation from the rest of the system. In turn, a single vulnerability (or intentional backdoor) in one such third-party software can often compromise the entire MCU software state. In this article, we tackle this problem by proposing, demonstrating security, and formally verifying the implementation of UCCA: an Untrusted Code Compartment Architecture. UCCA provides flexible hardware-enforced isolation of untrusted code sections (e.g., third-party software modules) in resource-constrained and time-critical MCUs. To demonstrate UCCA's practicality, we implement an open-source version of the design on a real resource-constrained MCU: the well-known TI MSP430. Our evaluation shows that UCCA incurs little overhead and is affordable even to lowest-end MCUs, requiring significantly less overhead and assumptions than the prior related work.
Impedance matching is a crucial concept in electrical engineering and electronics, aiming to optimize power transfer between analogue circuits and transmission lines. This paper explores the significance of impedance ...
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This paper analyzes the shortcomings of the traditional UHF label antenna design frequency correction method, and proposes a new automatic correction method by adjusting the label antenna to match the reader frequency...
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Modern GPU systems integrate hundreds of SMs on a single die, and future scaling envisions even more SMs being incorporated. However, the limited number of transistors per die constrains this growth. While current chi...
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ISBN:
(纸本)9798350322255
Modern GPU systems integrate hundreds of SMs on a single die, and future scaling envisions even more SMs being incorporated. However, the limited number of transistors per die constrains this growth. While current chiplet technology shows promise, its performance is limited by the bandwidth and energy efficiency of existing chiplet interconnect technologies. In contrast, optical interconnects offer ultra-high bandwidth and energy efficiency, making them ideal for high-performance chiplet-based GPUs. This work proposes a novel region-based optical network, called RONet, that divides a chiplet-based GPU system with a 2D Mesh layout into multiple row and column regions, where each region is connected by a separate optical link. Additionally, RONet employs a tuning-free transmission mechanism to further enhance inter-chiplet bandwidth. Experimental results show that RONet achieves 43% improvement on performance and 25.4% reduction on system energy consumption over the baseline.
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