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42nd ieee/ACM International conference on computer-aided design (ICCAD)

作者： Pu, Ruiyao Sun, Yiwei Ho, Pei-Hsin Yang, Fan Shang, Li Zeng, Xuan Fudan Univ Sch Microelect State Key Lab Integrated Chips & Syst Shanghai Peoples R China Fudan Univ China & Shanghai Key Lab Data Sci Sch Comp Sci Shanghai Peoples R China UniVista Ind Software Grp Shanghai Peoples R China

ISBN: (纸本)9798350322255

Existing hardware emulators use either FPGA or Boolean processors, which suffer from long compile time and poor debuggability (FPGA-based), or low emulation performance (Boolean processor-based). This work presents Sphinx, a hybrid Boolean processor-FPGA hardware emulation platform aiming to overcome these shortcomings. Sphinx hardware is a new hybrid architecture that integrates software programmable Boolean processors and FPGAs. Sphinx software is a compilation framework that conducts incremental design partitioning and implements the design-under-test components on Boolean processors and the rest on FPGAs. Together, Sphinx enables an incremental emulation flow and demonstrates high emulation performance, fast compile turnarounds, and good debuggability.

关键词： Field programmable gate arrays (FPGA)

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LIORAT: NN Layer I/O Range Training for Area/Energy-Efficient Low-Bit A/D Conversion system design in Error-Tolerant Computation-in-Memory 42

LIORAT: NN Layer I/O Range Training for Area/Energy-Efficien...

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42nd ieee/ACM International conference on computer-aided design (ICCAD)

作者： Yamada, Ayumu Misawa, Naoko Matsui, Chihiro Takeuchi, Ken Univ Tokyo Dept Elect Engn & Informat Syst Tokyo Japan

ISBN: (纸本)9798350322255

Analog Computation-in-Memory (CiM) with ReRAM accelerates the MAC operations of neural networks (NNs). A major issue of CiM is the area and power consumption of analog-to-digital converters (ADCs). This work proposes a low-bit A/D conversion system to improve area/energy efficiency. However, the application-level accuracy is degraded due to quantization error and the limited range of low-bit ADC. To determine the optimal ADC range systematically while maintaining application-level accuracy, Layer Input/Output (I/O) Range Training (LIORAT) is proposed. LIORAT simultaneously trains the weights of a NN and the I/O range of each NN layer. Additionally, a digital ReRAM look-up table (LUT) is placed just after the ADC in the proposed A/D conversion system. Digital ReRAM LUT is used for non-MAC operations in the NN, such as batch normalization (BN). The values of the LUT are uniquely determined by the BN parameters and I/O ranges obtained by LIORAT. The application-level accuracy degradation caused by the ADC non-linearity and ReRAM weight errors can be compensated only by retraining BN parameters. Hence, the accuracy is recovered by updating digital LUT with the retrained BN parameters. Weight error compensation by updating digital LUT requires lower write accuracy compared to analog weight rewriting. ResNet-32 trained with the proposed LIORAT achieves 87.1% inference accuracy on the CIFAR-10 dataset with only 10% LUT area overhead, 4-bit weights, 2-bit DAC, and 4-bit ADC. By updating the LUT, the magnitude of the tolerable error is more than doubled compared to the case without compensation.

关键词： Computation-in-Memory (CiM) ReRAM A/D conversion system error compensation

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Analysis and Research on Microgrid Energy Storage system Based on "Source Network Load Storage" 7

Analysis and Research on Microgrid Energy Storage System Bas...

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7th ieee International conference on Information systems and computer aided Education, ICISCAE 2024

作者： Yin, Xin Kai, Cuiying Man, Jiangxue Wang, Xiaoyu Xu, Fan Marketing Service Center State Grid Heilongjiang Electric Power Co. Ltd. Harbin China

ISBN: (纸本)9798350350760

This paper researches the topology and control methods of the "source network load storage" microgrid energy storage system, and analyzes the impact of complex operating conditions on the system. We construct the topology structure of photovoltaic power generation and wind power systems, as well as a microgrid system structure based on "source grid load storage". The control method of microgrids usually adopts hierarchical control to improve the response speed and accuracy of system control strategies. Analyzing the impact of various complex working conditions such as changes in external lighting, environmental wind speed, and system reactive power on photovoltaic power generation systems and direct drive wind power systems lays a solid foundation for further in-depth research on microgrid energy storage systems. ©2024 ieee.

关键词： Windmill

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Silent Data Corruption in Robot Operating system: A Case for End-to-End system-Level Fault Analysis Using Autonomous UAVs

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ieee TRANSACTIONS ON computer-aided design OF INTEGRATED CIRCUITS AND systemS 2024年第4期43卷 1037-1050页

作者： Hsiao, Yu-Shun Wan, Zishen Jia, Tianyu Ghosal, Radhika Mahmoud, Abdulrahman Raychowdhury, Arijit Brooks, David Wei, Gu-Yeon Reddi, Vijay Janapa Harvard Univ Sch Engn & Appl Sci Cambridge MA 02138 USA Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA Peking Univ Sch Integrated Circuits Beijing 100871 Peoples R China

Safety and resiliency are essential components of autonomous vehicles. In this research, we introduce ROSFI, the first robot operating system (ROS) resilience analysis methodology, to assess the effect of silent data corruption (SDC) on mission metrics. We use unmanned aerial vehicles (UAVs) as a case study to demonstrate that system-level parameters, such as flight time and success rate, are necessary for accurately measuring system resilience. We demonstrate that downstream ROS tasks such as planning and control are more susceptible to SDCs than the visual perception stage in the perception-planning-control (PPC) compute pipeline. This observation only becomes apparent when we consider the complete end-to-end system-level pipeline, as opposed to isolated compute kernels, as previous work does. To enhance the safety and robustness of robot systems bound by size, weight, and power (SWaP), we offer two low-overhead anomaly-based SDC detection and recovery algorithms based on Gaussian statistical models and autoencoder neural networks. Our anomaly error protection techniques are validated in numerous simulated environments. We demonstrate that the autoencoder-based technique can recover up to all failure cases in our studied scenarios with a computational overhead of no more than 0.0062%. Finally, our open-source methodology can be utilized to comprehensively test the robustness of other ROS-based applications. It is available for public download at https://***/harvard-edge/MAVBench/tree/mavfi.

关键词： Autonomous aerial vehicles Safety Resilience Circuit faults Measurement Pipelines Kernel Anomaly detection resilience robot operating system (ROS) silent data corruption (SDC) unmanned aerial vehicle (UAV)

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Full State Quantum Circuit Simulation Beyond Memory Limit 42

Full State Quantum Circuit Simulation Beyond Memory Limit

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42nd ieee/ACM International conference on computer-aided design (ICCAD)

作者： Zhao, Yilun Chen, Yu Li, He Wang, Ying Chang, Kaiyan Wang, Bingmeng Li, Bing Han, Yinhe Chinese Acad Sci Inst Comp Technol Res Ctr Intelligent Comp Syst Beijing Peoples R China Univ Chinese Acad Sci Beijing Peoples R China Southeast Univ Dhaka Bangladesh Capital Normal Univ Beijing Peoples R China

ISBN: (纸本)9798350322255

Quantum circuit simulation (QCS) is essential in the noisy intermediate scale quantum (NISQ) era when real quantum computers are scarce. However, fully tracking the states of a quantum system in QCS is highly challenging due to the exponential memory growth that significantly limits the computational reach of classical systems for QCS. Though it is straightforward to leverage secondary storage to extend the scale of QCS, excessive data movement between memory and storage dominates the simulation time, making this solution unrealistic. To tackle this challenge, we identify an intrinsic property of QCS and implement an open-source framework to effectively reduce data movement by >116x. We evaluate the framework on various benchmarks and demonstrate 4x memory reduction with only <20% overhead. On a memory constrained system, we show that it extends the scale of QCS to 32 qubits (64 GB memory requirement) while existing simulators are bounded to 28 qubits (4 GB memory requirement). Our implementation can be accessed via https://***/Zhaoyilunnn/qdao.

关键词： Quantum Computing design Methodology Simulation

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Research on Anti-interference system of Electronic Communication Equipment under computer Big Data 6

Research on Anti-interference System of Electronic Communica...

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2023 ieee 6th International conference on Information systems and computer aided Education, ICISCAE 2023

作者： Yi, Zhu Junyou, Yao Hui, Huang Boqing, Liu Jianfei, Feng Xueluan, Chen Shenzhen Polytechnic University Guangdong Shenzhen518055 China Hezhou University Hezhou Guangxi542899 China Ningbo Special Equipment Inspection and Research Institute Ningbo Zhejiang315048 China Guangzhou Academy of Special Equipment Inspection and Testing Guangdong Guangzhou510180 China Comac Shanghai Aircraft Design and Research Institute Shanghai201210 China

ISBN: (纸本)9798350313444

This paper introduces the hardware design, software design and experiment process of the communication equipment ultra-low power and anti-interference automatic control system. The hardware part mainly designs the evaluation interface, evaluation circuit, processor and display. In this paper, a series of system communication protocols such as channel resource management, flow control, reservation and allocation, conflict resolution are used to enhance the anti-jamming capability of the system. The simulation results show that the system can perform accurate evaluation in a short time and transmit the evaluation results to the LCD display quickly. The system has strong real-time performance. © 2023 ieee.

关键词： anti-interference system communication interference Electronic communication low power consumption

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Package Assembly design Kits (PADK's) - The Future of Advanced Wafer-Level Manufacturing 10

Package Assembly Design Kits (PADK's) - The Future of Advanc...

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10th ieee Electronics system-Integration Technology conference (ESTC)

作者： Fuentes, Ruben Micksch, Jonathan Amkor Technol Tempe AZ 85284 USA

ISBN: (纸本)9798350390377;9798350390360

Process design kits (PDKs) are well-known catalysts in integrated circuit (IC) design. However, they are still a new concept to the packaging world and many packaging engineers do not understand their importance in the success of IC designs. Traditionally, packaging companies provide only a copy of their design rules, which tend to be very dynamic. This approach creates unnecessary delays and back-and-forth design iterations between the package designer and the High-Density Fan-Out (HDFO) package manufacturer in HDFO applications. Although package design and IC design are two different worlds, they share several key similarities that have contributed to the successful use of Package Assembly design Kits (PADKs). By using PADKs, designers can significantly increase productivity, reduce cycle times, and limit the number of design iterations in HDFO applications. Attendees of this session can expect to gain a broader understanding of how PADKs can help them achieve their goals by attending this session. The design layout and system-level performance of an HDFO require a variety of dynamic design rule definitions. To capture and implement these design rule constraints, PADKs must be used. These PADKs provide a unique type of implementation by validating the design layout with a benchmark that supports the manufacturing and assembly processes used by the manufacturer. When managing a digital supply chain, it is crucial to choose a manufacturer with significant expertise in PADKs. Amkor has been a trailblazer in developing Package Assembly design Kits since 2016. By partnering with Amkor, businesses can receive PADK support and make them a valuable member of their device development team. Advanced wafer-level manufacturers can offer guidance on package design layout, provide specialized application training, and offer continuous design review support. Advanced wafer-level manufacturers like Amkor use the latest software to integrate their packaging knowledge and experienc

关键词： Package Assembly design Kit (PADK) High-Density Fan-Out (HDFO) Wafer Level Packaging (WLP) Outsourced Semiconductor Assembly and Test (OSAT) Electronic design Automation (EDA) Integrated Circuit (IC) Redistribution Layer (RDL) design Rule Checks (DRC) design Verification computer-aided Manufacturing (CAM) computer-aided design (CAD)

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Approaches to CAD Development for Specialized VLSI 5

Approaches to CAD Development for Specialized VLSI

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5th International conference on control systems, Mathematical Modeling, Automation and Energy Efficiency, SUMMA 2023

作者： Shchepukhin, Denis Lyulyava, Daniil Duksin, Nikita Duksina, Ilona MIREA - Russian Technological University Laboratory of Specialized Computation Systems Moscow Russia

ISBN: (纸本)9798350309126

This paper discusses various approaches to the development of computer-aided design systems for specialized very large scale integration (VLSI) circuits. Based on a hierarchical approach to VLSI design, the main stages that need to be implemented by the CAD system are identified, and the tasks performed by the system at each stage are considered. The functionality accelerating changes in the design are proposed for each stage. The main approaches used in the development of this kind of system, their pros and cons, are also considered. © 2023 ieee.

关键词： computer aided design

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GCC: Optimizing Space Efficiency and Read Latency of SSDs with Workload-Aware Garbage Collection aided Compression 42

GCC: Optimizing Space Efficiency and Read Latency of SSDs wi...

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42nd International conference on computer design

作者： Liu, Linhui Gu, Yunfei Zhu, Chenhao Wu, Chentao Li, Jie Guo, Minyi Shanghai Jiao Tong Univ Dept Comp Sci & Engn Shanghai Peoples R China Shanghai Jiao Tong Univ Shanghai Key Lab Trusted Data Circulat & Governan Shanghai Peoples R China Yancheng Blockchain Res Inst Hengyang Peoples R China

ISBN: (纸本)9798350380415;9798350380408

Data compression is increasingly employed to enhance throughput and space efficiency in flash-based storage systems, which are critical for data-intensive applications. Current intra-SSD compression techniques operate transparently with respect to the file system and contribute to improving the lifetime of SSDs. These approaches typically avoid compressing read-hot data to reduce the latency penalties associated with decompression. However, the read-hot data remain uncompressed even after turning into cold data, thereby reducing overall compression effectiveness and diminishing space efficiency. Moreover, when previously compressed cold data become read-hot, it necessitates frequent decompression, which increases the read latency. To address the above problems, we propose a novel Garbage Collection aided Compression (GCC) scheme, to optimize space efficiency and mitigate read latency for compression-supported SSDs. The key idea of GCC is exploiting the valid page migration during garbage collection to enable background compression and decompression. Throughout the garbage collection process, the migrated valid pages can potentially be compressed or decompressed, which progressively improves space efficiency and minimizes the need for decompression during read operations. Performance evaluations conducted using MQSim simulator demonstrate that, compared to the typical compression schemes, GCC reduces the read and write latency by 25.27% and 9.43% on average and improves the space efficiency by 15.01% on average.

关键词： Intra-SSD Compression Garbage Collection Flash-based Storage Space Efficiency

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Research on AIGC Classification Content Generation system of Tourism Resources in Jilin Province Based on computer Machine Vision Technology 2

Research on AIGC Classification Content Generation System of...

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2nd ieee International conference on control, Electronics and computer Technology, ICCECT 2024

作者： Ding, Lihua Jilin Animation Institute Changchun Jilin China

ISBN: (纸本)9798350380958

In this paper, a tourism information forecasting system in computer aided environment is established. In this way, the sparsity of various data can be effectively integrated. In particular, forecasts for foreign visitors have been optimized. This paper aims to combine machine vision and deep learning to build a new efficient multi-source information perception method. According to the basic theory of imaging, the acquisition of tourist pose information is planned, so as to obtain the corresponding relationship between human visual image and human pose. In this way, multi-source image data obtained from multiple cameras is integrated. The test results show that compared with other tourism information forecasting systems, this system has a better forecasting effect. The establishment of the computer-aided tourism information prediction system can not only effectively integrate the sparsity of various data, especially the prediction of foreign tourists has been optimized, but also through the combination of machine vision and deep learning, a new method of efficient multi-source information perception has been constructed. In addition, the system integrates multi-source image data obtained by the camera, and has a good prediction effect. Therefore, the prospect of computer-aided tourism information forecasting system is very broad and is expected to play an important role in the tourism industry. © 2024 ieee.

关键词： Deep learning

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