With societal and technological advancements, human-computer interaction design now emphasizes ease of use and user experience. This paper addresses issues in single-channel eye-control interactions by integrating eye...
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IoT devices are increasingly being implemented with neural network models to enable smart applications. Energy harvesting (EH) technology that harvests energy from ambient environment is a promising alternative to bat...
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ISBN:
(纸本)9781450392174
IoT devices are increasingly being implemented with neural network models to enable smart applications. Energy harvesting (EH) technology that harvests energy from ambient environment is a promising alternative to batteries for powering those devices due to the low maintenance cost and wide availability of the energy sources. However, the power provided by the energy harvester is low and has an intrinsic drawback of instability since it varies with the ambient environment. This paper proposes EVE, an automated machine learning (autoML) co-exploration framework to search for desired multi-models with shared weights for energy harvesting IoT devices. Those shared models incur significantly reduced memory footprint with different levels of model sparsity, latency, and accuracy to adapt to the environmental changes. An efficient on-device implementation architecture is further developed to efficiently execute each model on device. A run-time model extraction algorithm is proposed that retrieves individual model with negligible overhead when a specific model mode is triggered. Experimental results show that the neural networks models generated by EVE is on average 2.5X times faster than the baseline models without pruning and shared weights.
In this paper, based on computer big data technology and modular design method, a set of high-power, wide-speed electric vehicle powertrain unmanned test platform is developed. In this paper, a set of unmanned driving...
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This paper investigates grid-connected photovoltaic (PV) systems on rooftops as a case study, implemented in Tripoli, Libya. A comprehensive survey encompassing plant design and detailed performance analysis is conduc...
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From the construction process, building construction is a highly professional and complex project. The traditional 2 D(Two-Dimensional) graphic design method is difficult to accurately control the BIM data which serio...
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According to ground laboratory airworthiness verification test requirements of the civil aircraft electrical power system in CCAR25, it is necessary to simulate the drive characteristics of the aircraft power unit to ...
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This paper develops an iterative learning control law for a class of nonlinear systems. The approach used to represent the nonlinear system dynamics is a Takagi-Sugeno fuzzy repetitive process that considers the two d...
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The paper presents the design of an H-infinity controller for controlling oil pipeline systems, focusing on pumping petroleum products between fuel installations. Due to the nonlinear characteristics of the pipeline s...
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In-Memory Computing (IMC) has become a promising paradigm for accelerating machine learning (ML) inference. While IMC architectures built on various memory technologies have demonstrated higher throughput and energy e...
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ISBN:
(纸本)9781450392174
In-Memory Computing (IMC) has become a promising paradigm for accelerating machine learning (ML) inference. While IMC architectures built on various memory technologies have demonstrated higher throughput and energy efficiency compared to conventional digital architectures, little research has been done from systemlevel perspective to provide comprehensive and fair comparisons of different memory technologies under the same hardware budget (area). Since large-scale analog IMC hardware relies on the costly analog-digital converters (ADCs) for robust digital communication, optimizing IMC architecture performance requires synergistic co-design of memory arrays and peripheral ADCs, wherein the trade-offs could depend on the underlying memory technologies. To that effect, we co-explore IMC macro design space and memory technology to identify the best design point for each memory type under iso-area budgets, aiming to make fair comparisons among different technologies, including SRAM, phase change memory, resistive RAM, ferroelectrics and spintronics. First, an extended simulation framework employing spatial architecture with off-chip DRAM is developed, capable of integrating both CMOS and nonvolatile memory technologies. Subsequently, we propose different modes of ADC operations with distinctive weight mapping schemes to cope with different on-chip area budgets. Our results show that under an iso-area budget, the various memory technologies being evaluated will need to adopt different IMC macro-level designs to deliver the optimal energy-delay-product (EDP) at system level. We demonstrate that under small area budgets, the choice of best memory technology is determined by its cell area and writing energy. While area budgets are larger, cell area becomes the dominant factor for technology selection.
This paper proposes an AI machine translation multitask system for artificial intelligence. In the hardware design of the system, STM32 microcontroller is used as the main control module. It realizes synchronous infor...
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