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66th ieee Electronic Components and Technology conference (ECTC)

作者： Masuda, Koji Hsu, Hsiang-Han Tokunari, Masao Nakagawa, Shigeru IBM Res Tokyo Opt Interconnect Technol Kawasaki Kanagawa Japan

ISBN: (纸本)9781509012046

For efficient light coupling from and into an optical multi-chip module (MCM), the micro-lens array connector (MLAC) is developed. MLAC, composed of a waveguide side lens array and a fiber side connector, integrates 24 collimation micro-lense pairs in its small volume, realizing high bandwidth density, low coupling loss, large alignment tolerance and simple assembling process. In this paper, the mechanical design and optical characteristics of MLAC are introduced. The design criteria and challenges in the assembling processes are also described.

关键词： micro-lens array optical multi-chip module optical interconnection optoelectronics packaging

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A Double-End Sourced multi-chip Improved Wire-bonded SiC MOSFET Power module Design 31

A Double-End Sourced Multi-Chip Improved Wire-bonded SiC MOS...

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31st Annual ieee Applied Power Electronics Specialists conference and Exposition (APEC)

作者： Wang, Miao Luo, Fang Xu, Longya Ohio State Univ Dept Elect & Comp Engn Columbus OH 43210 USA

ISBN: (纸本)9781467395502

This paper proposes an improved wire-bonded design with a unique double-end sourced ( DES) structure for multi-chip paralleled silicon carbide (SiC) power modules. The new structure adopts two pairs of DC bus-bars to source the power module from the two ends, not only shortens the equivalent power loops but also provides a symmetrical structure for the paralleled devices. The proposed design achieved a minimized power-loop inductance of 7.2 nH. In addition, the design improved current sharing among the paralleled devices. A 1200 V, 60 A SiC metal-oxide-semiconductor field-effect-transistor (MOSFET) half-bridge module (3 devices in parallel) is fabricated and tested for verification. Improved performances are observed in both switching and continuous operation. A converter level design is also presented to accommodate this unique module structure.

关键词： multi-chip power module wire-bonded power-loop inductance silicon carbide metal-oxide-semiconductor field-effect-transistor double-end sourced current-sharing

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Historical Perspective of System in Package (SiP)

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ieee CIRCUITS AND SYSTEMS MAGAZINE 2016年第2期16卷 50-61页

作者： Dai, Wayne Wei-Ming VeriSilicon San Jose CA 95002 USA Celestry Technol Inc San Jose CA USA Ultima Interconnect Technol Inc Santa Clara CA USA IEEE Multichip Module Conf San Jose CA USA IEEE Symposium IC Package Design Integrat San Jose CA USA Int Union Sci & Technol Innovat San Jose CA USA China Semicond Ind Assoc Beijing Peoples R China Berkeley Shanghai Club Shanghai Peoples R China Univ Calif Santa Cruz Dept Comp Engn Santa Cruz CA 95064 USA

"Moore Stress" calls for technology and architecture innovation, and System in Package (SiP) is critical to address the challenge. System in Package is a generalization of System on chip. As such, SiP is a giant chip rather than a miniaturized Printed Circuit Board (PCB). SiP using Wafer Level Package (WLP) enables performance efficient and cost effective integration of DRAM and logic. SiP with Integrated Passive Devices (IPD) provides high quality and low energy platforms for mixed signal and RF circuits. Billions of chips are shipped each year using SiP due to ultra small form factor with very low power consumption for smartphones, smart wearable devices such as smart watches, and Internet of Things (IoT). From editing the book "multichip modules" in 1992 to providing leadership for the ieee multi-chip module conference (MCMC) from 1992 to 1997, Professor Ernest Kuh made profound contributions to the field of System in Package, particularly in design, analytical methods, and extensively toward CAD tools for SiP. His influence and vision led to the special session on "System in Package" at AS P-DAC in 2000, where the term "System in Package (SiP)" was used in a conference and in publications for the first time and is now widely used in the industry.

关键词： system-in-package DRAM1 gene Wafer level packaging low power consumption Smartphone

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A Hierarchy multiple-Voltage Design Technique for Low-Power Performance-Manageable Bio-chips 3

A Hierarchy Multiple-Voltage Design Technique for Low-Power ...

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3rd ieee International conference on Consumer Electronics-Taiwan (ICCE-TW)

作者： Wang, Yu-Shin Cheng, Ching-Hwa Feng Chia Univ Dept Elect Engn Taichung Taiwan

ISBN: (纸本)9781509020737

A Hierarchy multiple-Voltage (Hmulti-Vdd) design technique is proposed in this paper which can effectively reduce power consumption. This paper presents an EDA automation design flow that facilitates separation of high-voltage and low-voltage module in synthesis stage. The proposed Hmulti-Vdd methodology can be utilized to identify how many voltage domain and how low supplied voltage are better to design a low-power chip, while include the performance estimation. The Hmulti-Vdd software tool includes a low-power multi-Vdd chip design optimization process and joint with several commercial circuit synthesis, physical design tools. Using Hmulti-Vdd, the designed module voltage assignment is based on power, delay-time and gate-count analysis. Hmulti-Vdd can help designer to reduce the multi-Vdd design manually efforts. For several designed bio-chips have been validates by using this tool, the power consumption can be effectively reduced up to 50%, and the performance loss can be controlled within 5%.

关键词： multiple-voltage critical module

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Lightweight Network-on-chip Router on Research and Design 13

Lightweight Network-on-Chip Router on Research and Design

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2016 13th ieee International conference on Solid-State and Integrated Circuit Technology (ICSICT)

作者： Yi-Ran Du Wei Li Zi-Bin Dai Zhengzhou Institute of Information Science and Technology State Key Lab of ASIC and System Fudan University

ISBN: (纸本)9781467397209

In order to solve the repeated design of No C router, this paper proposed a lightweight No C router after a study of No C's characteristics and Operating mode. In the low frequency data interaction application, the proposed router has a high cost performance. It can be mapped in a variety of No C topology by changing the number of each internal module and that will help to reduce the design cycle of multi-core No C system. At the same, the maximum data throughput is 703.3Gbps, it can effectively meet the demand of data interaction in No C.

关键词： Lightweight Network-on-chip Router on Research and Design

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Reliable Integration of a high performance multi-chip half-bridge SiC power module 6

Reliable Integration of a high performance multi-chip half-b...

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6th Electronic System-Integration Technology conference (ESTC)

作者： Mouawad, Bassem Li, Jianfeng Castellazzi, Alberto Johnson, C. Mark Univ Nottingham Power Elect Machine & Control Grp PEMC Univ Pk Campus Nottingham NG7 2RD England

ISBN: (纸本)9781509014026

Silicon carbide (SiC) devices have been adopted to push the boundaries further in terms of power density, conversion efficiency, switching speed or thermal capability. To have the benefit of such semiconductors, new packaging should be developed to meet all the advantages. In this paper, we present a reliable integrated concept of a new packaging solution for multi-chip SiC devices aiming to have a very low parasitic inductance in order to have high switching frequencies and ensure a good reliability for long-term operation.

关键词： Silicon carbide

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Four-Channel 784 Gbit/s Transmitter module Enabled by Photonic Wire Bonding and Silicon-Organic Hybrid Modulators 43

Four-Channel 784 Gbit/s Transmitter Module Enabled by Photon...

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43rd European conference on Optical Communication (ECOC)

作者： Billah, M. R. Kemal, J. N. Marin-Palomo, P. Blaicher, M. Kutuvantavida, Y. Kieninger, C. Zwickel, H. Dietrich, P-, I Woif, S. Hoose, T. Xu, Y. Troppenz, U. Moehrle, M. Randel, S. Freude, W. Koos, C. KIT Inst Photon & Quantum Elect IPQ Engesserstr 5 D-76131 Karlsruhe Germany KIT IMT Hermann von Helmholtz Pl 1 D-76344 Karlsruhe Germany HHI Fraunhofer Inst Telecommun Einsteinufer 37 D-10587 Berlin Germany Vanguard Photon GmbH Karlsruhe Germany

We demonstrate a four-channel hybrid multi-chip module comprising InP lasers, silicon-organic hybrid (SOH) modulators, and single-mode fibers, all connected via photonic wire bonds. We transmit 56 GBd QPSK and 16QAM s... 详细信息

ISBN: (纸本)9781538656242

关键词： Photonics Modulation Silicon Wires Surface emitting lasers Electrooptical waveguides

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Prognosis of chip-loss failure in high-power IGBT module by self-testing 42

Prognosis of chip-loss failure in high-power IGBT module by ...

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42nd conference of the Industrial Electronics Society, IECON 2016

作者： Yeke, Liu Xiang, Dawei Yifan, Fu Department of Electrical Engineering Tongji University Shanghai China

ISBN: (纸本)9781509034741

Reliability is of great importance for power converter systems, such as metro, high-speed train and offshore wind turbine. Bonding wire lift-off is a common failure in IGBT module due to the thermomechanical fatigue under cyclical temperature and power swings. Consequently, this will lead to the chip-loss failure gradually in a high power multi-chip IGBT module during long-term operation. To prevent a catastrophic failure from happening, a self-testing technique for IGBT module is proposed in this paper to detect the chip-loss failure at initial stage. During the test, a shoot-through current is imposed on the device under test (DUT) by gate control and its peak value is selected as the failure criterion for chip-loss failure prognosis. Since the IGBT switching behavior changes after failure, the shoot-through current will deviate from its initial value, which can be detected for failure prognosis. For safety, the self-testing is conducted intermittently on-site during system down time and the shoot-through current is limited less than the IGBT rated current at lowered DC voltage. To clarify the method, its test scheme, working principle and implementation are firstly discussed in the paper. Then, experimental work was carried out on a test rig with 3.3kV/800A IGBT modules (emulating a metro traction drive system) to verify the method. Preliminary test results demonstrate that the proposed self-testing method is a simple and effective technique for detecting the gradually developed IGBT chip-loss failure. © 2016 ieee.

关键词： Failure prognosis IGBT module Power converter Reliability Testing

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Development of a bus location system on a multi-hop network with ieee 802.15.4 based wireless system-on-A-chip 20

Development of a bus location system on a multi-hop network ...

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20th World multi-conference on Systemics, Cybernetics and Informatics, WMSCI 2016

作者： Naito, Katsuhiro Tani, Shunsuke Takai, Daichi Department of Information Science Aichi Institute of Technology 1247 Yachigusa Yakusa Toyota Aichi470-0392 Japan

ISBN: (纸本)9781941763476

This paper develops a bus location system employing a multi-hop network. The developed system consists of vehiclemounted devices, relay devices on a bus stop, and a sink device at an office building. The vehicle-mounted devices have a GPS module to obtain their location and a 2.4G [Hz] wireless communication module based on the ieee 802.15.4. The relay devices have a same wireless communication module that can operate autonomously with a solar panel and a Li-Po battery. The sink device has also a same wireless communication module and a serial connection to a server. This paper proposes a special frame structure to realize a sleep operation of relay devices and to mitigate interference effect among them. The proposed frame structure considers a time synchronization, route management, data communication for a vehicle-mounted device, data communication between relay devices and a sink device. All relay devices can realize an interval operation including an operation mode and a sleep mode to reduce the energy consumption because the proposed system can share a same time by a time synchronization mechanism. Since a special period is assigned for data communication on buses, the proposed system can reduce overhead of updating route information according to movements of buses. Additionally, the proposed routing mechanism considers practical micro-computer boards that have a small size of memory and small computational resource. Therefore, it employs a simple tree-based routing to reduce a required system resource. In the implementation, we have developed our proposed mechanism on wireless module based on System-on-A-chip (SoC:TWE-Lite DIP). The SoC has only 32 [KB] RAM and 160 [KB] flush memories, and a 2.4G [Hz] band communication module based on the ieee 802.15.4 standard. It can operate with a small energy less than 25.4 [mA] and can reduce energy consumption less than 6 [μA] during a sleep mode. Therefore, developed devices can realize a multi-hop network with a solar

关键词： Buses

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Passive alignment of an optical fiber on a multi-layer ceramic module for radio-over-fiber applications

Passive alignment of an optical fiber on a multi-layer ceram...

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German Microwave conference (GeMiC)

作者： Mathew, Sumy Welker, Tilo Gutzeit, Nam Spira, Steffen Mueller, Jens Stephan, Ralf Hein, Matthias A. Tech Univ Ilmenau Inst Micro & Nanotechnol D-98694 Ilmenau Germany

ISBN: (纸本)9783981266870

The low-temperature co-fired ceramics technology is a successful and space-qualified technology enabling three-dimensional microwave design. Now we are pursuing an important step further towards multi-functional multi-purpose hybrid assembly technologies: combining ceramic technology with optical fiber technology. In such systems, fiber alignment is a crucial issue. Extra gadgets used for the fiber alignment make the system more complex and bulky. Considering the many features offered by the ceramic multi-layer technology for size reduction, it is advantageous to use this technology for the passive alignment of an optical fiber above the optical source. In this paper, the passive fiber alignment employing flip-chip mounting of a vertical cavity surface emitting laser in a ceramic substrate is presented. We have studied the performance of the resulting optical link with respect to figures typical for radio-over-fiber applications, namely the link gain, noise figure, and the spurious-free dynamic range and compared the results with a link where the VCSEL was wire bonded to the circuit.

关键词： LTCC analog optical link vertical cavity surface emitting laser (VCSEL) passive fiber alignment radio-over-fiber

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