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Analysis of design solutions for autonomous drones 24

Analysis of design solutions for autonomous drones

引用

24th International conference on Control Systems and Computer Science, CSCS 2023

作者： Nedelcu, Bogdan Florea, Adina Magda Politehnica University of Bucharest Faculty of Automatic Control and Computers Romania

ISBN: (纸本)9798350313390

Drones as a particular case of robots were recently regulated by the EU as a guideline for all member states, raising several barriers in the use of drones in industrial applications for the future. Because of safety risks and privacy concerns, from the legal point of view, drones have now a limited applicability outside the visual line of sight of the human pilot therefore a limited economical applicability to some areas accessible by the pilot and outside urban areas. In this paper, we identify the key paths autonomous drone technology should progress towards, to establish a strong basis for a future certification of operating at human tolerable safety risks, and we explore the existing options to simulate in 3D environments the behavior of drones and use simulator rendered data to capture sensor data and images for constructing a set of training and validation data. Moreover, we report on the abilities of simulators to integrate software and hardware in the loop autopilots of drones, explore ways of using custom network architectures on drones, and test the ability of low power computing chips to run custom design neural network architectures. We explore the existing options to simulate in 3D environments the behavior of drones and use simulator rendered data to capture sensor data and images for constructing a set of training and validation data. We also test the abilities of simulators to integrate software and hardware in the loop autopilots of drones and possibility to integrate well known programming languages. To further explore the possibility of using custom network architectures on drones, we test the ability of low power computing chips to run custom design neural network architectures, and we identify some of the challenges ahead. © 2023 ieee.

关键词： network architecture

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Improved Immersive Content Delivery in a Combined Service-based-Virtualized/open-RAN network Environment 100

Improved Immersive Content Delivery in a Combined Service-ba...

引用

100th ieee Vehicular Technology conference, VTC 2024-Fall

作者： Cabrera, Rufino Montalban, Jon Jimenez, Erick Iradier, Eneko Angueira, Pablo Muntean, Gabriel-Miro

ISBN: (纸本)9798331517786

The stringent requirements of the latest immersive applications (i.e., 360° video, VR, AR, XR, etc.) combined with the scarcity of radio resources are challenging the service operators of the various telecommunication networks. In the recent literature, HetNets have been proposed as an alternative to overcoming these challenges. In previous work, the authors presented SVORA, an architecture for integrating different radio technologies, combining virtualized/open RAN architectures and SBA-based RAN for efficient spectrum usage. In this work, the authors upgrade the previously proposed solution to deliver immersive video efficiently. The paper presents imeNF, a new set of network Functions that support delivering high-bitrate immersive video-based applications with increased quality of service. Simulations-based testing shows how, based on imeNF, a 16k video can be sent with delays of 15 ms, while traditional D-RAN, V-RAN, and O-RAN-based approaches take more than 300 ms. © 2024 ieee.

关键词： network function virtualization

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ANT-ACE: An FHE Compiler Framework for Automating Neural network Inference 25

ANT-ACE: An FHE Compiler Framework for Automating Neural Net...

引用

23rd ACM/ieee International Symposium on Code Generation and Optimization, CGO 2025

作者： Li, Long Lai, Jianxin Yuan, Peng Sui, Tianxiang Liu, Yan Zhu, Qing Zhang, Xiaojing Xiao, Linjie Chen, Wenguang Xue, Jingling Ant Group Shanghai China Ant Group Beijing China Ant Group Shenzhen China Tsinghua University Ant Group Beijing China UNSW Ant Group Sydney Australia

ISBN: (纸本)9798400712753

Fully Homomorphic Encryption (FHE) facilitates computations on encrypted data without requiring access to the decryption key, offering substantial privacy benefits for deploying neural network applications in sensitive sectors such as healthcare and finance. Nonetheless, programming these applications within the FHE framework is complex and demands extensive cryptographic expertise to guarantee correctness, performance, and security. In this paper, we present ANT-ACE, a production-quality, open-source FHE compiler designed to automate neural network inference on encrypted data. ANT-ACE accepts ONNX models and generates C/C++ programs, leveraging its custom open-source FHE library. We explore the design challenges encountered in the development of ANT-ACE, which is engineered to support a variety of input formats and architectures across diverse FHE schemes through a novel Intermediate Representation (IR) that facilitates multiple levels of abstraction. Comprising 44,000 lines of C/C++ code, ANT-ACE efficiently translates ONNX models into C/C++ programs for encrypted inference on CPUs, specifically utilizing the RNS-CKKS scheme. Preliminary evaluations on a single CPU indicate that ANT-ACE achieves significant speed enhancements in ResNet models, surpassing expert manual implementations and fulfilling our design goals. © 2025 Copyright held by the owner/author(s).

关键词： Program compilers

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6GSMART-ICC Project: Industrial Cloud-Continuum Orchestration for Smart Cyber-Physical Systems

6GSMART-ICC Project: Industrial Cloud-Continuum Orchestratio...

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2024 ieee conference on Standards for Communications and networking, CSCN 2024

作者： Carmona-Cejudo, E. Palacios, J.M. Benedicto, J. Hidalgo, J. Fernandez Palomares, J. Rasol, K. I2CAT Foundation Barcelona Spain Minsait Madrid Spain Eviden Barcelona Spain

ISBN: (纸本)9798331507428

By combining computational capabilities next to data sources with fifth-generation (5G) connectivity, edge computing can enable novel industrial use cases. Further, by integrating public network offerings with industrial private networks, enhanced quality of service (QoS) can be achieved. This poster presents the current status of 6GSMART-ICC project. An industrial cross-domain orchestration system architecture with distributed orchestration capabilities is introduced. Further, a CAMARA quality-on-demand (QoD) application programming interface (API) is integrated into an emulated public-private integrated network, following GSMA's open Gateway scheme. Results demonstrate improved delay and bandwidth (BW) when applying QoD enhancement, enabling near-real-time traffic in industrial scenarios. © 2024 ieee.

关键词： Application programming interfaces (API)

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Bayesian network Reliability Modeling for Three-version Machine Learning Systems 53

Bayesian Network Reliability Modeling for Three-version Mach...

引用

53rd Annual ieee/IFIP International conference on Dependable Systems and networks (DSN)

作者： Wen, Qiang Machida, Fumio Univ Tsukuba Dept Comp Sci Tsukuba Ibaraki Japan

ISBN: (纸本)9798350325454

Machine learning (ML) is widely used in intelligent software systems. However, the uncertain outputs from ML models can lead to undesirable consequences in safety-critical applications. To improve system reliability, we propose N-version ML architectures combining multiple inputs with multiple ML models to decide the system output by voting. The reliability of N-version ML systems can be characterized by two diversity measures;input diversity and model diversity. In this study, we consider Bayesian networks (BNs) for modeling the reliability of N-version ML systems outputs through multiple dependent diversity parameters. We present a preliminary BNs reliability model for a three-version ML system. Finally, we discuss the potential extension of the approach and issues for modeling large-scale systems.

关键词： diversity Bayesian networks machine learning system N-version programming reliability

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Dynamic, Reconfigurable and Green network Slice Admission Control and Resource Allocation in the O-RAN Using Model Predictive Control 23

Dynamic, Reconfigurable and Green Network Slice Admission Co...

引用

23rd International-Federation-for-Information-Processing (IFIP) networking conference (IFIP networking)

作者： Fryganiotis, Nikolaos Stai, Eleni Dimolitsas, Ioannis Zafeiropoulos, Anastasios Papavassiliou, Symeon Natl Tech Univ Athens Sch Elect & Comp Engn Inst Commun & Comp Syst ICCS Athens Greece

ISBN: (纸本)9798350390605;9783903176638

In the context of 5G, virtualization has transformed Radio Access network (RAN) architectures, enabling efficient resource utilization, flexibility and scalability of RAN deployments and operations. Within this paradigm, network slicing has emerged as a pivotal technique, enabling the creation of tailored virtual network instances to meet diverse service requirements. This study performs joint slice request admission control and optimal Virtual network Functions (VNFs) placement in O-RAN-enabled networks, subject to infrastructure and Quality-of-Service constraints. Contrary to existing schemes, emphasis is placed on two not yet deeply studied directions. The first is about handling future uncertainties on slice requests arrivals for which an iterative Model Predictive Control (MPC)-based approach is proposed that leverages updated traffic forecasts for dynamic adaptation. The second relates to VNFs migration in the O-RAN modules to increase the slice acceptance ratio in an energy efficient way. Through performance evaluations and comparisons, we demonstrate the efficacy of the proposed MPC-based solution compared to other approaches.

关键词： network Slicing Radio Access network (RAN) open RAN (O-RAN) network Function Virtualization Admission Control Model Predictive Control (MPC)

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NPB-PSTL: C++ STL Algorithms with Parallel Execution Policies in NAS Parallel Benchmarks 33

NPB-PSTL: C++ STL Algorithms with Parallel Execution Policie...

引用

33rd Euromicro International conference on Parallel, Distributed, and network-Based Processing, PDP 2025

作者： Loff, Junior Hoffmann, Renato B. Bianchessi, Arthur S. Mallmann, Leonardo Griebler, Dalvan Binder, Walter Faculty of Informatics Lugano Switzerland Porto Alegre Brazil

ISBN: (纸本)9798331524937

The C++ language continually evolves through formal specifications established by its standards committee, proposing new features to maintain $\mathrm{C}++$ as a relevant programming language while improving usability, performance, and portability across platforms. With the addition of parallel Standard Template Library (STL) algorithms in C++17, programmers can now leverage parallel processing capabilities via vendor-neutral parallel execution policies. This study presents an adaptation of the NAS Parallel Benchmarks (NPB) - a well-established suite of applications for evaluating parallel architectures-by porting its sequential C-style code to use C++ STL abstractions and performance-portable parallelism features. Our goals are to (1) assess the suitability of C++ STL for scientific applications like the ones in the NPB and (2) provide a comparative performance and portability of STL algorithms' parallel execution policies across different multicore architectures (x86 and AArch64). Results indicate that the performance of parallel STL algorithms is often close to that of optimized handwritten versions (openMP, Intel TBB, and FastFlow) on different architectures, with notable shortfalls. Across all NPB benchmarks, the STL algorithms' geometric mean shows sequential execution times that are between 3.76% and $\mathrm{6. 9 \%}$ higher, while parallel executions may reach a geometric mean of up to $\mathrm{2 1. 2 1 \%}$ higher execution time. © 2025 ieee.

关键词： C++ (programming language)

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Enhancing BISINDO Recognition Accuracy Through Comparative Analysis of Three CNN Architecture Models 8

Enhancing BISINDO Recognition Accuracy Through Comparative A...

引用

8th International conference on Information Management and Technology, ICIMTech 2023

作者： Yap, Steven Panggiri, Billy Nicholas Darian, Garry Muliono, Yohan Prasetyo, Simeon Yuda School of Computer Science Bina Nusantara University Computer Science Department Jakarta11480 Indonesia

ISBN: (纸本)9798350326093

This paper aims to develop an effective and efficient system for hand gesture recognition of Indonesian Sign Language (BISINDO) using a comparative analysis of three CNN architectures. The Python programming language is used as the development environment, together with the free edition of Google Colab. Google Colab provides a free online platform for coding and experimentation. PyTorch is used as a framework for training models, exploiting its Python programming language capabilities. and comprised 8,792 pictures of 200 by 200 pixel dimensions, divided A CNN-based technique is used, consisting of convolutional layers with ReLU activation, a comparison of three possible CNN designs from the detected image, and max pooling to constantly minimize dimensions, parameters, and computations within the network. The acquired findings show the CNN model is accurate after training and testing, with different accuracy rates. © 2023 ieee.

关键词： network architecture

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Vector Symbolic Scene Representation for Semantic Place Recognition

Vector Symbolic Scene Representation for Semantic Place Reco...

引用

ieee International conference on Fuzzy Systems (FUZZ-ieee) / ieee World Congress on Computational Intelligence (ieee WCCI) / International Joint conference on Neural networks (IJCNN) / ieee Congress on Evolutionary Computation (ieee CEC)

作者： Kirilenko, Daniil Kovalev, Alexey K. Solomentsev, Yaroslav Melekhin, Alexander Yudin, Dmitry A. Panov, Aleksandr, I Moscow Inst Phys & Technol Dolgoprudnyi Russia AIRI Moscow Russia HSE Univ Moscow Russia FRC CSC RAS Moscow Russia

ISBN: (数字)9781728186719

ISBN: (纸本)9781728186719

Most state-of-the-art methods do not explicitly use scene semantics for place recognition by the images. We address this problem and propose a new two-stage approach referred to as TSVLoc. It solves the place recognition task as the image retrieval problem and enriches any well-known method. In the first model-agnostic stage, any modern neural network model that does not directly use semantics, e.g., HF-Net, NetVLAD, or PatchNetVLAD, can be used. In the second stage, we apply the Vector Symbolic architectures (VSA) framework to construct semantic scene representation. Our method uses semantic segmentation of an image to extract objects and their relations and applies VSA operations to form semantic scene representation. For this, an optional usage of the depth map was considered, which showed promising results. The effectiveness of our approach is demonstrated through extensive experiments on the open large-scale datasets: the indoor HPointioc dataset built in the Habitat simulation environment and the outdoor Oxford RobotCar dataset. The proposed solution significantly improves the quality of the place recognition.

关键词： place recognition image retrieval vector symbolic architectures semantic scene representation

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Architectural Support for Functional programming 30

Architectural Support for Functional Programming

引用

30th IFIP/ieee International conference on Very Large Scale Integration (VLSI-SoC)

作者： Accetti, Cecil Liu, Peilin Shanghai Jiao Tong Univ Shanghai Peoples R China

ISBN: (数字)9781665490054

ISBN: (纸本)9781665490054

The architecture of a computer determines what programs are allowed to do and what the microarchitecture should implement. As security and safety become critical needs for an emergent class of highly-connected devices, the way computations are performed becomes a central concern, as it can directly allow or hamper the development of malicious software. In this work we investigate functional programming as an alternative foundation for computer architectures, starting from a formal calculus of structured combinators up to its implications on software and hardware design, resulting in the open-source, purely-functional fun instruction-set architecture.

关键词： Instruction-set architecture functional programming SoC design

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