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network Slicing in O-RAN-Enabled Cell-Free Massive MIMO: A DRL-Based Power Control

Network Slicing in O-RAN-Enabled Cell-Free Massive MIMO: A D...

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2025 ieee Wireless Communications and networking conference, WCNC 2025

作者： Eskandari, Mahdi Rahmani, Mostafa Burr, Alister G. School of Physics Engineering and Technology University of York York United Kingdom

ISBN: (纸本)9798350368369

The advent of 5G networks necessitates more flexible and intelligent architectures, prompting a shift from conventional models to open Radio Access networks (0-RAN) augmented with integrated network slicing (NS). The combination of O-RAN with a cell-free architecture improves both coverage and performance, while NS facilitates dynamic resource allocation to support diverse services, such as ultra-reliable low-latency communications (uRLLC) and enhanced mobile broadband (eMBB). This paper introduces a novel NS-enabled, cell-free O-RAN framework designed to optimize resource allocation and power control. In contrast to traditional methods, we adopt a Deep Reinforcement Learning (DRL) approach, leveraging the Soft Actor-Critic (SAC) algorithm to dynamically allocate power and resources across distributed access points (APs), while simultaneously ensuring the efficient management of network slices. The proposed framework aims to maximize the number of admitted slices while minimizing network costs, ensuring optimal data rates for eMBB and low latency for uRLLC services. Through this approach, we demonstrate enhanced flexibility, scalability, and performance in dynamic 5G wireless environments. © 2025 ieee.

关键词： Reinforcement learning

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A Dataset for Information Extraction from News Web Pages

A Dataset for Information Extraction from News Web Pages

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2022 Ivannikov open conference, ISPRAS 2022

作者： Varlamov, Maksim Galanin, Denis Bedrin, Pavel Duda, Sergey Lazarev, Vladimir Yatskov, Alexander Ivannikov Institute for System Programming of the Russian Academy of Sciences Moscow Russia Lomonosov Moscow State University Moscow Russia

ISBN: (纸本)9798350398533

In this paper we propose a new dataset for information extraction from news web pages. Accurate collection of news articles is necessary to build systems that aggregate and analyze data from a large number of news sources. However, existing news page datasets are designed for the problem of article content extraction and do not consider other metadata such as dates or authors, while modern generic approaches for structured web data extraction are evaluated on other domains, mostly e-commerce products websites. Our dataset contains 724 web pages from 114 Russian news websites. On each page we manually annotated title, text, publication date, tags and other article attributes. We describe data collection and annotation process and demonstrate evaluation results for open source tools and neural network based approaches. The dataset is publicly available on GitHub. © 2022 ieee.

关键词： Websites

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Energy-Efficient Deep Neural network Optimization via Pooling-Based Input Masking

Energy-Efficient Deep Neural Network Optimization via Poolin...

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ieee International conference on Fuzzy Systems (FUZZ-ieee) / ieee World Congress on Computational Intelligence (ieee WCCI) / International Joint conference on Neural networks (IJCNN) / ieee Congress on Evolutionary Computation (ieee CEC)

作者： Ren, Jiankang Lv, Huawei Bi, Ran Liu, Qian Ni, Zheng Tan, Guozhen Dalian Univ Technol Sch Comp Sci & Technol Dalian Peoples R China

ISBN: (数字)9781728186719

ISBN: (纸本)9781728186719

Deep Neural networks (DNNs) are increasingly deployed in battery-powered and resource-constrained devices. However, the most accurate DNNs usually require millions of parameters and operations, making them computation-heavy and energy-expensive, so it is an important topic to develop energy efficient DNN models. In this paper, we present an efficient DNN training framework under energy constraint to improve the energy efficiency of DNN inference. The key idea of this research is inspired by the observation that the input data of DNNs is usually inherently sparse and such sparsity can be exploited by sparse tensor DNN accelerators to eliminate ineffectual data access and compute. Therefore, we can enhance the inference accuracy within the energy budget by strategically controlling the sparsity of the input data. We build an energy consumption model for the sparse tensor DNN accelerator to quantify the inference energy consumption from the perspective of data access and data processing. In particular, we define a metric (named sporadic degree) to characterise the influence of the number of sporadic values in the sparse input on the energy consumption of data access for the sparse tensor DNN accelerator. Based on the proposed quantitative energy consumption model, we present an efficient pooling-based input mask training algorithm to optimize the energy efficiency of DNN inference by enhancing the input sparsity and reducing the number of sporadic values in the masked input. Experiments show that compared with the state-of-the-art methods, our proposed method can achieve higher inference accuracy with lower energy consumption and storage requirement owing to higher sparsity and lower sporadic degree of the masked input.

关键词： deep neural network compression input sparsity energy constraint pooling input mask

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PathSeeker: A Fast Mapping Algorithm for CGRAs

PathSeeker: A Fast Mapping Algorithm for CGRAs

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25th Design, Automation and Test in Europe conference and Exhibition (DATE)

作者： Balasubramanian, Mahesh Shrivastava, Aviral Arizona State Univ Make Programming Simple Lab Tempe AZ 85281 USA

ISBN: (纸本)9783981926361

Coarse-grained reconfigurable arrays (CGRAs) have gained traction over the years as a low-power accelerator due to the efficient mapping of the compute-intensive loops onto the 2-D array by the CGRA compiler. When encountering a mapping failure for a given node, existing mapping techniques either exit and retry the mapping anew, or perform backtracking, i.e., recursively remove the previously mapped node to find a valid mapping. Abandoning mapping and starting afresh can deteriorate the quality of mapping and the compilation time. Even backtracking may not be the best choice since the previous node may not be the incorrectly placed node. To tackle this issue, we propose PathSeeker - a mapping approach that analyzes mapping failures and performs local adjustments to the schedule to obtain a mapping. Experimental results on 35 top performance-critical loops from MiBench, Rodinia, and Parboil benchmark suites demonstrate that PathSeeker can map all of them with better mapping quality and dramatically less compilation time than the previous state-of-the-art approaches - GraphMinor and RAMP, which were unable to map 20 and 5 loops, respectively. Over these benchmarks, PathSeeker achieves 28% better performance at 550x compilation speedup over GraphMinor and 3% better performance at 10x compilation speedup over RAMP on a 4x4 CGRA.

关键词： Compilers Reconfigurable architectures CGRA Mapping

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END-TO-END network BASED ON TRANSFORMER FOR AUTOMATIC DETECTION OF COVID-19 47

END-TO-END NETWORK BASED ON TRANSFORMER FOR AUTOMATIC DETECT...

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47th ieee International conference on Acoustics, Speech and Signal Processing (ICASSP)

作者： Cai, Cong Liu, Bin Tao, Jianhua Tian, Zhengkun Lu, Jiahao Wang, Kexin Chinese Acad Sci Natl Lab Pattern Recognit Inst Automat Beijing Peoples R China Univ Chinese Acad Sci Sch Artificial Intelligence Beijing Peoples R China CAS Ctr Excellence Brain Sci & Intelligence Techn Beijing Peoples R China Tianjin Normal Univ Coll Comp & Informat Engn Tianjin Peoples R China

ISBN: (纸本)9781665405409

The novel coronavirus disease (COVID-19) was declared a pandemic by the World Health Organization. The cumulative number of deaths is more than 4.8 million. Epidemiology experts concur that mass testing is essential for isolating infected individuals, contact tracing, and slowing the progression of the virus. In recent months, some machine learning methods have been proposed utilizing audio cues for COVID-19 detection. However, many works are based on hand-crafted features and deep features to detect COVID-19. There is no evidence that these features are optimal for COVID-19 detection. Therefore, we proposed an end-to-end network based on transformer for automatic detection of COVID-19. It directly learns features from the raw waveform for end-to-end learning, rather than extracting features in advance. We propose a feature extraction module to automatically extract features. And we use the transformer architectures to model the dependencies between the extracted features. It is the first end-to-end learning based on raw waveform for COVID-19 detection. Experiments on COUGHVID dataset show that our method has achieved competitive results.

关键词： COVID-19 Digital Health Speech Processing End-to-End Deep Learning

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FusionNet: An Effective network Phishing Website Detection Framework Based on Multi-Modal Fusion 25

FusionNet: An Effective Network Phishing Website Detection F...

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25th ieee International conferences on High Performance Computing and Communications, 9th International conference on Data Science and Systems, 21st ieee International conference on Smart City and 9th ieee International conference on Dependability in Sensor, Cloud and Big Data Systems and Applications, HPCC/DSS/SmartCity/DependSys 2023

作者： Sun, Yu Liu, Guangqi Han, Xiaohui Zuo, Wenbo Liu, Weihua Qilu University of Technology Key Laboratory of Computing Power Network and Information Security Ministry of Education Shandong Computer Science Center National Supercomputer Center in Jinan Shandong Academy of Sciences Jinan China Shandong Provincial Key Laboratory of Computer Networks Shandong Fundamental Research Center for Computer Science Jinan China Quancheng Provincial Laboratory Jinan China

ISBN: (纸本)9798350330014

Recently, the rapid advancement of communication technology has undoubtedly improved people's lives. Unfortunately, this progress has also given rise to a significant issue: the proliferation of phishing websites. Regrettably, phishing web sites have now emerged as one of the primary threats to cybersecurity. While there have been extensive efforts to develop anti-phishing techniques, many of these approaches focus solely on a single modality of information, such as the website's URL, HTML source code, or visual features. Given the growing sophistication of phishing attacks, relying on just one modality of information is no longer sufficient to accurately identify phishing websites. To tackle this challenge, our research aims to leverage the complementarity of various modalities to enhance phishing website detection. In this paper, we introduce a multi-modal framework called FusionNet to identify phishing web pages. This framework utilizes three distinct information modalities: URLs, HTML source codes, and visual features. Specifically, our approach first designs specific representation learning architectures tailored to each modality's unique properties. Subsequently, we incorpo-rate an attention mechanism to merge these representations, thereby exploiting the synergies between the multi-modal data. The learned feature representations are more discriminative, contributing to significantly improved phishing website detection accuracy. To evaluate the performance of FusionNet, we collect a dataset comprising phishing webpages, each sample contains all three modalities-URLs, HTML source codes, and visual features. Our extensive experiments conducted on this dataset demonstrate that FusionNet outperforms state-of-the-art methods in terms of both robustness and accuracy. © 2023 ieee.

关键词： Websites

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Toward Performance Portable programming for Heterogeneous Systems on a Chip: A Case Study with Qualcomm Snapdragon SoC

Toward Performance Portable Programming for Heterogeneous Sy...

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ieee High Performance Extreme Computing conference (HPEC)

作者： Cabrera, Anthony Hitefield, Seth Kim, Jungwon Lee, Seyong Miniskar, Narasinga Rao Vetter, Jeffrey S. Oak Ridge Natl Lab Oak Ridge TN 37831 USA

ISBN: (纸本)9781665423694

Future heterogeneous domain-specific systems on a chip (DSSoCs) will be extraordinarily complex in terms of processors, memory hierarchies, and interconnection networks. To manage this complexity, architects, system software designers, and application developers need programming technologies that are flexible, accurate, efficient, and productive. These technologies must be as independent of any one specific architecture as is practical because the sheer dimensionality and scale of the complexity will not allow porting and optimizing applications for each given DSSoC. To address these issues, the authors are developing Cosmic Castle, a performance portable programming toolchain for streaming applications on heterogeneous architectures. The primary focus of Cosmic Castle is on enabling efficient and performant code generation through the smart compiler and intelligent runtime system. This paper presents the preliminary evaluation of the authors' ongoing work toward Cosmic Castle. Specifically, this paper details the code-porting efforts and evaluates various benchmarks on the Qualcomm Snapdragon SoC using tools developed through Cosmic Castle.

关键词： Performance evaluation Runtime Program processors Computational modeling Biological system modeling programming Benchmark testing

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Latency-Optimal network Microservice Architecture Deployment in SDN

Latency-Optimal Network Microservice Architecture Deployment...

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ieee conference on Global Communications (GLOBECOM)

作者： Juan Luis Herrera Domenico Scotece Jaime Galán-Jiménez Javier Berrocal Giuseppe Di Modica Luca Foschini Dept. of Computer Systems and Telematics Engineering University of Extremadura Spain Dipartamento di Informatica Scienza e Ingegneria University of Bologna Italy

The Software-Defined networking (SDN) paradigm enables network administrators to manage the behavior of the network thanks to a centralized control plane. By programming network-level applications, it is possible to determine how traffic flows must be handled programmatically. In the same manner that computing applications have evolved from monolithic to microservice-based architectures, network-level applications are expected to evolve into microservice-based SDN controllers, implementing each application as a replicable and individually deployable component of the SDN controller. In such a scenario, the Quality of Service (QoS) experienced by traffic flows depends on how these microservices are placed and deployed through the network topology. In this work, we provide a system to optimize the QoS of the traffic in microservice-based SDN networks by optimally placing and replicating the network-level microservices. Experimental results show the effectiveness of the proposed solution over a real network topology with varying traffic loads.

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Parallelising an Aggregate programming Framework with Message-Passing Interface

Parallelising an Aggregate Programming Framework with Messag...

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Autonomic Computing and Self-Organizing Systems Companion (ACSOS-C), ieee International conference on

作者： Giorgio Audrito Alberto Riccardo Martinelli Gianluca Torta Dipartimento di Informatica Università di Torino Turin Italy

FCPP is an optimized C++ implementation of the Aggregate programming (AP) paradigm for the implementation of distributed systems. Until now, it has been either deployed on networks of constrained far edge devices, or used for simulating AP systems on a single local computer. Recent work hints at a third possibility, namely adopting AP as a way to effectively program distributed algorithms, and execute them on a centralized high-performance hardware instead of a network of low-end computational nodes. This could also allow an integration of edge and cloud resources, where workload could be dynamically moved between the computational layers. In the present work, we describe the first extension of FCPP that supports the execution on a distributed network of high-end computational nodes (e.g., NUMA architectures, or small computer networks). The extension allows the mapping of a large simulation of a far edge system into such nodes basing on the MPI (Message-Passing Interface) standard, providing a first step towards an edge-cloud continuum for aggregate programs.

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X-Cache : A Modular Architecture for Domain-Specific Caches 22

X-Cache : A Modular Architecture for Domain-Specific Caches

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49th ieee/ACM Annual International Symposium on Computer Architecture (ISCA)

作者： Sedaghati, Ali Hakimi, Milad Hojabr, Reza Shriraman, Arrvindh Simon Fraser Univ Sch Comp Sci Burnaby BC Canada

ISBN: (纸本)9781450386104

With Dennard scaling ending, architects are turning to domain-specific accelerators (DSAs). State-of-the-art DSAs work with sparse data [37] and indirectly-indexed data structures [18, 30]. They introduce non-affine and dynamic memory accesses [7, 35], and require domain-specific caches. Unfortunately, cache controllers are notorious for being difficult to architect;domain-specialization compounds the problem. DSA caches need to support custom tags, data-structure walks, multiple refills, and preloading. Prior DSAs include ad-hoc cache structures, and do not implement the cache controller. We propose X-Cache, a reusable caching idiom for DSAs. We will be open-sourcing a toolchain for both generating the RTL and programming X-Cache. There are three key ideas: i) DSA-specific Tags (Meta-tag): The designer can use any combination of fields from the DSA-metadata as the tag. Meta-tags eliminate the overhead of walking and translating metadata to global addresses. This saves energy, and improves load-to-use latency. ii) DSA-programmable walkers (X-Actions): We find that a common set of microcode actions can be used to implement the DSA-specific walking, data block, and tag management. We develop a programmable microcode engine that can efficiently realize the data orchestration. iii) DSA-portable controller (X-Routines): We use a portable abstraction, coroutines, to let the designer express walking and orchestration. Coroutines capture the block-level parallelism, remain lightweight, and minimize controller occupancy. We create caches for four different DSA families: Sparse GEMM [35, 37], GraphPulse [30], DASX [22], and Widx [18]. X-Cache outperforms address-based caches by 1.7. and remains competitive with hardwired DSAs (even 50% improvement in one case). We demonstrate that meta-tags save 26-79% energy compared to address-tags. In X-Cache, meta-tags consume 1.5-6.5% of data RAM energy and the programmable microcode adds a further 7%.

关键词： Domain-specific architectures Caches Coroutines Dataflow architectures

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